103 lines
2.2 KiB
ArmAsm
103 lines
2.2 KiB
ArmAsm
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/* SPDX-License-Identifier: GPL-2.0 */
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/*
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* Copyright(c) 2016-20 Intel Corporation.
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*/
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.macro ENCLU
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.byte 0x0f, 0x01, 0xd7
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.endm
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.section ".tcs", "aw"
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.balign 4096
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.fill 1, 8, 0 # STATE (set by CPU)
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.fill 1, 8, 0 # FLAGS
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.quad encl_ssa_tcs1 # OSSA
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.fill 1, 4, 0 # CSSA (set by CPU)
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.fill 1, 4, 1 # NSSA
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.quad encl_entry # OENTRY
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.fill 1, 8, 0 # AEP (set by EENTER and ERESUME)
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.fill 1, 8, 0 # OFSBASE
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.fill 1, 8, 0 # OGSBASE
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.fill 1, 4, 0xFFFFFFFF # FSLIMIT
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.fill 1, 4, 0xFFFFFFFF # GSLIMIT
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.fill 4024, 1, 0 # Reserved
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# TCS2
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.fill 1, 8, 0 # STATE (set by CPU)
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.fill 1, 8, 0 # FLAGS
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.quad encl_ssa_tcs2 # OSSA
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.fill 1, 4, 0 # CSSA (set by CPU)
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.fill 1, 4, 1 # NSSA
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.quad encl_entry # OENTRY
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.fill 1, 8, 0 # AEP (set by EENTER and ERESUME)
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.fill 1, 8, 0 # OFSBASE
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.fill 1, 8, 0 # OGSBASE
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.fill 1, 4, 0xFFFFFFFF # FSLIMIT
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.fill 1, 4, 0xFFFFFFFF # GSLIMIT
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.fill 4024, 1, 0 # Reserved
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.text
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encl_entry:
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# RBX contains the base address for TCS, which is the first address
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# inside the enclave for TCS #1 and one page into the enclave for
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# TCS #2. By adding the value of encl_stack to it, we get
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# the absolute address for the stack.
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lea (encl_stack)(%rbx), %rax
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jmp encl_entry_core
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encl_dyn_entry:
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# Entry point for dynamically created TCS page expected to follow
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# its stack directly.
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lea -1(%rbx), %rax
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encl_entry_core:
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xchg %rsp, %rax
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push %rax
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push %rcx # push the address after EENTER
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push %rbx # push the enclave base address
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call encl_body
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pop %rbx # pop the enclave base address
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/* Clear volatile GPRs, except RAX (EEXIT function). */
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xor %rcx, %rcx
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xor %rdx, %rdx
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xor %rdi, %rdi
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xor %rsi, %rsi
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xor %r8, %r8
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xor %r9, %r9
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xor %r10, %r10
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xor %r11, %r11
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# Reset status flags.
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add %rdx, %rdx # OF = SF = AF = CF = 0; ZF = PF = 1
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# Prepare EEXIT target by popping the address of the instruction after
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# EENTER to RBX.
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pop %rbx
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# Restore the caller stack.
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pop %rax
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mov %rax, %rsp
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# EEXIT
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mov $4, %rax
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enclu
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.section ".data", "aw"
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encl_ssa_tcs1:
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.space 4096
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encl_ssa_tcs2:
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.space 4096
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.balign 4096
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# Stack of TCS #1
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.space 4096
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encl_stack:
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.balign 4096
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# Stack of TCS #2
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.space 4096
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