#include <linux/module.h>
#define INCLUDE_VERMAGIC
#include <linux/build-salt.h>
#include <linux/elfnote-lto.h>
#include <linux/export-internal.h>
#include <linux/vermagic.h>
#include <linux/compiler.h>

BUILD_SALT;
BUILD_LTO_INFO;

MODULE_INFO(vermagic, VERMAGIC_STRING);
MODULE_INFO(name, KBUILD_MODNAME);

__visible struct module __this_module
__section(".gnu.linkonce.this_module") = {
	.name = KBUILD_MODNAME,
	.init = init_module,
#ifdef CONFIG_MODULE_UNLOAD
	.exit = cleanup_module,
#endif
	.arch = MODULE_ARCH_INIT,
};

MODULE_INFO(intree, "Y");

#ifdef CONFIG_RETPOLINE
MODULE_INFO(retpoline, "Y");
#endif


static const struct modversion_info ____versions[]
__used __section("__versions") = {
	{ 0x124bad4d, "kstrtobool" },
	{ 0xb024ade4, "_dev_warn" },
	{ 0xfc36bbc6, "account_locked_vm" },
	{ 0x5c3c7387, "kstrtoull" },
	{ 0xb5871d34, "dfl_feature_ioctl_get_num_irqs" },
	{ 0x1f137c20, "generic_access_phys" },
	{ 0x5b8239ca, "__x86_return_thunk" },
	{ 0x6b10bee1, "_copy_to_user" },
	{ 0xece784c2, "rb_first" },
	{ 0x2f5507b8, "__platform_driver_register" },
	{ 0x80789f3, "dfl_fpga_port_ops_add" },
	{ 0x3c3ff9fd, "sprintf" },
	{ 0x97651e6c, "vmemmap_base" },
	{ 0x35269782, "dfl_fpga_dev_feature_uinit" },
	{ 0x3213f038, "mutex_unlock" },
	{ 0x7d4412b3, "dfl_fpga_dev_ops_register" },
	{ 0xb43f9365, "ktime_get" },
	{ 0x92b38218, "boot_cpu_data" },
	{ 0xac4a1f46, "kmalloc_trace" },
	{ 0x46cf10eb, "cachemode2protval" },
	{ 0xaae013c0, "dfl_fpga_set_irq_triggers" },
	{ 0xeb233a45, "__kmalloc" },
	{ 0xe2c17b5d, "__SCT__might_resched" },
	{ 0x5b94ad75, "kmalloc_caches" },
	{ 0xd0e2bbc0, "pin_user_pages_fast" },
	{ 0x27e5df14, "dfl_fpga_port_ops_del" },
	{ 0x13c49cc2, "_copy_from_user" },
	{ 0x5bc8ba21, "devm_kmalloc" },
	{ 0x2d97b4db, "platform_driver_unregister" },
	{ 0xca9360b5, "rb_next" },
	{ 0xcae03bf, "dma_unmap_page_attrs" },
	{ 0x96848186, "scnprintf" },
	{ 0x91899483, "unpin_user_pages" },
	{ 0x6c377c81, "remap_pfn_range" },
	{ 0x37a0cba, "kfree" },
	{ 0xb8dfab9b, "dfl_fpga_dev_ops_unregister" },
	{ 0xe9c322a0, "pcpu_hot" },
	{ 0xc3055d20, "usleep_range_state" },
	{ 0xa5526619, "rb_insert_color" },
	{ 0x4ddf0d50, "__dynamic_dev_dbg" },
	{ 0xbdfb6dbb, "__fentry__" },
	{ 0x65487097, "__x86_indirect_thunk_rax" },
	{ 0x83fdeb1e, "dma_map_page_attrs" },
	{ 0xecb02a75, "dfl_fpga_dev_feature_init" },
	{ 0x2031a0ec, "devm_kfree" },
	{ 0x9040242d, "_dev_err" },
	{ 0x4dfa8d4b, "mutex_lock" },
	{ 0x4d9b652b, "rb_erase" },
	{ 0x4ee2edb2, "dfl_feature_ioctl_set_irq" },
	{ 0x7098e516, "module_layout" },
};

MODULE_INFO(depends, "dfl");