198 lines
4.9 KiB
YAML
198 lines
4.9 KiB
YAML
# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
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%YAML 1.2
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---
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$id: http://devicetree.org/schemas/clock/idt,versaclock5.yaml#
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$schema: http://devicetree.org/meta-schemas/core.yaml#
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title: IDT VersaClock 5 and 6 programmable I2C clock generators
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description: |
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The IDT VersaClock 5 and VersaClock 6 are programmable I2C
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clock generators providing from 3 to 12 output clocks.
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When referencing the provided clock in the DT using phandle and clock
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specifier, the following mapping applies:
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- 5P49V5923:
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0 -- OUT0_SEL_I2CB
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1 -- OUT1
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2 -- OUT2
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- 5P49V5933:
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0 -- OUT0_SEL_I2CB
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1 -- OUT1
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2 -- OUT4
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- other parts:
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0 -- OUT0_SEL_I2CB
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1 -- OUT1
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2 -- OUT2
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3 -- OUT3
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4 -- OUT4
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The idt,shutdown and idt,output-enable-active properties control the
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SH (en_global_shutdown) and SP bits of the Primary Source and Shutdown
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Register, respectively. Their behavior is summarized by the following
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table:
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SH SP Output when the SD/OE pin is Low/High
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== == =====================================
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0 0 Active/Inactive
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0 1 Inactive/Active
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1 0 Active/Shutdown
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1 1 Inactive/Shutdown
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The case where SH and SP are both 1 is likely not very interesting.
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maintainers:
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- Luca Ceresoli <luca.ceresoli@bootlin.com>
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properties:
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compatible:
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enum:
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- idt,5p49v5923
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- idt,5p49v5925
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- idt,5p49v5933
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- idt,5p49v5935
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- idt,5p49v60
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- idt,5p49v6901
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- idt,5p49v6965
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- idt,5p49v6975
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reg:
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description: I2C device address
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enum: [ 0x68, 0x6a ]
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'#clock-cells':
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const: 1
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clock-names:
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minItems: 1
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maxItems: 2
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items:
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enum: [ xin, clkin ]
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clocks:
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minItems: 1
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maxItems: 2
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idt,xtal-load-femtofarads:
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minimum: 9000
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maximum: 22760
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description: Optional load capacitor for XTAL1 and XTAL2
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idt,shutdown:
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$ref: /schemas/types.yaml#/definitions/uint32
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enum: [0, 1]
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description: |
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If 1, this enables the shutdown functionality: the chip will be
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shut down if the SD/OE pin is driven high. If 0, this disables the
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shutdown functionality: the chip will never be shut down based on
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the value of the SD/OE pin. This property corresponds to the SH
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bit of the Primary Source and Shutdown Register.
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idt,output-enable-active:
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$ref: /schemas/types.yaml#/definitions/uint32
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enum: [0, 1]
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description: |
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If 1, this enables output when the SD/OE pin is high, and disables
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output when the SD/OE pin is low. If 0, this disables output when
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the SD/OE pin is high, and enables output when the SD/OE pin is
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low. This corresponds to the SP bit of the Primary Source and
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Shutdown Register.
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patternProperties:
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"^OUT[1-4]$":
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type: object
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description:
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Description of one of the outputs (OUT1..OUT4). See "Clock1 Output
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Configuration" in the Versaclock 5/6/6E Family Register Description
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and Programming Guide.
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properties:
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idt,mode:
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description:
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The output drive mode. Values defined in dt-bindings/clock/versaclock.h
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$ref: /schemas/types.yaml#/definitions/uint32
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minimum: 0
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maximum: 6
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idt,voltage-microvolt:
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description: The output drive voltage.
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enum: [ 1800000, 2500000, 3300000 ]
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idt,slew-percent:
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description: The Slew rate control for CMOS single-ended.
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enum: [ 80, 85, 90, 100 ]
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additionalProperties: false
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required:
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- compatible
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- reg
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- '#clock-cells'
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- idt,shutdown
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- idt,output-enable-active
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allOf:
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- if:
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properties:
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compatible:
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enum:
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- idt,5p49v5933
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- idt,5p49v5935
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- idt,5p49v6975
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then:
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# Devices with builtin crystal + optional external input
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properties:
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clock-names:
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const: clkin
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clocks:
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maxItems: 1
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else:
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# Devices without builtin crystal
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required:
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- clock-names
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- clocks
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additionalProperties: false
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examples:
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- |
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#include <dt-bindings/clock/versaclock.h>
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/* 25MHz reference crystal */
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ref25: ref25m {
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compatible = "fixed-clock";
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#clock-cells = <0>;
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clock-frequency = <25000000>;
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};
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i2c@0 {
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reg = <0x0 0x100>;
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#address-cells = <1>;
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#size-cells = <0>;
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/* IDT 5P49V5923 I2C clock generator */
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vc5: clock-generator@6a {
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compatible = "idt,5p49v5923";
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reg = <0x6a>;
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#clock-cells = <1>;
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/* Connect XIN input to 25MHz reference */
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clocks = <&ref25m>;
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clock-names = "xin";
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/* Set the SD/OE pin's settings */
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idt,shutdown = <0>;
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idt,output-enable-active = <0>;
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OUT1 {
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idt,mode = <VC5_CMOSD>;
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idt,voltage-microvolt = <1800000>;
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idt,slew-percent = <80>;
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};
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OUT4 {
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idt,mode = <VC5_LVDS>;
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};
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};
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};
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...
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