359 lines
9.6 KiB
YAML
359 lines
9.6 KiB
YAML
# SPDX-License-Identifier: GPL-2.0-only
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%YAML 1.2
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---
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$id: http://devicetree.org/schemas/clock/qcom,mmcc.yaml#
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$schema: http://devicetree.org/meta-schemas/core.yaml#
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title: Qualcomm Multimedia Clock & Reset Controller
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maintainers:
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- Jeffrey Hugo <quic_jhugo@quicinc.com>
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- Taniya Das <tdas@codeaurora.org>
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description: |
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Qualcomm multimedia clock control module provides the clocks, resets and
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power domains.
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properties:
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compatible:
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enum:
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- qcom,mmcc-apq8064
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- qcom,mmcc-apq8084
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- qcom,mmcc-msm8226
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- qcom,mmcc-msm8660
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- qcom,mmcc-msm8960
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- qcom,mmcc-msm8974
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- qcom,mmcc-msm8992
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- qcom,mmcc-msm8994
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- qcom,mmcc-msm8996
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- qcom,mmcc-msm8998
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- qcom,mmcc-sdm630
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- qcom,mmcc-sdm660
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clocks:
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minItems: 7
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maxItems: 13
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clock-names:
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minItems: 7
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maxItems: 13
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'#clock-cells':
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const: 1
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'#reset-cells':
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const: 1
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'#power-domain-cells':
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const: 1
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reg:
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maxItems: 1
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protected-clocks:
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description:
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Protected clock specifier list as per common clock binding
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vdd-gfx-supply:
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description:
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Regulator supply for the GPU_GX GDSC
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required:
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- compatible
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- reg
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- '#clock-cells'
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- '#reset-cells'
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- '#power-domain-cells'
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additionalProperties: false
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allOf:
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- if:
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properties:
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compatible:
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contains:
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enum:
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- qcom,mmcc-apq8064
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- qcom,mmcc-msm8960
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then:
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properties:
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clocks:
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items:
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- description: Board PXO source
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- description: PLL 3 clock
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- description: PLL 3 Vote clock
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- description: DSI phy instance 1 dsi clock
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- description: DSI phy instance 1 byte clock
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- description: DSI phy instance 2 dsi clock
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- description: DSI phy instance 2 byte clock
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- description: HDMI phy PLL clock
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clock-names:
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items:
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- const: pxo
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- const: pll3
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- const: pll8_vote
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- const: dsi1pll
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- const: dsi1pllbyte
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- const: dsi2pll
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- const: dsi2pllbyte
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- const: hdmipll
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- if:
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properties:
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compatible:
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contains:
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enum:
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- qcom,mmcc-msm8226
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then:
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properties:
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clocks:
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items:
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- description: Board XO source
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- description: MMSS GPLL0 voted clock
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- description: GPLL0 voted clock
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- description: GPLL1 voted clock
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- description: GFX3D clock source
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- description: DSI phy instance 0 dsi clock
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- description: DSI phy instance 0 byte clock
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clock-names:
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items:
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- const: xo
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- const: mmss_gpll0_vote
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- const: gpll0_vote
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- const: gpll1_vote
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- const: gfx3d_clk_src
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- const: dsi0pll
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- const: dsi0pllbyte
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- if:
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properties:
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compatible:
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contains:
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enum:
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- qcom,mmcc-msm8974
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then:
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properties:
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clocks:
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items:
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- description: Board XO source
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- description: MMSS GPLL0 voted clock
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- description: GPLL0 voted clock
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- description: GPLL1 voted clock
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- description: GFX3D clock source
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- description: DSI phy instance 0 dsi clock
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- description: DSI phy instance 0 byte clock
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- description: DSI phy instance 1 dsi clock
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- description: DSI phy instance 1 byte clock
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- description: HDMI phy PLL clock
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- description: eDP phy PLL link clock
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- description: eDP phy PLL vco clock
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clock-names:
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items:
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- const: xo
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- const: mmss_gpll0_vote
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- const: gpll0_vote
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- const: gpll1_vote
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- const: gfx3d_clk_src
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- const: dsi0pll
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- const: dsi0pllbyte
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- const: dsi1pll
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- const: dsi1pllbyte
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- const: hdmipll
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- const: edp_link_clk
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- const: edp_vco_div
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- if:
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properties:
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compatible:
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contains:
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enum:
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- qcom,mmcc-apq8084
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then:
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properties:
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clocks:
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items:
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- description: Board XO source
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- description: Board sleep source
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- description: MMSS GPLL0 voted clock
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- description: GPLL0 clock
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- description: GPLL0 voted clock
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- description: GPLL1 clock
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- description: DSI phy instance 0 dsi clock
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- description: DSI phy instance 0 byte clock
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- description: DSI phy instance 1 dsi clock
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- description: DSI phy instance 1 byte clock
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- description: HDMI phy PLL clock
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- description: eDP phy PLL link clock
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- description: eDP phy PLL vco clock
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clock-names:
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items:
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- const: xo
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- const: sleep_clk
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- const: mmss_gpll0_vote
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- const: gpll0
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- const: gpll0_vote
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- const: gpll1
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- const: dsi0pll
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- const: dsi0pllbyte
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- const: dsi1pll
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- const: dsi1pllbyte
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- const: hdmipll
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- const: edp_link_clk
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- const: edp_vco_div
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- if:
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properties:
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compatible:
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contains:
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enum:
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- qcom,mmcc-msm8994
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- qcom,mmcc-msm8998
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- qcom,mmcc-sdm630
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- qcom,mmcc-sdm660
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then:
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required:
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- clocks
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- clock-names
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- if:
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properties:
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compatible:
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contains:
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const: qcom,mmcc-msm8994
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then:
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properties:
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clocks:
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items:
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- description: Board XO source
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- description: Global PLL 0 clock
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- description: MMSS NoC AHB clock
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- description: GFX3D clock
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- description: DSI phy instance 0 dsi clock
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- description: DSI phy instance 0 byte clock
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- description: DSI phy instance 1 dsi clock
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- description: DSI phy instance 1 byte clock
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- description: HDMI phy PLL clock
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clock-names:
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items:
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- const: xo
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- const: gpll0
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- const: mmssnoc_ahb
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- const: oxili_gfx3d_clk_src
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- const: dsi0pll
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- const: dsi0pllbyte
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- const: dsi1pll
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- const: dsi1pllbyte
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- const: hdmipll
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- if:
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properties:
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compatible:
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contains:
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const: qcom,mmcc-msm8996
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then:
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properties:
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clocks:
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items:
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- description: Board XO source
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- description: Global PLL 0 clock
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- description: MMSS NoC AHB clock
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- description: DSI phy instance 0 dsi clock
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- description: DSI phy instance 0 byte clock
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- description: DSI phy instance 1 dsi clock
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- description: DSI phy instance 1 byte clock
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- description: HDMI phy PLL clock
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clock-names:
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items:
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- const: xo
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- const: gpll0
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- const: gcc_mmss_noc_cfg_ahb_clk
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- const: dsi0pll
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- const: dsi0pllbyte
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- const: dsi1pll
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- const: dsi1pllbyte
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- const: hdmipll
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- if:
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properties:
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compatible:
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contains:
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const: qcom,mmcc-msm8998
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then:
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properties:
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clocks:
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items:
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- description: Board XO source
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- description: Global PLL 0 clock
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- description: DSI phy instance 0 dsi clock
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- description: DSI phy instance 0 byte clock
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- description: DSI phy instance 1 dsi clock
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- description: DSI phy instance 1 byte clock
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- description: HDMI phy PLL clock
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- description: DisplayPort phy PLL link clock
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- description: DisplayPort phy PLL vco clock
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clock-names:
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items:
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- const: xo
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- const: gpll0
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- const: dsi0dsi
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- const: dsi0byte
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- const: dsi1dsi
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- const: dsi1byte
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- const: hdmipll
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- const: dplink
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- const: dpvco
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- if:
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properties:
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compatible:
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contains:
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enum:
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- qcom,mmcc-sdm630
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- qcom,mmcc-sdm660
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then:
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properties:
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clocks:
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items:
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- description: Board XO source
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- description: Board sleep source
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- description: Global PLL 0 clock
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- description: Global PLL 0 DIV clock
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- description: DSI phy instance 0 dsi clock
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- description: DSI phy instance 0 byte clock
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- description: DSI phy instance 1 dsi clock
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- description: DSI phy instance 1 byte clock
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- description: DisplayPort phy PLL link clock
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- description: DisplayPort phy PLL vco clock
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clock-names:
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items:
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- const: xo
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- const: sleep_clk
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- const: gpll0
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- const: gpll0_div
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- const: dsi0pll
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- const: dsi0pllbyte
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- const: dsi1pll
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- const: dsi1pllbyte
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- const: dp_link_2x_clk_divsel_five
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- const: dp_vco_divided_clk_src_mux
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examples:
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# Example for MMCC for MSM8960:
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clock-controller@4000000 {
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compatible = "qcom,mmcc-msm8960";
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reg = <0x4000000 0x1000>;
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#clock-cells = <1>;
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#reset-cells = <1>;
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#power-domain-cells = <1>;
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};
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...
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