119 lines
2.4 KiB
YAML
119 lines
2.4 KiB
YAML
# SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
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# Copyright 2020 BayLibre, SAS
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%YAML 1.2
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---
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$id: http://devicetree.org/schemas/display/amlogic,meson-g12a-dw-mipi-dsi.yaml#
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$schema: http://devicetree.org/meta-schemas/core.yaml#
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title: Amlogic specific extensions to the Synopsys Designware MIPI DSI Host Controller
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maintainers:
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- Neil Armstrong <neil.armstrong@linaro.org>
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description: |
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The Amlogic Meson Synopsys Designware Integration is composed of
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- A Synopsys DesignWare MIPI DSI Host Controller IP
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- A TOP control block controlling the Clocks & Resets of the IP
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allOf:
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- $ref: dsi-controller.yaml#
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properties:
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compatible:
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enum:
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- amlogic,meson-g12a-dw-mipi-dsi
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reg:
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maxItems: 1
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clocks:
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minItems: 3
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maxItems: 4
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clock-names:
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minItems: 3
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items:
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- const: pclk
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- const: bit
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- const: px
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- const: meas
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resets:
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maxItems: 1
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reset-names:
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items:
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- const: top
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phys:
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maxItems: 1
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phy-names:
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items:
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- const: dphy
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ports:
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$ref: /schemas/graph.yaml#/properties/ports
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properties:
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port@0:
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$ref: /schemas/graph.yaml#/properties/port
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description: Input node to receive pixel data.
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port@1:
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$ref: /schemas/graph.yaml#/properties/port
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description: DSI output node to panel.
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required:
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- port@0
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- port@1
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required:
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- compatible
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- reg
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- clocks
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- clock-names
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- resets
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- reset-names
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- phys
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- phy-names
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- ports
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unevaluatedProperties: false
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examples:
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- |
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dsi@6000 {
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compatible = "amlogic,meson-g12a-dw-mipi-dsi";
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reg = <0x6000 0x400>;
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resets = <&reset_top>;
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reset-names = "top";
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clocks = <&clk_pclk>, <&bit_clk>, <&clk_px>;
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clock-names = "pclk", "bit", "px";
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phys = <&mipi_dphy>;
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phy-names = "dphy";
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ports {
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#address-cells = <1>;
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#size-cells = <0>;
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/* VPU VENC Input */
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mipi_dsi_venc_port: port@0 {
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reg = <0>;
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mipi_dsi_in: endpoint {
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remote-endpoint = <&dpi_out>;
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};
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};
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/* DSI Output */
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mipi_dsi_panel_port: port@1 {
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reg = <1>;
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mipi_out_panel: endpoint {
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remote-endpoint = <&mipi_in_panel>;
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};
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};
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};
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};
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