171 lines
3.3 KiB
YAML
171 lines
3.3 KiB
YAML
# SPDX-License-Identifier: GPL-2.0
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%YAML 1.2
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---
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$id: http://devicetree.org/schemas/display/rockchip/rockchip,lvds.yaml#
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$schema: http://devicetree.org/meta-schemas/core.yaml#
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title: Rockchip low-voltage differential signal (LVDS) transmitter
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maintainers:
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- Sandy Huang <hjc@rock-chips.com>
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- Heiko Stuebner <heiko@sntech.de>
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properties:
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compatible:
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enum:
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- rockchip,px30-lvds
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- rockchip,rk3288-lvds
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reg:
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maxItems: 1
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clocks:
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maxItems: 1
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clock-names:
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const: pclk_lvds
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avdd1v0-supply:
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description: 1.0V analog power.
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avdd1v8-supply:
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description: 1.8V analog power.
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avdd3v3-supply:
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description: 3.3V analog power.
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rockchip,grf:
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$ref: /schemas/types.yaml#/definitions/phandle
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description: Phandle to the general register files syscon.
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rockchip,output:
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$ref: /schemas/types.yaml#/definitions/string
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enum: [rgb, lvds, duallvds]
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description: This describes the output interface.
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phys:
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maxItems: 1
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phy-names:
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const: dphy
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pinctrl-names:
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const: lcdc
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pinctrl-0: true
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power-domains:
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maxItems: 1
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ports:
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$ref: /schemas/graph.yaml#/properties/ports
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properties:
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port@0:
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$ref: /schemas/graph.yaml#/properties/port
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description:
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Video port 0 for the VOP input.
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The remote endpoint maybe vopb or vopl.
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port@1:
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$ref: /schemas/graph.yaml#/properties/port
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description:
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Video port 1 for either a panel or subsequent encoder.
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required:
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- port@0
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- port@1
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required:
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- compatible
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- rockchip,grf
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- rockchip,output
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- ports
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allOf:
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- if:
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properties:
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compatible:
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contains:
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const: rockchip,px30-lvds
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then:
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properties:
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reg: false
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clocks: false
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clock-names: false
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avdd1v0-supply: false
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avdd1v8-supply: false
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avdd3v3-supply: false
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required:
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- phys
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- phy-names
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- if:
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properties:
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compatible:
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contains:
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const: rockchip,rk3288-lvds
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then:
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properties:
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phys: false
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phy-names: false
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required:
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- reg
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- clocks
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- clock-names
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- avdd1v0-supply
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- avdd1v8-supply
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- avdd3v3-supply
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additionalProperties: false
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examples:
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- |
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#include <dt-bindings/clock/rk3288-cru.h>
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lvds: lvds@ff96c000 {
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compatible = "rockchip,rk3288-lvds";
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reg = <0xff96c000 0x4000>;
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clocks = <&cru PCLK_LVDS_PHY>;
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clock-names = "pclk_lvds";
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avdd1v0-supply = <&vdd10_lcd>;
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avdd1v8-supply = <&vcc18_lcd>;
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avdd3v3-supply = <&vcca_33>;
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pinctrl-names = "lcdc";
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pinctrl-0 = <&lcdc_ctl>;
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rockchip,grf = <&grf>;
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rockchip,output = "rgb";
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ports {
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#address-cells = <1>;
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#size-cells = <0>;
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lvds_in: port@0 {
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reg = <0>;
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#address-cells = <1>;
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#size-cells = <0>;
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lvds_in_vopb: endpoint@0 {
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reg = <0>;
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remote-endpoint = <&vopb_out_lvds>;
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};
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lvds_in_vopl: endpoint@1 {
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reg = <1>;
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remote-endpoint = <&vopl_out_lvds>;
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};
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};
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lvds_out: port@1 {
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reg = <1>;
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lvds_out_panel: endpoint {
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remote-endpoint = <&panel_in_lvds>;
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};
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};
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};
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};
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