90 lines
1.8 KiB
YAML
90 lines
1.8 KiB
YAML
# SPDX-License-Identifier: GPL-2.0 OR BSD-2-Clause
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%YAML 1.2
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---
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$id: http://devicetree.org/schemas/i2c/qcom,i2c-qup.yaml#
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$schema: http://devicetree.org/meta-schemas/core.yaml#
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title: Qualcomm Universal Peripheral (QUP) I2C controller
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maintainers:
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- Andy Gross <agross@kernel.org>
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- Bjorn Andersson <bjorn.andersson@linaro.org>
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- Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
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allOf:
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- $ref: /schemas/i2c/i2c-controller.yaml#
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properties:
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compatible:
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enum:
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- qcom,i2c-qup-v1.1.1 # for 8660, 8960 and 8064
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- qcom,i2c-qup-v2.1.1 # for 8974 v1
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- qcom,i2c-qup-v2.2.1 # for 8974 v2 and later
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clocks:
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maxItems: 2
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clock-names:
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items:
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- const: core
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- const: iface
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clock-frequency:
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default: 100000
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dmas:
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maxItems: 2
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dma-names:
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items:
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- const: tx
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- const: rx
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interrupts:
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maxItems: 1
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pinctrl-0: true
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pinctrl-1: true
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pinctrl-names:
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minItems: 1
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items:
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- const: default
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- const: sleep
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reg:
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maxItems: 1
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required:
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- compatible
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- clock-names
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- clocks
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- interrupts
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- reg
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unevaluatedProperties: false
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examples:
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- |
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#include <dt-bindings/clock/qcom,gcc-msm8998.h>
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#include <dt-bindings/interrupt-controller/arm-gic.h>
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i2c@c175000 {
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compatible = "qcom,i2c-qup-v2.2.1";
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reg = <0x0c175000 0x600>;
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interrupts = <GIC_SPI 95 IRQ_TYPE_LEVEL_HIGH>;
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clocks = <&gcc GCC_BLSP1_QUP1_I2C_APPS_CLK>,
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<&gcc GCC_BLSP1_AHB_CLK>;
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clock-names = "core", "iface";
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dmas = <&blsp1_dma 6>, <&blsp1_dma 7>;
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dma-names = "tx", "rx";
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pinctrl-names = "default", "sleep";
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pinctrl-0 = <&blsp1_i2c1_default>;
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pinctrl-1 = <&blsp1_i2c1_sleep>;
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clock-frequency = <400000>;
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#address-cells = <1>;
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#size-cells = <0>;
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};
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