156 lines
3.1 KiB
YAML
156 lines
3.1 KiB
YAML
# SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
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%YAML 1.2
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---
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$id: http://devicetree.org/schemas/phy/qcom,sc8280xp-qmp-usb3-uni-phy.yaml#
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$schema: http://devicetree.org/meta-schemas/core.yaml#
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title: Qualcomm QMP PHY controller (USB, SC8280XP)
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maintainers:
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- Vinod Koul <vkoul@kernel.org>
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description:
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The QMP PHY controller supports physical layer functionality for a number of
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controllers on Qualcomm chipsets, such as, PCIe, UFS, and USB.
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properties:
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compatible:
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enum:
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- qcom,ipq9574-qmp-usb3-phy
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- qcom,qcm2290-qmp-usb3-phy
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- qcom,sa8775p-qmp-usb3-uni-phy
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- qcom,sc8280xp-qmp-usb3-uni-phy
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- qcom,sm6115-qmp-usb3-phy
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reg:
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maxItems: 1
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clocks:
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maxItems: 4
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clock-names:
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maxItems: 4
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power-domains:
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maxItems: 1
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resets:
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maxItems: 2
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reset-names:
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items:
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- const: phy
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- const: phy_phy
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vdda-phy-supply: true
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vdda-pll-supply: true
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"#clock-cells":
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const: 0
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clock-output-names:
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maxItems: 1
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"#phy-cells":
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const: 0
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required:
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- compatible
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- reg
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- clocks
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- clock-names
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- resets
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- reset-names
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- vdda-phy-supply
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- vdda-pll-supply
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- "#clock-cells"
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- clock-output-names
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- "#phy-cells"
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allOf:
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- if:
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properties:
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compatible:
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contains:
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enum:
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- qcom,ipq9574-qmp-usb3-phy
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then:
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properties:
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clock-names:
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items:
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- const: aux
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- const: ref
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- const: cfg_ahb
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- const: pipe
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- if:
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properties:
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compatible:
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contains:
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enum:
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- qcom,qcm2290-qmp-usb3-phy
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- qcom,sm6115-qmp-usb3-phy
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then:
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properties:
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clocks:
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maxItems: 4
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clock-names:
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items:
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- const: cfg_ahb
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- const: ref
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- const: com_aux
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- const: pipe
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- if:
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properties:
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compatible:
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contains:
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enum:
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- qcom,sa8775p-qmp-usb3-uni-phy
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- qcom,sc8280xp-qmp-usb3-uni-phy
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then:
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properties:
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clocks:
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maxItems: 4
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clock-names:
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items:
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- const: aux
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- const: ref
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- const: com_aux
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- const: pipe
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required:
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- power-domains
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additionalProperties: false
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examples:
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- |
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#include <dt-bindings/clock/qcom,gcc-sc8280xp.h>
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#include <dt-bindings/clock/qcom,rpmh.h>
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phy@88ef000 {
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compatible = "qcom,sc8280xp-qmp-usb3-uni-phy";
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reg = <0x088ef000 0x2000>;
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clocks = <&gcc GCC_USB3_MP_PHY_AUX_CLK>,
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<&gcc GCC_USB3_MP0_CLKREF_CLK>,
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<&gcc GCC_USB3_MP_PHY_COM_AUX_CLK>,
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<&gcc GCC_USB3_MP_PHY_PIPE_0_CLK>;
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clock-names = "aux", "ref", "com_aux", "pipe";
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power-domains = <&gcc USB30_MP_GDSC>;
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resets = <&gcc GCC_USB3_UNIPHY_MP0_BCR>,
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<&gcc GCC_USB3UNIPHY_PHY_MP0_BCR>;
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reset-names = "phy", "phy_phy";
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vdda-phy-supply = <&vreg_l3a>;
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vdda-pll-supply = <&vreg_l5a>;
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#clock-cells = <0>;
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clock-output-names = "usb2_phy0_pipe_clk";
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#phy-cells = <0>;
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};
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