364 lines
6.6 KiB
Plaintext
364 lines
6.6 KiB
Plaintext
// SPDX-License-Identifier: GPL-2.0+
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/*
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* Copyright (C) 2020 Marvell International Ltd.
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*/
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#include "cn9130.dtsi" /* include SoC device tree */
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#include <dt-bindings/gpio/gpio.h>
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/ {
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chosen {
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stdout-path = "serial0:115200n8";
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};
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aliases {
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i2c0 = &cp0_i2c0;
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ethernet0 = &cp0_eth0;
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ethernet1 = &cp0_eth1;
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ethernet2 = &cp0_eth2;
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gpio1 = &cp0_gpio1;
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gpio2 = &cp0_gpio2;
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};
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memory@0 {
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device_type = "memory";
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reg = <0x0 0x0 0x0 0x80000000>;
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};
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ap0_reg_mmc_vccq: ap0_mmc_vccq@0 {
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compatible = "regulator-gpio";
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regulator-name = "ap0_mmc_vccq";
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regulator-min-microvolt = <1800000>;
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regulator-max-microvolt = <3300000>;
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gpios = <&expander0 5 GPIO_ACTIVE_HIGH>;
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states = <1800000 0x1
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3300000 0x0>;
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};
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cp0_reg_usb3_vbus1: cp0_usb3_vbus@1 {
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compatible = "regulator-fixed";
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regulator-name = "cp0-xhci1-vbus";
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regulator-min-microvolt = <5000000>;
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regulator-max-microvolt = <5000000>;
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enable-active-high;
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gpio = <&expander0 8 GPIO_ACTIVE_HIGH>;
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};
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cp0_usb3_0_phy0: cp0_usb3_phy0 {
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compatible = "usb-nop-xceiv";
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};
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cp0_usb3_0_phy1: cp0_usb3_phy1 {
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compatible = "usb-nop-xceiv";
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vcc-supply = <&cp0_reg_usb3_vbus1>;
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};
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cp0_reg_sd_vccq: cp0_sd_vccq@0 {
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compatible = "regulator-gpio";
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regulator-name = "cp0_sd_vccq";
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regulator-min-microvolt = <1800000>;
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regulator-max-microvolt = <3300000>;
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gpios = <&cp0_gpio2 18 GPIO_ACTIVE_HIGH>;
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states = <1800000 0x1
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3300000 0x0>;
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};
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cp0_reg_sd_vcc: cp0_sd_vcc@0 {
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compatible = "regulator-fixed";
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regulator-name = "cp0_sd_vcc";
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regulator-min-microvolt = <3300000>;
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regulator-max-microvolt = <3300000>;
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gpio = <&cp0_gpio2 19 GPIO_ACTIVE_HIGH>;
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enable-active-high;
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regulator-always-on;
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};
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sfp: sfp {
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compatible = "sff,sfp";
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i2c-bus = <&cp0_i2c1>;
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mod-def0-gpios = <&expander0 3 GPIO_ACTIVE_LOW>;
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los-gpios = <&expander0 15 GPIO_ACTIVE_HIGH>;
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tx-disable-gpios = <&expander0 2 GPIO_ACTIVE_HIGH>;
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tx-fault-gpios = <&cp0_gpio1 24 GPIO_ACTIVE_HIGH>;
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maximum-power-milliwatt = <3000>;
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status = "okay";
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};
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};
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&uart0 {
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status = "okay";
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};
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/* on-board eMMC U6 */
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&ap_sdhci0 {
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pinctrl-names = "default";
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bus-width = <8>;
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status = "okay";
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mmc-ddr-1_8v;
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vqmmc-supply = <&ap0_reg_mmc_vccq>;
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};
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&cp0_syscon0 {
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cp0_pinctrl: pinctrl {
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compatible = "marvell,cp115-standalone-pinctrl";
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cp0_i2c0_pins: cp0-i2c-pins-0 {
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marvell,pins = "mpp37", "mpp38";
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marvell,function = "i2c0";
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};
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cp0_i2c1_pins: cp0-i2c-pins-1 {
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marvell,pins = "mpp35", "mpp36";
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marvell,function = "i2c1";
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};
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cp0_sdhci_cd_pins_crb: cp0-sdhci-cd-pins-crb {
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marvell,pins = "mpp55";
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marvell,function = "gpio";
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};
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cp0_sdhci_pins: cp0-sdhi-pins-0 {
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marvell,pins = "mpp56", "mpp57", "mpp58",
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"mpp59", "mpp60", "mpp61";
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marvell,function = "sdio";
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};
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cp0_spi0_pins: cp0-spi-pins-0 {
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marvell,pins = "mpp13", "mpp14", "mpp15", "mpp16";
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marvell,function = "spi1";
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};
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};
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};
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&cp0_gpio1 {
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status = "okay";
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};
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&cp0_gpio2 {
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status = "okay";
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};
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&cp0_i2c0 {
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pinctrl-names = "default";
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pinctrl-0 = <&cp0_i2c0_pins>;
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status = "okay";
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clock-frequency = <100000>;
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expander0: mcp23x17@20 {
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compatible = "microchip,mcp23017";
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gpio-controller;
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#gpio-cells = <2>;
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reg = <0x20>;
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status = "okay";
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};
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};
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&cp0_i2c1 {
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pinctrl-names = "default";
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pinctrl-0 = <&cp0_i2c1_pins>;
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clock-frequency = <100000>;
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status = "okay";
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};
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&cp0_sdhci0 {
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pinctrl-names = "default";
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pinctrl-0 = <&cp0_sdhci_pins
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&cp0_sdhci_cd_pins_crb>;
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bus-width = <4>;
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cd-gpios = <&cp0_gpio2 23 GPIO_ACTIVE_HIGH>;
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vqmmc-supply = <&cp0_reg_sd_vccq>;
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vmmc-supply = <&cp0_reg_sd_vcc>;
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status = "okay";
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};
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&cp0_spi1 {
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pinctrl-names = "default";
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pinctrl-0 = <&cp0_spi0_pins>;
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reg = <0x700680 0x50>, /* control */
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<0x2000000 0x1000000>; /* CS0 */
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status = "okay";
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flash@0 {
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#address-cells = <0x1>;
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#size-cells = <0x1>;
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compatible = "jedec,spi-nor";
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reg = <0x0>;
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/* On-board MUX does not allow higher frequencies */
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spi-max-frequency = <40000000>;
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partitions {
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compatible = "fixed-partitions";
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#address-cells = <1>;
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#size-cells = <1>;
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partition@0 {
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label = "U-Boot";
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reg = <0x0 0x200000>;
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};
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partition@400000 {
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label = "Filesystem";
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reg = <0x200000 0xe00000>;
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};
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};
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};
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};
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&cp0_mdio {
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status = "okay";
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phy0: ethernet-phy@0 {
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reg = <0>;
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};
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switch6: switch0@6 {
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/* Actual device is MV88E6393X */
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compatible = "marvell,mv88e6190";
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#address-cells = <1>;
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#size-cells = <0>;
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reg = <6>;
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interrupt-parent = <&cp0_gpio1>;
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interrupts = <28 IRQ_TYPE_LEVEL_LOW>;
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interrupt-controller;
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#interrupt-cells = <2>;
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dsa,member = <0 0>;
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ports {
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#address-cells = <1>;
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#size-cells = <0>;
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port@1 {
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reg = <1>;
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label = "p1";
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phy-handle = <&switch0phy1>;
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};
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port@2 {
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reg = <2>;
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label = "p2";
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phy-handle = <&switch0phy2>;
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};
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port@3 {
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reg = <3>;
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label = "p3";
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phy-handle = <&switch0phy3>;
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};
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port@4 {
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reg = <4>;
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label = "p4";
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phy-handle = <&switch0phy4>;
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};
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port@5 {
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reg = <5>;
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label = "p5";
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phy-handle = <&switch0phy5>;
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};
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port@6 {
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reg = <6>;
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label = "p6";
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phy-handle = <&switch0phy6>;
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};
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port@7 {
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reg = <7>;
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label = "p7";
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phy-handle = <&switch0phy7>;
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};
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port@8 {
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reg = <8>;
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label = "p8";
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phy-handle = <&switch0phy8>;
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};
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port@9 {
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reg = <9>;
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label = "p9";
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phy-mode = "10gbase-r";
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sfp = <&sfp>;
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managed = "in-band-status";
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};
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port@a {
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reg = <10>;
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ethernet = <&cp0_eth0>;
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phy-mode = "10gbase-r";
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managed = "in-band-status";
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};
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};
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mdio {
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#address-cells = <1>;
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#size-cells = <0>;
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switch0phy1: switch0phy1@1 {
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reg = <0x1>;
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};
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switch0phy2: switch0phy2@2 {
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reg = <0x2>;
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};
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switch0phy3: switch0phy3@3 {
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reg = <0x3>;
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};
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switch0phy4: switch0phy4@4 {
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reg = <0x4>;
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};
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switch0phy5: switch0phy5@5 {
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reg = <0x5>;
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};
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switch0phy6: switch0phy6@6 {
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reg = <0x6>;
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};
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switch0phy7: switch0phy7@7 {
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reg = <0x7>;
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};
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switch0phy8: switch0phy8@8 {
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reg = <0x8>;
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};
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};
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};
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};
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&cp0_xmdio {
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status = "okay";
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nbaset_phy0: ethernet-phy@0 {
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compatible = "ethernet-phy-ieee802.3-c45";
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reg = <0>;
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};
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};
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&cp0_ethernet {
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status = "okay";
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};
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&cp0_eth0 {
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/* This port is connected to 88E6393X switch */
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status = "okay";
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phy-mode = "10gbase-r";
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managed = "in-band-status";
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phys = <&cp0_comphy4 0>;
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};
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&cp0_eth1 {
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status = "okay";
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phy = <&phy0>;
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phy-mode = "rgmii-id";
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};
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&cp0_eth2 {
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/* This port uses "2500base-t" phy-mode */
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status = "disabled";
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phy = <&nbaset_phy0>;
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phys = <&cp0_comphy5 2>;
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};
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