163 lines
5.5 KiB
C
163 lines
5.5 KiB
C
/* Generic MTRR (Memory Type Range Register) ioctls.
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Copyright (C) 1997-1999 Richard Gooch
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This library is free software; you can redistribute it and/or
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modify it under the terms of the GNU Library General Public
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License as published by the Free Software Foundation; either
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version 2 of the License, or (at your option) any later version.
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This library is distributed in the hope that it will be useful,
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but WITHOUT ANY WARRANTY; without even the implied warranty of
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MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
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Library General Public License for more details.
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You should have received a copy of the GNU Library General Public
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License along with this library; if not, write to the Free
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Software Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
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Richard Gooch may be reached by email at rgooch@atnf.csiro.au
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The postal address is:
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Richard Gooch, c/o ATNF, P. O. Box 76, Epping, N.S.W., 2121, Australia.
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*/
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#ifndef _ASM_X86_MTRR_H
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#define _ASM_X86_MTRR_H
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#include <linux/bits.h>
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#include <uapi/asm/mtrr.h>
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/* Defines for hardware MTRR registers. */
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#define MTRR_CAP_VCNT GENMASK(7, 0)
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#define MTRR_CAP_FIX BIT_MASK(8)
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#define MTRR_CAP_WC BIT_MASK(10)
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#define MTRR_DEF_TYPE_TYPE GENMASK(7, 0)
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#define MTRR_DEF_TYPE_FE BIT_MASK(10)
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#define MTRR_DEF_TYPE_E BIT_MASK(11)
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#define MTRR_DEF_TYPE_ENABLE (MTRR_DEF_TYPE_FE | MTRR_DEF_TYPE_E)
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#define MTRR_DEF_TYPE_DISABLE ~(MTRR_DEF_TYPE_TYPE | MTRR_DEF_TYPE_ENABLE)
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#define MTRR_PHYSBASE_TYPE GENMASK(7, 0)
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#define MTRR_PHYSBASE_RSVD GENMASK(11, 8)
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#define MTRR_PHYSMASK_RSVD GENMASK(10, 0)
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#define MTRR_PHYSMASK_V BIT_MASK(11)
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struct mtrr_state_type {
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struct mtrr_var_range var_ranges[MTRR_MAX_VAR_RANGES];
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mtrr_type fixed_ranges[MTRR_NUM_FIXED_RANGES];
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unsigned char enabled;
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bool have_fixed;
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mtrr_type def_type;
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};
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/*
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* The following functions are for use by other drivers that cannot use
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* arch_phys_wc_add and arch_phys_wc_del.
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*/
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# ifdef CONFIG_MTRR
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void mtrr_bp_init(void);
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void mtrr_overwrite_state(struct mtrr_var_range *var, unsigned int num_var,
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mtrr_type def_type);
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extern u8 mtrr_type_lookup(u64 addr, u64 end, u8 *uniform);
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extern void mtrr_save_fixed_ranges(void *);
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extern void mtrr_save_state(void);
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extern int mtrr_add(unsigned long base, unsigned long size,
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unsigned int type, bool increment);
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extern int mtrr_add_page(unsigned long base, unsigned long size,
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unsigned int type, bool increment);
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extern int mtrr_del(int reg, unsigned long base, unsigned long size);
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extern int mtrr_del_page(int reg, unsigned long base, unsigned long size);
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extern void mtrr_bp_restore(void);
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extern int mtrr_trim_uncached_memory(unsigned long end_pfn);
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extern int amd_special_default_mtrr(void);
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void mtrr_disable(void);
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void mtrr_enable(void);
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void mtrr_generic_set_state(void);
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# else
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static inline void mtrr_overwrite_state(struct mtrr_var_range *var,
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unsigned int num_var,
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mtrr_type def_type)
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{
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}
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static inline u8 mtrr_type_lookup(u64 addr, u64 end, u8 *uniform)
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{
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/*
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* Return the default MTRR type, without any known other types in
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* that range.
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*/
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*uniform = 1;
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return MTRR_TYPE_UNCACHABLE;
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}
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#define mtrr_save_fixed_ranges(arg) do {} while (0)
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#define mtrr_save_state() do {} while (0)
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static inline int mtrr_add(unsigned long base, unsigned long size,
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unsigned int type, bool increment)
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{
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return -ENODEV;
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}
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static inline int mtrr_add_page(unsigned long base, unsigned long size,
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unsigned int type, bool increment)
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{
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return -ENODEV;
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}
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static inline int mtrr_del(int reg, unsigned long base, unsigned long size)
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{
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return -ENODEV;
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}
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static inline int mtrr_del_page(int reg, unsigned long base, unsigned long size)
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{
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return -ENODEV;
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}
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static inline int mtrr_trim_uncached_memory(unsigned long end_pfn)
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{
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return 0;
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}
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#define mtrr_bp_init() do {} while (0)
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#define mtrr_bp_restore() do {} while (0)
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#define mtrr_disable() do {} while (0)
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#define mtrr_enable() do {} while (0)
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#define mtrr_generic_set_state() do {} while (0)
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# endif
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#ifdef CONFIG_COMPAT
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#include <linux/compat.h>
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struct mtrr_sentry32 {
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compat_ulong_t base; /* Base address */
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compat_uint_t size; /* Size of region */
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compat_uint_t type; /* Type of region */
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};
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struct mtrr_gentry32 {
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compat_ulong_t regnum; /* Register number */
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compat_uint_t base; /* Base address */
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compat_uint_t size; /* Size of region */
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compat_uint_t type; /* Type of region */
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};
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#define MTRR_IOCTL_BASE 'M'
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#define MTRRIOC32_ADD_ENTRY _IOW(MTRR_IOCTL_BASE, 0, struct mtrr_sentry32)
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#define MTRRIOC32_SET_ENTRY _IOW(MTRR_IOCTL_BASE, 1, struct mtrr_sentry32)
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#define MTRRIOC32_DEL_ENTRY _IOW(MTRR_IOCTL_BASE, 2, struct mtrr_sentry32)
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#define MTRRIOC32_GET_ENTRY _IOWR(MTRR_IOCTL_BASE, 3, struct mtrr_gentry32)
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#define MTRRIOC32_KILL_ENTRY _IOW(MTRR_IOCTL_BASE, 4, struct mtrr_sentry32)
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#define MTRRIOC32_ADD_PAGE_ENTRY _IOW(MTRR_IOCTL_BASE, 5, struct mtrr_sentry32)
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#define MTRRIOC32_SET_PAGE_ENTRY _IOW(MTRR_IOCTL_BASE, 6, struct mtrr_sentry32)
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#define MTRRIOC32_DEL_PAGE_ENTRY _IOW(MTRR_IOCTL_BASE, 7, struct mtrr_sentry32)
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#define MTRRIOC32_GET_PAGE_ENTRY _IOWR(MTRR_IOCTL_BASE, 8, struct mtrr_gentry32)
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#define MTRRIOC32_KILL_PAGE_ENTRY \
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_IOW(MTRR_IOCTL_BASE, 9, struct mtrr_sentry32)
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#endif /* CONFIG_COMPAT */
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/* Bit fields for enabled in struct mtrr_state_type */
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#define MTRR_STATE_SHIFT 10
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#define MTRR_STATE_MTRR_FIXED_ENABLED (MTRR_DEF_TYPE_FE >> MTRR_STATE_SHIFT)
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#define MTRR_STATE_MTRR_ENABLED (MTRR_DEF_TYPE_E >> MTRR_STATE_SHIFT)
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#endif /* _ASM_X86_MTRR_H */
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