640 lines
38 KiB
C
640 lines
38 KiB
C
// SPDX-License-Identifier: GPL-2.0
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/*
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* Copyright 2018-2019 NXP.
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*/
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#include <dt-bindings/clock/imx8mn-clock.h>
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#include <linux/clk-provider.h>
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#include <linux/err.h>
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#include <linux/io.h>
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#include <linux/module.h>
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#include <linux/of_address.h>
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#include <linux/platform_device.h>
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#include <linux/slab.h>
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#include <linux/types.h>
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#include "clk.h"
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static u32 share_count_sai2;
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static u32 share_count_sai3;
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static u32 share_count_sai5;
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static u32 share_count_sai6;
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static u32 share_count_sai7;
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static u32 share_count_disp;
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static u32 share_count_pdm;
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static u32 share_count_nand;
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static const char * const pll_ref_sels[] = { "osc_24m", "dummy", "dummy", "dummy", };
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static const char * const audio_pll1_bypass_sels[] = {"audio_pll1", "audio_pll1_ref_sel", };
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static const char * const audio_pll2_bypass_sels[] = {"audio_pll2", "audio_pll2_ref_sel", };
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static const char * const video_pll_bypass_sels[] = {"video_pll", "video_pll_ref_sel", };
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static const char * const dram_pll_bypass_sels[] = {"dram_pll", "dram_pll_ref_sel", };
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static const char * const gpu_pll_bypass_sels[] = {"gpu_pll", "gpu_pll_ref_sel", };
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static const char * const m7_alt_pll_bypass_sels[] = {"m7_alt_pll", "m7_alt_pll_ref_sel", };
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static const char * const arm_pll_bypass_sels[] = {"arm_pll", "arm_pll_ref_sel", };
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static const char * const sys_pll3_bypass_sels[] = {"sys_pll3", "sys_pll3_ref_sel", };
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static const char * const imx8mn_a53_sels[] = {"osc_24m", "arm_pll_out", "sys_pll2_500m",
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"sys_pll2_1000m", "sys_pll1_800m", "sys_pll1_400m",
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"audio_pll1_out", "sys_pll3_out", };
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static const char * const imx8mn_a53_core_sels[] = {"arm_a53_div", "arm_pll_out", };
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static const char * const imx8mn_m7_sels[] = {"osc_24m", "sys_pll2_200m", "sys_pll2_250m", "m7_alt_pll_out",
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"sys_pll1_800m", "audio_pll1_out", "video_pll_out", "sys_pll3_out", };
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static const char * const imx8mn_gpu_core_sels[] = {"osc_24m", "gpu_pll_out", "sys_pll1_800m",
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"sys_pll3_out", "sys_pll2_1000m", "audio_pll1_out",
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"video_pll_out", "audio_pll2_out", };
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static const char * const imx8mn_gpu_shader_sels[] = {"osc_24m", "gpu_pll_out", "sys_pll1_800m",
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"sys_pll3_out", "sys_pll2_1000m", "audio_pll1_out",
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"video_pll_out", "audio_pll2_out", };
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static const char * const imx8mn_main_axi_sels[] = {"osc_24m", "sys_pll2_333m", "sys_pll1_800m",
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"sys_pll2_250m", "sys_pll2_1000m", "audio_pll1_out",
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"video_pll_out", "sys_pll1_100m",};
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static const char * const imx8mn_enet_axi_sels[] = {"osc_24m", "sys_pll1_266m", "sys_pll1_800m",
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"sys_pll2_250m", "sys_pll2_200m", "audio_pll1_out",
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"video_pll_out", "sys_pll3_out", };
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static const char * const imx8mn_nand_usdhc_sels[] = {"osc_24m", "sys_pll1_266m", "sys_pll1_800m",
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"sys_pll2_200m", "sys_pll1_133m", "sys_pll3_out",
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"sys_pll2_250m", "audio_pll1_out", };
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static const char * const imx8mn_disp_axi_sels[] = {"osc_24m", "sys_pll2_1000m", "sys_pll1_800m",
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"sys_pll3_out", "sys_pll1_40m", "audio_pll2_out",
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"clk_ext1", "clk_ext4", };
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static const char * const imx8mn_disp_apb_sels[] = {"osc_24m", "sys_pll2_125m", "sys_pll1_800m",
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"sys_pll3_out", "sys_pll1_40m", "audio_pll2_out",
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"clk_ext1", "clk_ext3", };
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static const char * const imx8mn_usb_bus_sels[] = {"osc_24m", "sys_pll2_500m", "sys_pll1_800m",
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"sys_pll2_100m", "sys_pll2_200m", "clk_ext2",
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"clk_ext4", "audio_pll2_out", };
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static const char * const imx8mn_gpu_axi_sels[] = {"osc_24m", "sys_pll1_800m", "gpu_pll_out",
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"sys_pll3_out", "sys_pll2_1000m", "audio_pll1_out",
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"video_pll_out", "audio_pll2_out", };
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static const char * const imx8mn_gpu_ahb_sels[] = {"osc_24m", "sys_pll1_800m", "gpu_pll_out",
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"sys_pll3_out", "sys_pll2_1000m", "audio_pll1_out",
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"video_pll_out", "audio_pll2_out", };
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static const char * const imx8mn_noc_sels[] = {"osc_24m", "sys_pll1_800m", "sys_pll3_out",
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"sys_pll2_1000m", "sys_pll2_500m", "audio_pll1_out",
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"video_pll_out", "audio_pll2_out", };
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static const char * const imx8mn_ahb_sels[] = {"osc_24m", "sys_pll1_133m", "sys_pll1_800m",
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"sys_pll1_400m", "sys_pll2_125m", "sys_pll3_out",
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"audio_pll1_out", "video_pll_out", };
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static const char * const imx8mn_audio_ahb_sels[] = {"osc_24m", "sys_pll2_500m", "sys_pll1_800m",
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"sys_pll2_1000m", "sys_pll2_166m", "sys_pll3_out",
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"audio_pll1_out", "video_pll_out", };
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static const char * const imx8mn_dram_alt_sels[] = {"osc_24m", "sys_pll1_800m", "sys_pll1_100m",
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"sys_pll2_500m", "sys_pll2_1000m", "sys_pll3_out",
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"audio_pll1_out", "sys_pll1_266m", };
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static const char * const imx8mn_dram_apb_sels[] = {"osc_24m", "sys_pll2_200m", "sys_pll1_40m",
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"sys_pll1_160m", "sys_pll1_800m", "sys_pll3_out",
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"sys_pll2_250m", "audio_pll2_out", };
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static const char * const imx8mn_disp_pixel_sels[] = {"osc_24m", "video_pll_out", "audio_pll2_out",
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"audio_pll1_out", "sys_pll1_800m", "sys_pll2_1000m",
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"sys_pll3_out", "clk_ext4", };
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static const char * const imx8mn_sai2_sels[] = {"osc_24m", "audio_pll1_out", "audio_pll2_out",
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"video_pll_out", "sys_pll1_133m", "dummy",
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"clk_ext2", "clk_ext3", };
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static const char * const imx8mn_sai3_sels[] = {"osc_24m", "audio_pll1_out", "audio_pll2_out",
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"video_pll_out", "sys_pll1_133m", "dummy",
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"clk_ext3", "clk_ext4", };
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static const char * const imx8mn_sai5_sels[] = {"osc_24m", "audio_pll1_out", "audio_pll2_out",
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"video_pll_out", "sys_pll1_133m", "dummy",
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"clk_ext2", "clk_ext3", };
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static const char * const imx8mn_sai6_sels[] = {"osc_24m", "audio_pll1_out", "audio_pll2_out",
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"video_pll_out", "sys_pll1_133m", "dummy",
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"clk_ext3", "clk_ext4", };
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static const char * const imx8mn_sai7_sels[] = {"osc_24m", "audio_pll1_out", "audio_pll2_out",
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"video_pll_out", "sys_pll1_133m", "dummy",
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"clk_ext3", "clk_ext4", };
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static const char * const imx8mn_spdif1_sels[] = {"osc_24m", "audio_pll1_out", "audio_pll2_out",
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"video_pll_out", "sys_pll1_133m", "dummy",
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"clk_ext2", "clk_ext3", };
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static const char * const imx8mn_enet_ref_sels[] = {"osc_24m", "sys_pll2_125m", "sys_pll2_50m",
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"sys_pll2_100m", "sys_pll1_160m", "audio_pll1_out",
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"video_pll_out", "clk_ext4", };
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static const char * const imx8mn_enet_timer_sels[] = {"osc_24m", "sys_pll2_100m", "audio_pll1_out",
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"clk_ext1", "clk_ext2", "clk_ext3",
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"clk_ext4", "video_pll_out", };
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static const char * const imx8mn_enet_phy_sels[] = {"osc_24m", "sys_pll2_50m", "sys_pll2_125m",
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"sys_pll2_200m", "sys_pll2_500m", "audio_pll1_out",
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"video_pll_out", "audio_pll2_out", };
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static const char * const imx8mn_nand_sels[] = {"osc_24m", "sys_pll2_500m", "audio_pll1_out",
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"sys_pll1_400m", "audio_pll2_out", "sys_pll3_out",
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"sys_pll2_250m", "video_pll_out", };
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static const char * const imx8mn_qspi_sels[] = {"osc_24m", "sys_pll1_400m", "sys_pll2_333m",
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"sys_pll2_500m", "audio_pll2_out", "sys_pll1_266m",
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"sys_pll3_out", "sys_pll1_100m", };
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static const char * const imx8mn_usdhc1_sels[] = {"osc_24m", "sys_pll1_400m", "sys_pll1_800m",
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"sys_pll2_500m", "sys_pll3_out", "sys_pll1_266m",
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"audio_pll2_out", "sys_pll1_100m", };
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static const char * const imx8mn_usdhc2_sels[] = {"osc_24m", "sys_pll1_400m", "sys_pll1_800m",
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"sys_pll2_500m", "sys_pll3_out", "sys_pll1_266m",
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"audio_pll2_out", "sys_pll1_100m", };
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static const char * const imx8mn_i2c1_sels[] = {"osc_24m", "sys_pll1_160m", "sys_pll2_50m",
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"sys_pll3_out", "audio_pll1_out", "video_pll_out",
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"audio_pll2_out", "sys_pll1_133m", };
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static const char * const imx8mn_i2c2_sels[] = {"osc_24m", "sys_pll1_160m", "sys_pll2_50m",
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"sys_pll3_out", "audio_pll1_out", "video_pll_out",
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"audio_pll2_out", "sys_pll1_133m", };
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static const char * const imx8mn_i2c3_sels[] = {"osc_24m", "sys_pll1_160m", "sys_pll2_50m",
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"sys_pll3_out", "audio_pll1_out", "video_pll_out",
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"audio_pll2_out", "sys_pll1_133m", };
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static const char * const imx8mn_i2c4_sels[] = {"osc_24m", "sys_pll1_160m", "sys_pll2_50m",
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"sys_pll3_out", "audio_pll1_out", "video_pll_out",
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"audio_pll2_out", "sys_pll1_133m", };
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static const char * const imx8mn_uart1_sels[] = {"osc_24m", "sys_pll1_80m", "sys_pll2_200m",
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"sys_pll2_100m", "sys_pll3_out", "clk_ext2",
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"clk_ext4", "audio_pll2_out", };
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static const char * const imx8mn_uart2_sels[] = {"osc_24m", "sys_pll1_80m", "sys_pll2_200m",
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"sys_pll2_100m", "sys_pll3_out", "clk_ext2",
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"clk_ext3", "audio_pll2_out", };
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static const char * const imx8mn_uart3_sels[] = {"osc_24m", "sys_pll1_80m", "sys_pll2_200m",
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"sys_pll2_100m", "sys_pll3_out", "clk_ext2",
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"clk_ext4", "audio_pll2_out", };
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static const char * const imx8mn_uart4_sels[] = {"osc_24m", "sys_pll1_80m", "sys_pll2_200m",
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"sys_pll2_100m", "sys_pll3_out", "clk_ext2",
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"clk_ext3", "audio_pll2_out", };
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static const char * const imx8mn_usb_core_sels[] = {"osc_24m", "sys_pll1_100m", "sys_pll1_40m",
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"sys_pll2_100m", "sys_pll2_200m", "clk_ext2",
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"clk_ext3", "audio_pll2_out", };
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static const char * const imx8mn_usb_phy_sels[] = {"osc_24m", "sys_pll1_100m", "sys_pll1_40m",
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"sys_pll2_100m", "sys_pll2_200m", "clk_ext2",
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"clk_ext3", "audio_pll2_out", };
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static const char * const imx8mn_gic_sels[] = {"osc_24m", "sys_pll2_200m", "sys_pll1_40m",
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"sys_pll2_100m", "sys_pll1_800m", "clk_ext2",
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"clk_ext4", "audio_pll2_out" };
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static const char * const imx8mn_ecspi1_sels[] = {"osc_24m", "sys_pll2_200m", "sys_pll1_40m",
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"sys_pll1_160m", "sys_pll1_800m", "sys_pll3_out",
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"sys_pll2_250m", "audio_pll2_out", };
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static const char * const imx8mn_ecspi2_sels[] = {"osc_24m", "sys_pll2_200m", "sys_pll1_40m",
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"sys_pll1_160m", "sys_pll1_800m", "sys_pll3_out",
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"sys_pll2_250m", "audio_pll2_out", };
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static const char * const imx8mn_pwm1_sels[] = {"osc_24m", "sys_pll2_100m", "sys_pll1_160m",
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"sys_pll1_40m", "sys_pll3_out", "clk_ext1",
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"sys_pll1_80m", "video_pll_out", };
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static const char * const imx8mn_pwm2_sels[] = {"osc_24m", "sys_pll2_100m", "sys_pll1_160m",
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"sys_pll1_40m", "sys_pll3_out", "clk_ext1",
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"sys_pll1_80m", "video_pll_out", };
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static const char * const imx8mn_pwm3_sels[] = {"osc_24m", "sys_pll2_100m", "sys_pll1_160m",
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"sys_pll1_40m", "sys_pll3_out", "clk_ext2",
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"sys_pll1_80m", "video_pll_out", };
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static const char * const imx8mn_pwm4_sels[] = {"osc_24m", "sys_pll2_100m", "sys_pll1_160m",
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"sys_pll1_40m", "sys_pll3_out", "clk_ext2",
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"sys_pll1_80m", "video_pll_out", };
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static const char * const imx8mn_gpt1_sels[] = {"osc_24m", "sys_pll2_100m", "sys_pll1_400m",
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"sys_pll1_40m", "video_pll_out", "sys_pll1_80m",
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"audio_pll1_out", "clk_ext1", };
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static const char * const imx8mn_gpt2_sels[] = {"osc_24m", "sys_pll2_100m", "sys_pll1_400m",
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"sys_pll1_40m", "video_pll_out", "sys_pll1_80m",
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"audio_pll1_out", "clk_ext1", };
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static const char * const imx8mn_gpt3_sels[] = {"osc_24m", "sys_pll2_100m", "sys_pll1_400m",
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"sys_pll1_40m", "video_pll_out", "sys_pll1_80m",
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"audio_pll1_out", "clk_ext1", };
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static const char * const imx8mn_gpt4_sels[] = {"osc_24m", "sys_pll2_100m", "sys_pll1_400m",
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"sys_pll1_40m", "video_pll_out", "sys_pll1_80m",
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"audio_pll1_out", "clk_ext1", };
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static const char * const imx8mn_gpt5_sels[] = {"osc_24m", "sys_pll2_100m", "sys_pll1_400m",
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"sys_pll1_40m", "video_pll_out", "sys_pll1_80m",
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"audio_pll1_out", "clk_ext1", };
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static const char * const imx8mn_gpt6_sels[] = {"osc_24m", "sys_pll2_100m", "sys_pll1_400m",
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"sys_pll1_40m", "video_pll_out", "sys_pll1_80m",
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"audio_pll1_out", "clk_ext1", };
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static const char * const imx8mn_wdog_sels[] = {"osc_24m", "sys_pll1_133m", "sys_pll1_160m",
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"m7_alt_pll_out", "sys_pll2_125m", "sys_pll3_out",
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"sys_pll1_80m", "sys_pll2_166m", };
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static const char * const imx8mn_wrclk_sels[] = {"osc_24m", "sys_pll1_40m", "m7_alt_pll_out",
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"sys_pll3_out", "sys_pll2_200m", "sys_pll1_266m",
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"sys_pll2_500m", "sys_pll1_100m", };
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static const char * const imx8mn_dsi_core_sels[] = {"osc_24m", "sys_pll1_266m", "sys_pll2_250m",
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"sys_pll1_800m", "sys_pll2_1000m", "sys_pll3_out",
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"audio_pll2_out", "video_pll_out", };
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static const char * const imx8mn_dsi_phy_sels[] = {"osc_24m", "sys_pll2_125m", "sys_pll2_100m",
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"sys_pll1_800m", "sys_pll2_1000m", "clk_ext2",
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"audio_pll2_out", "video_pll_out", };
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static const char * const imx8mn_dsi_dbi_sels[] = {"osc_24m", "sys_pll1_266m", "sys_pll2_100m",
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"sys_pll1_800m", "sys_pll2_1000m", "sys_pll3_out",
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"audio_pll2_out", "video_pll_out", };
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static const char * const imx8mn_usdhc3_sels[] = {"osc_24m", "sys_pll1_400m", "sys_pll1_800m",
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"sys_pll2_500m", "sys_pll3_out", "sys_pll1_266m",
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"audio_pll2_out", "sys_pll1_100m", };
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static const char * const imx8mn_camera_pixel_sels[] = {"osc_24m", "sys_pll1_266m", "sys_pll2_250m",
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"sys_pll1_800m", "sys_pll2_1000m", "sys_pll3_out",
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"audio_pll2_out", "video_pll_out", };
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static const char * const imx8mn_csi1_phy_sels[] = {"osc_24m", "sys_pll2_333m", "sys_pll2_100m",
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"sys_pll1_800m", "sys_pll2_1000m", "clk_ext2",
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"audio_pll2_out", "video_pll_out", };
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static const char * const imx8mn_csi2_phy_sels[] = {"osc_24m", "sys_pll2_333m", "sys_pll2_100m",
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"sys_pll1_800m", "sys_pll2_1000m", "clk_ext2",
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"audio_pll2_out", "video_pll_out", };
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static const char * const imx8mn_csi2_esc_sels[] = {"osc_24m", "sys_pll2_100m", "sys_pll1_80m",
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"sys_pll1_800m", "sys_pll2_1000m", "sys_pll3_out",
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"clk_ext3", "audio_pll2_out", };
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static const char * const imx8mn_ecspi3_sels[] = {"osc_24m", "sys_pll2_200m", "sys_pll1_40m",
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"sys_pll1_160m", "sys_pll1_800m", "sys_pll3_out",
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"sys_pll2_250m", "audio_pll2_out", };
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static const char * const imx8mn_pdm_sels[] = {"osc_24m", "sys_pll2_100m", "audio_pll1_out",
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"sys_pll1_800m", "sys_pll2_1000m", "sys_pll3_out",
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"clk_ext3", "audio_pll2_out", };
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static const char * const imx8mn_dram_core_sels[] = {"dram_pll_out", "dram_alt_root", };
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static const char * const imx8mn_clko1_sels[] = {"osc_24m", "sys_pll1_800m", "dummy",
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"sys_pll1_200m", "audio_pll2_out", "sys_pll2_500m",
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"dummy", "sys_pll1_80m", };
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static const char * const imx8mn_clko2_sels[] = {"osc_24m", "sys_pll2_200m", "sys_pll1_400m",
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"sys_pll2_166m", "sys_pll3_out", "audio_pll1_out",
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"video_pll_out", "osc_32k", };
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static const char * const clkout_sels[] = {"audio_pll1_out", "audio_pll2_out", "video_pll_out",
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"dummy", "dummy", "gpu_pll_out", "dummy",
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"arm_pll_out", "sys_pll1", "sys_pll2", "sys_pll3",
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"dummy", "dummy", "osc_24m", "dummy", "osc_32k"};
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static struct clk_hw_onecell_data *clk_hw_data;
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static struct clk_hw **hws;
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static int imx8mn_clocks_probe(struct platform_device *pdev)
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{
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struct device *dev = &pdev->dev;
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struct device_node *np = dev->of_node;
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void __iomem *base;
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int ret;
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clk_hw_data = devm_kzalloc(dev, struct_size(clk_hw_data, hws,
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IMX8MN_CLK_END), GFP_KERNEL);
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if (WARN_ON(!clk_hw_data))
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return -ENOMEM;
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clk_hw_data->num = IMX8MN_CLK_END;
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hws = clk_hw_data->hws;
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hws[IMX8MN_CLK_DUMMY] = imx_clk_hw_fixed("dummy", 0);
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hws[IMX8MN_CLK_24M] = imx_get_clk_hw_by_name(np, "osc_24m");
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hws[IMX8MN_CLK_32K] = imx_get_clk_hw_by_name(np, "osc_32k");
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hws[IMX8MN_CLK_EXT1] = imx_get_clk_hw_by_name(np, "clk_ext1");
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hws[IMX8MN_CLK_EXT2] = imx_get_clk_hw_by_name(np, "clk_ext2");
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hws[IMX8MN_CLK_EXT3] = imx_get_clk_hw_by_name(np, "clk_ext3");
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hws[IMX8MN_CLK_EXT4] = imx_get_clk_hw_by_name(np, "clk_ext4");
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np = of_find_compatible_node(NULL, NULL, "fsl,imx8mn-anatop");
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base = devm_of_iomap(dev, np, 0, NULL);
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of_node_put(np);
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if (WARN_ON(IS_ERR(base))) {
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ret = PTR_ERR(base);
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goto unregister_hws;
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}
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hws[IMX8MN_AUDIO_PLL1_REF_SEL] = imx_clk_hw_mux("audio_pll1_ref_sel", base + 0x0, 0, 2, pll_ref_sels, ARRAY_SIZE(pll_ref_sels));
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hws[IMX8MN_AUDIO_PLL2_REF_SEL] = imx_clk_hw_mux("audio_pll2_ref_sel", base + 0x14, 0, 2, pll_ref_sels, ARRAY_SIZE(pll_ref_sels));
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hws[IMX8MN_VIDEO_PLL_REF_SEL] = imx_clk_hw_mux("video_pll_ref_sel", base + 0x28, 0, 2, pll_ref_sels, ARRAY_SIZE(pll_ref_sels));
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hws[IMX8MN_DRAM_PLL_REF_SEL] = imx_clk_hw_mux("dram_pll_ref_sel", base + 0x50, 0, 2, pll_ref_sels, ARRAY_SIZE(pll_ref_sels));
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hws[IMX8MN_GPU_PLL_REF_SEL] = imx_clk_hw_mux("gpu_pll_ref_sel", base + 0x64, 0, 2, pll_ref_sels, ARRAY_SIZE(pll_ref_sels));
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hws[IMX8MN_M7_ALT_PLL_REF_SEL] = imx_clk_hw_mux("m7_alt_pll_ref_sel", base + 0x74, 0, 2, pll_ref_sels, ARRAY_SIZE(pll_ref_sels));
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hws[IMX8MN_ARM_PLL_REF_SEL] = imx_clk_hw_mux("arm_pll_ref_sel", base + 0x84, 0, 2, pll_ref_sels, ARRAY_SIZE(pll_ref_sels));
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hws[IMX8MN_SYS_PLL3_REF_SEL] = imx_clk_hw_mux("sys_pll3_ref_sel", base + 0x114, 0, 2, pll_ref_sels, ARRAY_SIZE(pll_ref_sels));
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hws[IMX8MN_AUDIO_PLL1] = imx_clk_hw_pll14xx("audio_pll1", "audio_pll1_ref_sel", base, &imx_1443x_pll);
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hws[IMX8MN_AUDIO_PLL2] = imx_clk_hw_pll14xx("audio_pll2", "audio_pll2_ref_sel", base + 0x14, &imx_1443x_pll);
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hws[IMX8MN_VIDEO_PLL] = imx_clk_hw_pll14xx("video_pll", "video_pll_ref_sel", base + 0x28, &imx_1443x_pll);
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hws[IMX8MN_DRAM_PLL] = imx_clk_hw_pll14xx("dram_pll", "dram_pll_ref_sel", base + 0x50, &imx_1443x_dram_pll);
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hws[IMX8MN_GPU_PLL] = imx_clk_hw_pll14xx("gpu_pll", "gpu_pll_ref_sel", base + 0x64, &imx_1416x_pll);
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hws[IMX8MN_M7_ALT_PLL] = imx_clk_hw_pll14xx("m7_alt_pll", "m7_alt_pll_ref_sel", base + 0x74, &imx_1416x_pll);
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hws[IMX8MN_ARM_PLL] = imx_clk_hw_pll14xx("arm_pll", "arm_pll_ref_sel", base + 0x84, &imx_1416x_pll);
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hws[IMX8MN_SYS_PLL1] = imx_clk_hw_fixed("sys_pll1", 800000000);
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hws[IMX8MN_SYS_PLL2] = imx_clk_hw_fixed("sys_pll2", 1000000000);
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hws[IMX8MN_SYS_PLL3] = imx_clk_hw_pll14xx("sys_pll3", "sys_pll3_ref_sel", base + 0x114, &imx_1416x_pll);
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/* PLL bypass out */
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hws[IMX8MN_AUDIO_PLL1_BYPASS] = imx_clk_hw_mux_flags("audio_pll1_bypass", base, 16, 1, audio_pll1_bypass_sels, ARRAY_SIZE(audio_pll1_bypass_sels), CLK_SET_RATE_PARENT);
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hws[IMX8MN_AUDIO_PLL2_BYPASS] = imx_clk_hw_mux_flags("audio_pll2_bypass", base + 0x14, 16, 1, audio_pll2_bypass_sels, ARRAY_SIZE(audio_pll2_bypass_sels), CLK_SET_RATE_PARENT);
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hws[IMX8MN_VIDEO_PLL_BYPASS] = imx_clk_hw_mux_flags("video_pll_bypass", base + 0x28, 16, 1, video_pll_bypass_sels, ARRAY_SIZE(video_pll_bypass_sels), CLK_SET_RATE_PARENT);
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hws[IMX8MN_DRAM_PLL_BYPASS] = imx_clk_hw_mux_flags("dram_pll_bypass", base + 0x50, 16, 1, dram_pll_bypass_sels, ARRAY_SIZE(dram_pll_bypass_sels), CLK_SET_RATE_PARENT);
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hws[IMX8MN_GPU_PLL_BYPASS] = imx_clk_hw_mux_flags("gpu_pll_bypass", base + 0x64, 28, 1, gpu_pll_bypass_sels, ARRAY_SIZE(gpu_pll_bypass_sels), CLK_SET_RATE_PARENT);
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hws[IMX8MN_M7_ALT_PLL_BYPASS] = imx_clk_hw_mux_flags("m7_alt_pll_bypass", base + 0x74, 28, 1, m7_alt_pll_bypass_sels, ARRAY_SIZE(m7_alt_pll_bypass_sels), CLK_SET_RATE_PARENT);
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hws[IMX8MN_ARM_PLL_BYPASS] = imx_clk_hw_mux_flags("arm_pll_bypass", base + 0x84, 28, 1, arm_pll_bypass_sels, ARRAY_SIZE(arm_pll_bypass_sels), CLK_SET_RATE_PARENT);
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hws[IMX8MN_SYS_PLL3_BYPASS] = imx_clk_hw_mux_flags("sys_pll3_bypass", base + 0x114, 28, 1, sys_pll3_bypass_sels, ARRAY_SIZE(sys_pll3_bypass_sels), CLK_SET_RATE_PARENT);
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/* PLL out gate */
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hws[IMX8MN_AUDIO_PLL1_OUT] = imx_clk_hw_gate("audio_pll1_out", "audio_pll1_bypass", base, 13);
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hws[IMX8MN_AUDIO_PLL2_OUT] = imx_clk_hw_gate("audio_pll2_out", "audio_pll2_bypass", base + 0x14, 13);
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hws[IMX8MN_VIDEO_PLL_OUT] = imx_clk_hw_gate("video_pll_out", "video_pll_bypass", base + 0x28, 13);
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hws[IMX8MN_DRAM_PLL_OUT] = imx_clk_hw_gate("dram_pll_out", "dram_pll_bypass", base + 0x50, 13);
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hws[IMX8MN_GPU_PLL_OUT] = imx_clk_hw_gate("gpu_pll_out", "gpu_pll_bypass", base + 0x64, 11);
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hws[IMX8MN_M7_ALT_PLL_OUT] = imx_clk_hw_gate("m7_alt_pll_out", "m7_alt_pll_bypass", base + 0x74, 11);
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hws[IMX8MN_ARM_PLL_OUT] = imx_clk_hw_gate("arm_pll_out", "arm_pll_bypass", base + 0x84, 11);
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hws[IMX8MN_SYS_PLL3_OUT] = imx_clk_hw_gate("sys_pll3_out", "sys_pll3_bypass", base + 0x114, 11);
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/* SYS PLL1 fixed output */
|
|
hws[IMX8MN_SYS_PLL1_OUT] = imx_clk_hw_gate("sys_pll1_out", "sys_pll1", base + 0x94, 11);
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hws[IMX8MN_SYS_PLL1_40M] = imx_clk_hw_fixed_factor("sys_pll1_40m", "sys_pll1_out", 1, 20);
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hws[IMX8MN_SYS_PLL1_80M] = imx_clk_hw_fixed_factor("sys_pll1_80m", "sys_pll1_out", 1, 10);
|
|
hws[IMX8MN_SYS_PLL1_100M] = imx_clk_hw_fixed_factor("sys_pll1_100m", "sys_pll1_out", 1, 8);
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hws[IMX8MN_SYS_PLL1_133M] = imx_clk_hw_fixed_factor("sys_pll1_133m", "sys_pll1_out", 1, 6);
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|
hws[IMX8MN_SYS_PLL1_160M] = imx_clk_hw_fixed_factor("sys_pll1_160m", "sys_pll1_out", 1, 5);
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hws[IMX8MN_SYS_PLL1_200M] = imx_clk_hw_fixed_factor("sys_pll1_200m", "sys_pll1_out", 1, 4);
|
|
hws[IMX8MN_SYS_PLL1_266M] = imx_clk_hw_fixed_factor("sys_pll1_266m", "sys_pll1_out", 1, 3);
|
|
hws[IMX8MN_SYS_PLL1_400M] = imx_clk_hw_fixed_factor("sys_pll1_400m", "sys_pll1_out", 1, 2);
|
|
hws[IMX8MN_SYS_PLL1_800M] = imx_clk_hw_fixed_factor("sys_pll1_800m", "sys_pll1_out", 1, 1);
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|
|
|
/* SYS PLL2 fixed output */
|
|
hws[IMX8MN_SYS_PLL2_OUT] = imx_clk_hw_gate("sys_pll2_out", "sys_pll2", base + 0x104, 11);
|
|
hws[IMX8MN_SYS_PLL2_50M] = imx_clk_hw_fixed_factor("sys_pll2_50m", "sys_pll2_out", 1, 20);
|
|
hws[IMX8MN_SYS_PLL2_100M] = imx_clk_hw_fixed_factor("sys_pll2_100m", "sys_pll2_out", 1, 10);
|
|
hws[IMX8MN_SYS_PLL2_125M] = imx_clk_hw_fixed_factor("sys_pll2_125m", "sys_pll2_out", 1, 8);
|
|
hws[IMX8MN_SYS_PLL2_166M] = imx_clk_hw_fixed_factor("sys_pll2_166m", "sys_pll2_out", 1, 6);
|
|
hws[IMX8MN_SYS_PLL2_200M] = imx_clk_hw_fixed_factor("sys_pll2_200m", "sys_pll2_out", 1, 5);
|
|
hws[IMX8MN_SYS_PLL2_250M] = imx_clk_hw_fixed_factor("sys_pll2_250m", "sys_pll2_out", 1, 4);
|
|
hws[IMX8MN_SYS_PLL2_333M] = imx_clk_hw_fixed_factor("sys_pll2_333m", "sys_pll2_out", 1, 3);
|
|
hws[IMX8MN_SYS_PLL2_500M] = imx_clk_hw_fixed_factor("sys_pll2_500m", "sys_pll2_out", 1, 2);
|
|
hws[IMX8MN_SYS_PLL2_1000M] = imx_clk_hw_fixed_factor("sys_pll2_1000m", "sys_pll2_out", 1, 1);
|
|
|
|
hws[IMX8MN_CLK_CLKOUT1_SEL] = imx_clk_hw_mux2("clkout1_sel", base + 0x128, 4, 4, clkout_sels, ARRAY_SIZE(clkout_sels));
|
|
hws[IMX8MN_CLK_CLKOUT1_DIV] = imx_clk_hw_divider("clkout1_div", " |