247 lines
6.0 KiB
C
247 lines
6.0 KiB
C
// SPDX-License-Identifier: GPL-2.0-only
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/*
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* Copyright (c) 2014 Samsung Electronics Co., Ltd.
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* Author: Tomasz Figa <t.figa@samsung.com>
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*
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* Clock driver for Exynos clock output
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*/
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#include <linux/slab.h>
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#include <linux/clk.h>
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#include <linux/clk-provider.h>
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#include <linux/module.h>
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#include <linux/io.h>
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#include <linux/of.h>
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#include <linux/of_address.h>
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#include <linux/of_device.h>
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#include <linux/platform_device.h>
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#include <linux/pm.h>
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#define EXYNOS_CLKOUT_NR_CLKS 1
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#define EXYNOS_CLKOUT_PARENTS 32
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#define EXYNOS_PMU_DEBUG_REG 0xa00
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#define EXYNOS_CLKOUT_DISABLE_SHIFT 0
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#define EXYNOS_CLKOUT_MUX_SHIFT 8
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#define EXYNOS4_CLKOUT_MUX_MASK 0xf
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#define EXYNOS5_CLKOUT_MUX_MASK 0x1f
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struct exynos_clkout {
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struct clk_gate gate;
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struct clk_mux mux;
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spinlock_t slock;
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void __iomem *reg;
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struct device_node *np;
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u32 pmu_debug_save;
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struct clk_hw_onecell_data data;
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};
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struct exynos_clkout_variant {
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u32 mux_mask;
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};
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static const struct exynos_clkout_variant exynos_clkout_exynos4 = {
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.mux_mask = EXYNOS4_CLKOUT_MUX_MASK,
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};
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static const struct exynos_clkout_variant exynos_clkout_exynos5 = {
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.mux_mask = EXYNOS5_CLKOUT_MUX_MASK,
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};
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static const struct of_device_id exynos_clkout_ids[] = {
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{
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.compatible = "samsung,exynos3250-pmu",
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.data = &exynos_clkout_exynos4,
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}, {
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.compatible = "samsung,exynos4210-pmu",
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.data = &exynos_clkout_exynos4,
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}, {
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.compatible = "samsung,exynos4212-pmu",
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.data = &exynos_clkout_exynos4,
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}, {
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.compatible = "samsung,exynos4412-pmu",
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.data = &exynos_clkout_exynos4,
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}, {
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.compatible = "samsung,exynos5250-pmu",
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.data = &exynos_clkout_exynos5,
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}, {
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.compatible = "samsung,exynos5410-pmu",
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.data = &exynos_clkout_exynos5,
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}, {
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.compatible = "samsung,exynos5420-pmu",
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.data = &exynos_clkout_exynos5,
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}, {
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.compatible = "samsung,exynos5433-pmu",
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.data = &exynos_clkout_exynos5,
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}, { }
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};
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MODULE_DEVICE_TABLE(of, exynos_clkout_ids);
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/*
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* Device will be instantiated as child of PMU device without its own
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* device node. Therefore match compatibles against parent.
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*/
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static int exynos_clkout_match_parent_dev(struct device *dev, u32 *mux_mask)
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{
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const struct exynos_clkout_variant *variant;
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const struct of_device_id *match;
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if (!dev->parent) {
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dev_err(dev, "not instantiated from MFD\n");
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return -EINVAL;
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}
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match = of_match_device(exynos_clkout_ids, dev->parent);
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if (!match) {
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dev_err(dev, "cannot match parent device\n");
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return -EINVAL;
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}
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variant = match->data;
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*mux_mask = variant->mux_mask;
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return 0;
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}
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static int exynos_clkout_probe(struct platform_device *pdev)
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{
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const char *parent_names[EXYNOS_CLKOUT_PARENTS];
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struct clk *parents[EXYNOS_CLKOUT_PARENTS];
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struct exynos_clkout *clkout;
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int parent_count, ret, i;
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u32 mux_mask;
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clkout = devm_kzalloc(&pdev->dev,
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struct_size(clkout, data.hws, EXYNOS_CLKOUT_NR_CLKS),
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GFP_KERNEL);
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if (!clkout)
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return -ENOMEM;
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ret = exynos_clkout_match_parent_dev(&pdev->dev, &mux_mask);
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if (ret)
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return ret;
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clkout->np = pdev->dev.of_node;
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if (!clkout->np) {
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/*
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* pdev->dev.parent was checked by exynos_clkout_match_parent_dev()
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* so it is not NULL.
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*/
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clkout->np = pdev->dev.parent->of_node;
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}
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platform_set_drvdata(pdev, clkout);
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spin_lock_init(&clkout->slock);
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parent_count = 0;
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for (i = 0; i < EXYNOS_CLKOUT_PARENTS; ++i) {
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char name[] = "clkoutXX";
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snprintf(name, sizeof(name), "clkout%d", i);
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parents[i] = of_clk_get_by_name(clkout->np, name);
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if (IS_ERR(parents[i])) {
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parent_names[i] = "none";
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continue;
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}
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parent_names[i] = __clk_get_name(parents[i]);
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parent_count = i + 1;
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}
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if (!parent_count)
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return -EINVAL;
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clkout->reg = of_iomap(clkout->np, 0);
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if (!clkout->reg) {
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ret = -ENODEV;
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goto clks_put;
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}
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clkout->gate.reg = clkout->reg + EXYNOS_PMU_DEBUG_REG;
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clkout->gate.bit_idx = EXYNOS_CLKOUT_DISABLE_SHIFT;
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clkout->gate.flags = CLK_GATE_SET_TO_DISABLE;
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clkout->gate.lock = &clkout->slock;
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clkout->mux.reg = clkout->reg + EXYNOS_PMU_DEBUG_REG;
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clkout->mux.mask = mux_mask;
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clkout->mux.shift = EXYNOS_CLKOUT_MUX_SHIFT;
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clkout->mux.lock = &clkout->slock;
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clkout->data.hws[0] = clk_hw_register_composite(NULL, "clkout",
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parent_names, parent_count, &clkout->mux.hw,
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&clk_mux_ops, NULL, NULL, &clkout->gate.hw,
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&clk_gate_ops, CLK_SET_RATE_PARENT
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| CLK_SET_RATE_NO_REPARENT);
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if (IS_ERR(clkout->data.hws[0])) {
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ret = PTR_ERR(clkout->data.hws[0]);
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goto err_unmap;
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}
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clkout->data.num = EXYNOS_CLKOUT_NR_CLKS;
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ret = of_clk_add_hw_provider(clkout->np, of_clk_hw_onecell_get, &clkout->data);
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if (ret)
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goto err_clk_unreg;
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return 0;
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err_clk_unreg:
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clk_hw_unregister(clkout->data.hws[0]);
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err_unmap:
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iounmap(clkout->reg);
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clks_put:
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for (i = 0; i < EXYNOS_CLKOUT_PARENTS; ++i)
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if (!IS_ERR(parents[i]))
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clk_put(parents[i]);
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dev_err(&pdev->dev, "failed to register clkout clock\n");
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return ret;
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}
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static void exynos_clkout_remove(struct platform_device *pdev)
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{
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struct exynos_clkout *clkout = platform_get_drvdata(pdev);
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of_clk_del_provider(clkout->np);
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clk_hw_unregister(clkout->data.hws[0]);
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iounmap(clkout->reg);
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}
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static int __maybe_unused exynos_clkout_suspend(struct device *dev)
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{
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struct exynos_clkout *clkout = dev_get_drvdata(dev);
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clkout->pmu_debug_save = readl(clkout->reg + EXYNOS_PMU_DEBUG_REG);
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return 0;
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}
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static int __maybe_unused exynos_clkout_resume(struct device *dev)
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{
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struct exynos_clkout *clkout = dev_get_drvdata(dev);
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writel(clkout->pmu_debug_save, clkout->reg + EXYNOS_PMU_DEBUG_REG);
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return 0;
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}
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static SIMPLE_DEV_PM_OPS(exynos_clkout_pm_ops, exynos_clkout_suspend,
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exynos_clkout_resume);
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static struct platform_driver exynos_clkout_driver = {
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.driver = {
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.name = "exynos-clkout",
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.of_match_table = exynos_clkout_ids,
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.pm = &exynos_clkout_pm_ops,
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},
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.probe = exynos_clkout_probe,
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.remove_new = exynos_clkout_remove,
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};
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module_platform_driver(exynos_clkout_driver);
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MODULE_AUTHOR("Krzysztof Kozlowski <krzk@kernel.org>");
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MODULE_AUTHOR("Tomasz Figa <tomasz.figa@gmail.com>");
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MODULE_DESCRIPTION("Samsung Exynos clock output driver");
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MODULE_LICENSE("GPL");
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