357 lines
9.1 KiB
C
357 lines
9.1 KiB
C
// SPDX-License-Identifier: GPL-2.0 OR MIT
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/*
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* Copyright 2018-2022 Advanced Micro Devices, Inc.
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*
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* Permission is hereby granted, free of charge, to any person obtaining a
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* copy of this software and associated documentation files (the "Software"),
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* to deal in the Software without restriction, including without limitation
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* the rights to use, copy, modify, merge, publish, distribute, sublicense,
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* and/or sell copies of the Software, and to permit persons to whom the
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* Software is furnished to do so, subject to the following conditions:
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*
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* The above copyright notice and this permission notice shall be included in
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* all copies or substantial portions of the Software.
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*
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* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
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* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
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* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
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* THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR
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* OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
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* ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
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* OTHER DEALINGS IN THE SOFTWARE.
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*/
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#include <linux/kconfig.h>
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#if IS_REACHABLE(CONFIG_AMD_IOMMU_V2)
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#include <linux/printk.h>
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#include <linux/device.h>
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#include <linux/slab.h>
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#include <linux/pci.h>
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#include <linux/amd-iommu.h>
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#include "kfd_priv.h"
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#include "kfd_topology.h"
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#include "kfd_iommu.h"
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static const u32 required_iommu_flags = AMD_IOMMU_DEVICE_FLAG_ATS_SUP |
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AMD_IOMMU_DEVICE_FLAG_PRI_SUP |
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AMD_IOMMU_DEVICE_FLAG_PASID_SUP;
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/** kfd_iommu_check_device - Check whether IOMMU is available for device
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*/
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int kfd_iommu_check_device(struct kfd_dev *kfd)
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{
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struct amd_iommu_device_info iommu_info;
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int err;
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if (!kfd->use_iommu_v2)
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return -ENODEV;
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iommu_info.flags = 0;
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err = amd_iommu_device_info(kfd->adev->pdev, &iommu_info);
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if (err)
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return err;
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if ((iommu_info.flags & required_iommu_flags) != required_iommu_flags)
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return -ENODEV;
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return 0;
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}
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/** kfd_iommu_device_init - Initialize IOMMU for device
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*/
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int kfd_iommu_device_init(struct kfd_dev *kfd)
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{
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struct amd_iommu_device_info iommu_info;
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unsigned int pasid_limit;
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int err;
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if (!kfd->use_iommu_v2)
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return 0;
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iommu_info.flags = 0;
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err = amd_iommu_device_info(kfd->adev->pdev, &iommu_info);
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if (err < 0) {
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dev_err(kfd_device,
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"error getting iommu info. is the iommu enabled?\n");
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return -ENODEV;
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}
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if ((iommu_info.flags & required_iommu_flags) != required_iommu_flags) {
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dev_err(kfd_device,
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"error required iommu flags ats %i, pri %i, pasid %i\n",
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(iommu_info.flags & AMD_IOMMU_DEVICE_FLAG_ATS_SUP) != 0,
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(iommu_info.flags & AMD_IOMMU_DEVICE_FLAG_PRI_SUP) != 0,
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(iommu_info.flags & AMD_IOMMU_DEVICE_FLAG_PASID_SUP)
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!= 0);
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return -ENODEV;
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}
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pasid_limit = min_t(unsigned int,
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(unsigned int)(1 << kfd->device_info.max_pasid_bits),
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iommu_info.max_pasids);
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if (!kfd_set_pasid_limit(pasid_limit)) {
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dev_err(kfd_device, "error setting pasid limit\n");
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return -EBUSY;
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}
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return 0;
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}
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/** kfd_iommu_bind_process_to_device - Have the IOMMU bind a process
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*
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* Binds the given process to the given device using its PASID. This
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* enables IOMMUv2 address translation for the process on the device.
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*
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* This function assumes that the process mutex is held.
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*/
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int kfd_iommu_bind_process_to_device(struct kfd_process_device *pdd)
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{
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struct kfd_node *dev = pdd->dev;
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struct kfd_process *p = pdd->process;
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int err;
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if (!dev->kfd->use_iommu_v2 || pdd->bound == PDD_BOUND)
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return 0;
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if (unlikely(pdd->bound == PDD_BOUND_SUSPENDED)) {
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pr_err("Binding PDD_BOUND_SUSPENDED pdd is unexpected!\n");
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return -EINVAL;
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}
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if (!kfd_is_first_node(dev)) {
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dev_warn_once(kfd_device,
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"IOMMU supported only on first node\n");
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return 0;
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}
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err = amd_iommu_bind_pasid(dev->adev->pdev, p->pasid, p->lead_thread);
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if (!err)
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pdd->bound = PDD_BOUND;
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return err;
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}
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/** kfd_iommu_unbind_process - Unbind process from all devices
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*
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* This removes all IOMMU device bindings of the process. To be used
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* before process termination.
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*/
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void kfd_iommu_unbind_process(struct kfd_process *p)
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{
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int i;
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for (i = 0; i < p->n_pdds; i++)
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if ((p->pdds[i]->bound == PDD_BOUND) &&
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(kfd_is_first_node((p->pdds[i]->dev))))
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amd_iommu_unbind_pasid(p->pdds[i]->dev->adev->pdev,
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p->pasid);
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}
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/* Callback for process shutdown invoked by the IOMMU driver */
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static void iommu_pasid_shutdown_callback(struct pci_dev *pdev, u32 pasid)
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{
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struct kfd_node *dev = kfd_device_by_pci_dev(pdev);
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struct kfd_process *p;
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struct kfd_process_device *pdd;
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if (!dev)
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return;
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/*
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* Look for the process that matches the pasid. If there is no such
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* process, we either released it in amdkfd's own notifier, or there
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* is a bug. Unfortunately, there is no way to tell...
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*/
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p = kfd_lookup_process_by_pasid(pasid);
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if (!p)
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return;
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pr_debug("Unbinding process 0x%x from IOMMU\n", pasid);
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mutex_lock(&p->mutex);
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pdd = kfd_get_process_device_data(dev, p);
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if (pdd)
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/* For GPU relying on IOMMU, we need to dequeue here
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* when PASID is still bound.
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*/
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kfd_process_dequeue_from_device(pdd);
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mutex_unlock(&p->mutex);
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kfd_unref_process(p);
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}
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/* This function called by IOMMU driver on PPR failure */
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static int iommu_invalid_ppr_cb(struct pci_dev *pdev, u32 pasid,
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unsigned long address, u16 flags)
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{
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struct kfd_node *dev;
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dev_warn_ratelimited(kfd_device,
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"Invalid PPR device %x:%x.%x pasid 0x%x address 0x%lX flags 0x%X",
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pdev->bus->number,
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PCI_SLOT(pdev->devfn),
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PCI_FUNC(pdev->devfn),
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pasid,
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address,
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flags);
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dev = kfd_device_by_pci_dev(pdev);
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if (!WARN_ON(!dev))
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kfd_signal_iommu_event(dev, pasid, address,
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flags & PPR_FAULT_WRITE, flags & PPR_FAULT_EXEC);
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return AMD_IOMMU_INV_PRI_RSP_INVALID;
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}
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/*
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* Bind processes do the device that have been temporarily unbound
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* (PDD_BOUND_SUSPENDED) in kfd_unbind_processes_from_device.
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*/
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static int kfd_bind_processes_to_device(struct kfd_node *knode)
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{
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struct kfd_process_device *pdd;
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struct kfd_process *p;
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unsigned int temp;
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int err = 0;
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int idx = srcu_read_lock(&kfd_processes_srcu);
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hash_for_each_rcu(kfd_processes_table, temp, p, kfd_processes) {
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mutex_lock(&p->mutex);
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pdd = kfd_get_process_device_data(knode, p);
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if (WARN_ON(!pdd) || pdd->bound != PDD_BOUND_SUSPENDED) {
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mutex_unlock(&p->mutex);
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continue;
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}
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err = amd_iommu_bind_pasid(knode->adev->pdev, p->pasid,
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p->lead_thread);
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if (err < 0) {
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pr_err("Unexpected pasid 0x%x binding failure\n",
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p->pasid);
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mutex_unlock(&p->mutex);
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break;
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}
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pdd->bound = PDD_BOUND;
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mutex_unlock(&p->mutex);
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}
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srcu_read_unlock(&kfd_processes_srcu, idx);
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return err;
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}
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/*
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* Mark currently bound processes as PDD_BOUND_SUSPENDED. These
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* processes will be restored to PDD_BOUND state in
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* kfd_bind_processes_to_device.
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*/
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static void kfd_unbind_processes_from_device(struct kfd_node *knode)
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{
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struct kfd_process_device *pdd;
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struct kfd_process *p;
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unsigned int temp;
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int idx = srcu_read_lock(&kfd_processes_srcu);
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hash_for_each_rcu(kfd_processes_table, temp, p, kfd_processes) {
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mutex_lock(&p->mutex);
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pdd = kfd_get_process_device_data(knode, p);
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if (WARN_ON(!pdd)) {
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mutex_unlock(&p->mutex);
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continue;
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}
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if (pdd->bound == PDD_BOUND)
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pdd->bound = PDD_BOUND_SUSPENDED;
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mutex_unlock(&p->mutex);
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}
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srcu_read_unlock(&kfd_processes_srcu, idx);
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}
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/** kfd_iommu_suspend - Prepare IOMMU for suspend
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*
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* This unbinds processes from the device and disables the IOMMU for
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* the device.
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*/
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void kfd_iommu_suspend(struct kfd_dev *kfd)
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{
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if (!kfd->use_iommu_v2)
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return;
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kfd_unbind_processes_from_device(kfd->nodes[0]);
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amd_iommu_set_invalidate_ctx_cb(kfd->adev->pdev, NULL);
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amd_iommu_set_invalid_ppr_cb(kfd->adev->pdev, NULL);
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amd_iommu_free_device(kfd->adev->pdev);
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}
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/** kfd_iommu_resume - Restore IOMMU after resume
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*
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* This reinitializes the IOMMU for the device and re-binds previously
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* suspended processes to the device.
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*/
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int kfd_iommu_resume(struct kfd_dev *kfd)
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{
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unsigned int pasid_limit;
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int err;
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if (!kfd->use_iommu_v2)
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return 0;
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pasid_limit = kfd_get_pasid_limit();
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err = amd_iommu_init_device(kfd->adev->pdev, pasid_limit);
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if (err)
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return -ENXIO;
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amd_iommu_set_invalidate_ctx_cb(kfd->adev->pdev,
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iommu_pasid_shutdown_callback);
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amd_iommu_set_invalid_ppr_cb(kfd->adev->pdev,
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iommu_invalid_ppr_cb);
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err = kfd_bind_processes_to_device(kfd->nodes[0]);
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if (err) {
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amd_iommu_set_invalidate_ctx_cb(kfd->adev->pdev, NULL);
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amd_iommu_set_invalid_ppr_cb(kfd->adev->pdev, NULL);
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amd_iommu_free_device(kfd->adev->pdev);
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return err;
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}
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return 0;
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}
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/** kfd_iommu_add_perf_counters - Add IOMMU performance counters to topology
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*/
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int kfd_iommu_add_perf_counters(struct kfd_topology_device *kdev)
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{
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struct kfd_perf_properties *props;
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if (!(kdev->node_props.capability & HSA_CAP_ATS_PRESENT))
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return 0;
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if (!amd_iommu_pc_supported())
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return 0;
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props = kfd_alloc_struct(props);
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if (!props)
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return -ENOMEM;
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strcpy(props->block_name, "iommu");
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props->max_concurrent = amd_iommu_pc_get_max_banks(0) *
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amd_iommu_pc_get_max_counters(0); /* assume one iommu */
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list_add_tail(&props->list, &kdev->perf_props);
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return 0;
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}
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#endif
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