260 lines
5.9 KiB
C
260 lines
5.9 KiB
C
// SPDX-License-Identifier: GPL-2.0
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/*
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* Copyright (c) 2023 Qualcomm Innovation Center, Inc. All rights reserved.
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*/
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#include <linux/amba/bus.h>
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#include <linux/bitmap.h>
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#include <linux/coresight.h>
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#include <linux/coresight-pmu.h>
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#include <linux/device.h>
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#include <linux/err.h>
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#include <linux/fs.h>
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#include <linux/io.h>
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#include <linux/kernel.h>
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#include <linux/module.h>
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#include <linux/of.h>
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#include "coresight-priv.h"
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#include "coresight-tpdm.h"
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DEFINE_CORESIGHT_DEVLIST(tpdm_devs, "tpdm");
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static void tpdm_enable_dsb(struct tpdm_drvdata *drvdata)
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{
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u32 val;
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/* Set the enable bit of DSB control register to 1 */
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val = readl_relaxed(drvdata->base + TPDM_DSB_CR);
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val |= TPDM_DSB_CR_ENA;
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writel_relaxed(val, drvdata->base + TPDM_DSB_CR);
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}
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/* TPDM enable operations */
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static void __tpdm_enable(struct tpdm_drvdata *drvdata)
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{
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CS_UNLOCK(drvdata->base);
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/* Check if DSB datasets is present for TPDM. */
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if (drvdata->datasets & TPDM_PIDR0_DS_DSB)
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tpdm_enable_dsb(drvdata);
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CS_LOCK(drvdata->base);
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}
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static int tpdm_enable(struct coresight_device *csdev, struct perf_event *event,
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enum cs_mode mode)
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{
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struct tpdm_drvdata *drvdata = dev_get_drvdata(csdev->dev.parent);
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spin_lock(&drvdata->spinlock);
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if (drvdata->enable) {
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spin_unlock(&drvdata->spinlock);
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return -EBUSY;
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}
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__tpdm_enable(drvdata);
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drvdata->enable = true;
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spin_unlock(&drvdata->spinlock);
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dev_dbg(drvdata->dev, "TPDM tracing enabled\n");
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return 0;
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}
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static void tpdm_disable_dsb(struct tpdm_drvdata *drvdata)
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{
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u32 val;
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/* Set the enable bit of DSB control register to 0 */
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val = readl_relaxed(drvdata->base + TPDM_DSB_CR);
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val &= ~TPDM_DSB_CR_ENA;
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writel_relaxed(val, drvdata->base + TPDM_DSB_CR);
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}
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/* TPDM disable operations */
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static void __tpdm_disable(struct tpdm_drvdata *drvdata)
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{
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CS_UNLOCK(drvdata->base);
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/* Check if DSB datasets is present for TPDM. */
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if (drvdata->datasets & TPDM_PIDR0_DS_DSB)
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tpdm_disable_dsb(drvdata);
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CS_LOCK(drvdata->base);
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}
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static void tpdm_disable(struct coresight_device *csdev,
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struct perf_event *event)
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{
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struct tpdm_drvdata *drvdata = dev_get_drvdata(csdev->dev.parent);
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spin_lock(&drvdata->spinlock);
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if (!drvdata->enable) {
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spin_unlock(&drvdata->spinlock);
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return;
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}
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__tpdm_disable(drvdata);
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drvdata->enable = false;
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spin_unlock(&drvdata->spinlock);
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dev_dbg(drvdata->dev, "TPDM tracing disabled\n");
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}
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static const struct coresight_ops_source tpdm_source_ops = {
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.enable = tpdm_enable,
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.disable = tpdm_disable,
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};
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static const struct coresight_ops tpdm_cs_ops = {
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.source_ops = &tpdm_source_ops,
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};
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static void tpdm_init_default_data(struct tpdm_drvdata *drvdata)
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{
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u32 pidr;
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CS_UNLOCK(drvdata->base);
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/* Get the datasets present on the TPDM. */
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pidr = readl_relaxed(drvdata->base + CORESIGHT_PERIPHIDR0);
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drvdata->datasets |= pidr & GENMASK(TPDM_DATASETS - 1, 0);
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CS_LOCK(drvdata->base);
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}
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/*
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* value 1: 64 bits test data
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* value 2: 32 bits test data
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*/
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static ssize_t integration_test_store(struct device *dev,
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struct device_attribute *attr,
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const char *buf,
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size_t size)
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{
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int i, ret = 0;
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unsigned long val;
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struct tpdm_drvdata *drvdata = dev_get_drvdata(dev->parent);
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ret = kstrtoul(buf, 10, &val);
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if (ret)
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return ret;
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if (val != 1 && val != 2)
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return -EINVAL;
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if (!drvdata->enable)
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return -EINVAL;
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if (val == 1)
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val = ATBCNTRL_VAL_64;
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else
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val = ATBCNTRL_VAL_32;
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CS_UNLOCK(drvdata->base);
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writel_relaxed(0x1, drvdata->base + TPDM_ITCNTRL);
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for (i = 0; i < INTEGRATION_TEST_CYCLE; i++)
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writel_relaxed(val, drvdata->base + TPDM_ITATBCNTRL);
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writel_relaxed(0, drvdata->base + TPDM_ITCNTRL);
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CS_LOCK(drvdata->base);
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return size;
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}
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static DEVICE_ATTR_WO(integration_test);
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static struct attribute *tpdm_attrs[] = {
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&dev_attr_integration_test.attr,
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NULL,
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};
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static struct attribute_group tpdm_attr_grp = {
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.attrs = tpdm_attrs,
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};
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static const struct attribute_group *tpdm_attr_grps[] = {
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&tpdm_attr_grp,
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NULL,
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};
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static int tpdm_probe(struct amba_device *adev, const struct amba_id *id)
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{
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void __iomem *base;
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struct device *dev = &adev->dev;
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struct coresight_platform_data *pdata;
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struct tpdm_drvdata *drvdata;
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struct coresight_desc desc = { 0 };
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pdata = coresight_get_platform_data(dev);
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if (IS_ERR(pdata))
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return PTR_ERR(pdata);
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adev->dev.platform_data = pdata;
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/* driver data*/
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drvdata = devm_kzalloc(dev, sizeof(*drvdata), GFP_KERNEL);
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if (!drvdata)
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return -ENOMEM;
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drvdata->dev = &adev->dev;
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dev_set_drvdata(dev, drvdata);
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base = devm_ioremap_resource(dev, &adev->res);
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if (IS_ERR(base))
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return PTR_ERR(base);
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drvdata->base = base;
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/* Set up coresight component description */
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desc.name = coresight_alloc_device_name(&tpdm_devs, dev);
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if (!desc.name)
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return -ENOMEM;
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desc.type = CORESIGHT_DEV_TYPE_SOURCE;
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desc.subtype.source_subtype = CORESIGHT_DEV_SUBTYPE_SOURCE_OTHERS;
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desc.ops = &tpdm_cs_ops;
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desc.pdata = adev->dev.platform_data;
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desc.dev = &adev->dev;
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desc.access = CSDEV_ACCESS_IOMEM(base);
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desc.groups = tpdm_attr_grps;
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drvdata->csdev = coresight_register(&desc);
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if (IS_ERR(drvdata->csdev))
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return PTR_ERR(drvdata->csdev);
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spin_lock_init(&drvdata->spinlock);
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tpdm_init_default_data(drvdata);
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/* Decrease pm refcount when probe is done.*/
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pm_runtime_put(&adev->dev);
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return 0;
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}
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static void tpdm_remove(struct amba_device *adev)
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{
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struct tpdm_drvdata *drvdata = dev_get_drvdata(&adev->dev);
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coresight_unregister(drvdata->csdev);
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}
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/*
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* Different TPDM has different periph id.
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* The difference is 0-7 bits' value. So ignore 0-7 bits.
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*/
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static struct amba_id tpdm_ids[] = {
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{
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.id = 0x000f0e00,
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.mask = 0x000fff00,
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},
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{ 0, 0},
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};
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static struct amba_driver tpdm_driver = {
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.drv = {
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.name = "coresight-tpdm",
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.owner = THIS_MODULE,
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.suppress_bind_attrs = true,
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},
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.probe = tpdm_probe,
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.id_table = tpdm_ids,
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.remove = tpdm_remove,
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};
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module_amba_driver(tpdm_driver);
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MODULE_LICENSE("GPL");
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MODULE_DESCRIPTION("Trace, Profiling & Diagnostic Monitor driver");
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