702 lines
18 KiB
C
702 lines
18 KiB
C
// SPDX-License-Identifier: GPL-2.0-only
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/*
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* Murata SCA3300 3-axis industrial accelerometer
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*
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* Copyright (c) 2021 Vaisala Oyj. All rights reserved.
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*/
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#include <linux/bitops.h>
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#include <linux/crc8.h>
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#include <linux/delay.h>
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#include <linux/kernel.h>
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#include <linux/module.h>
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#include <linux/spi/spi.h>
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#include <asm/unaligned.h>
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#include <linux/iio/buffer.h>
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#include <linux/iio/iio.h>
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#include <linux/iio/sysfs.h>
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#include <linux/iio/trigger_consumer.h>
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#include <linux/iio/triggered_buffer.h>
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#define SCA3300_ALIAS "sca3300"
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#define SCA3300_CRC8_POLYNOMIAL 0x1d
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/* Device mode register */
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#define SCA3300_REG_MODE 0xd
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#define SCA3300_MODE_SW_RESET 0x20
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/* Last register in map */
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#define SCA3300_REG_SELBANK 0x1f
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/* Device status and mask */
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#define SCA3300_REG_STATUS 0x6
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#define SCA3300_STATUS_MASK GENMASK(8, 0)
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/* Device ID */
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#define SCA3300_REG_WHOAMI 0x10
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#define SCA3300_WHOAMI_ID 0x51
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#define SCL3300_WHOAMI_ID 0xC1
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/* Device return status and mask */
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#define SCA3300_VALUE_RS_ERROR 0x3
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#define SCA3300_MASK_RS_STATUS GENMASK(1, 0)
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#define SCL3300_REG_ANG_CTRL 0x0C
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#define SCL3300_ANG_ENABLE 0x1F
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enum sca3300_scan_indexes {
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SCA3300_ACC_X = 0,
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SCA3300_ACC_Y,
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SCA3300_ACC_Z,
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SCA3300_TEMP,
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SCA3300_INCLI_X,
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SCA3300_INCLI_Y,
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SCA3300_INCLI_Z,
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SCA3300_SCAN_MAX
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};
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/*
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* Buffer size max case:
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* Three accel channels, two bytes per channel.
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* Temperature channel, two bytes.
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* Three incli channels, two bytes per channel.
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* Timestamp channel, eight bytes.
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*/
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#define SCA3300_MAX_BUFFER_SIZE (ALIGN(sizeof(s16) * SCA3300_SCAN_MAX, sizeof(s64)) + sizeof(s64))
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#define SCA3300_ACCEL_CHANNEL(index, reg, axis) { \
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.type = IIO_ACCEL, \
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.address = reg, \
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.modified = 1, \
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.channel2 = IIO_MOD_##axis, \
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.info_mask_separate = BIT(IIO_CHAN_INFO_RAW), \
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.info_mask_shared_by_type = \
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BIT(IIO_CHAN_INFO_SCALE) | \
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BIT(IIO_CHAN_INFO_LOW_PASS_FILTER_3DB_FREQUENCY), \
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.info_mask_shared_by_type_available = \
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BIT(IIO_CHAN_INFO_SCALE) | \
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BIT(IIO_CHAN_INFO_LOW_PASS_FILTER_3DB_FREQUENCY), \
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.scan_index = index, \
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.scan_type = { \
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.sign = 's', \
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.realbits = 16, \
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.storagebits = 16, \
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.endianness = IIO_CPU, \
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}, \
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}
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#define SCA3300_INCLI_CHANNEL(index, reg, axis) { \
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.type = IIO_INCLI, \
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.address = reg, \
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.modified = 1, \
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.channel2 = IIO_MOD_##axis, \
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.info_mask_shared_by_type = BIT(IIO_CHAN_INFO_SCALE), \
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.info_mask_separate = BIT(IIO_CHAN_INFO_RAW), \
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.info_mask_shared_by_type_available = BIT(IIO_CHAN_INFO_SCALE), \
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.scan_index = index, \
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.scan_type = { \
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.sign = 's', \
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.realbits = 16, \
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.storagebits = 16, \
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.endianness = IIO_CPU, \
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}, \
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}
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#define SCA3300_TEMP_CHANNEL(index, reg) { \
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.type = IIO_TEMP, \
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.address = reg, \
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.scan_index = index, \
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.info_mask_separate = BIT(IIO_CHAN_INFO_RAW), \
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.scan_type = { \
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.sign = 's', \
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.realbits = 16, \
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.storagebits = 16, \
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.endianness = IIO_CPU, \
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}, \
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}
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static const struct iio_chan_spec sca3300_channels[] = {
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SCA3300_ACCEL_CHANNEL(SCA3300_ACC_X, 0x1, X),
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SCA3300_ACCEL_CHANNEL(SCA3300_ACC_Y, 0x2, Y),
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SCA3300_ACCEL_CHANNEL(SCA3300_ACC_Z, 0x3, Z),
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SCA3300_TEMP_CHANNEL(SCA3300_TEMP, 0x05),
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IIO_CHAN_SOFT_TIMESTAMP(4),
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};
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static const int sca3300_lp_freq[] = {70, 10};
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static const int sca3300_lp_freq_map[] = {0, 0, 0, 1};
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static const int scl3300_lp_freq[] = {40, 70, 10};
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static const int scl3300_lp_freq_map[] = {0, 1, 2};
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static const int sca3300_accel_scale[][2] = {{0, 370}, {0, 741}, {0, 185}};
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static const int sca3300_accel_scale_map[] = {0, 1, 2, 2};
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static const int scl3300_accel_scale[][2] = {{0, 167}, {0, 333}, {0, 83}};
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static const int scl3300_accel_scale_map[] = {0, 1, 2};
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static const int scl3300_incli_scale[][2] = {{0, 5495}};
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static const int scl3300_incli_scale_map[] = {0, 0, 0};
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static const int sca3300_avail_modes_map[] = {0, 1, 2, 3};
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static const int scl3300_avail_modes_map[] = {0, 1, 3};
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static const struct iio_chan_spec scl3300_channels[] = {
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SCA3300_ACCEL_CHANNEL(SCA3300_ACC_X, 0x1, X),
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SCA3300_ACCEL_CHANNEL(SCA3300_ACC_Y, 0x2, Y),
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SCA3300_ACCEL_CHANNEL(SCA3300_ACC_Z, 0x3, Z),
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SCA3300_TEMP_CHANNEL(SCA3300_TEMP, 0x05),
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SCA3300_INCLI_CHANNEL(SCA3300_INCLI_X, 0x09, X),
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SCA3300_INCLI_CHANNEL(SCA3300_INCLI_Y, 0x0A, Y),
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SCA3300_INCLI_CHANNEL(SCA3300_INCLI_Z, 0x0B, Z),
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IIO_CHAN_SOFT_TIMESTAMP(7),
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};
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static const unsigned long sca3300_scan_masks[] = {
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BIT(SCA3300_ACC_X) | BIT(SCA3300_ACC_Y) | BIT(SCA3300_ACC_Z) |
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BIT(SCA3300_TEMP),
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0
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};
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static const unsigned long scl3300_scan_masks[] = {
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BIT(SCA3300_ACC_X) | BIT(SCA3300_ACC_Y) | BIT(SCA3300_ACC_Z) |
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BIT(SCA3300_TEMP) |
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BIT(SCA3300_INCLI_X) | BIT(SCA3300_INCLI_Y) | BIT(SCA3300_INCLI_Z),
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0
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};
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struct sca3300_chip_info {
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const char *name;
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const unsigned long *scan_masks;
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const struct iio_chan_spec *channels;
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u8 num_channels;
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u8 num_accel_scales;
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const int (*accel_scale)[2];
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const int *accel_scale_map;
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const int (*incli_scale)[2];
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const int *incli_scale_map;
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u8 num_incli_scales;
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u8 num_freqs;
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const int *freq_table;
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const int *freq_map;
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const int *avail_modes_table;
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u8 num_avail_modes;
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u8 chip_id;
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bool angle_supported;
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};
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/**
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* struct sca3300_data - device data
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* @spi: SPI device structure
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* @lock: Data buffer lock
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* @chip: Sensor chip specific information
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* @buffer: Triggered buffer:
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* -SCA3300: 4 channel 16-bit data + 64-bit timestamp
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* -SCL3300: 7 channel 16-bit data + 64-bit timestamp
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* @txbuf: Transmit buffer
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* @rxbuf: Receive buffer
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*/
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struct sca3300_data {
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struct spi_device *spi;
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struct mutex lock;
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const struct sca3300_chip_info *chip;
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u8 buffer[SCA3300_MAX_BUFFER_SIZE] __aligned(sizeof(s64));
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u8 txbuf[4] __aligned(IIO_DMA_MINALIGN);
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u8 rxbuf[4];
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};
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static const struct sca3300_chip_info sca3300_chip_tbl[] = {
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{
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.name = "sca3300",
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.scan_masks = sca3300_scan_masks,
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.channels = sca3300_channels,
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.num_channels = ARRAY_SIZE(sca3300_channels),
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.num_accel_scales = ARRAY_SIZE(sca3300_accel_scale)*2,
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.accel_scale = sca3300_accel_scale,
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.accel_scale_map = sca3300_accel_scale_map,
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.num_freqs = ARRAY_SIZE(sca3300_lp_freq),
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.freq_table = sca3300_lp_freq,
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.freq_map = sca3300_lp_freq_map,
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.avail_modes_table = sca3300_avail_modes_map,
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.num_avail_modes = 4,
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.chip_id = SCA3300_WHOAMI_ID,
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.angle_supported = false,
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},
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{
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.name = "scl3300",
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.scan_masks = scl3300_scan_masks,
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.channels = scl3300_channels,
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.num_channels = ARRAY_SIZE(scl3300_channels),
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.num_accel_scales = ARRAY_SIZE(scl3300_accel_scale)*2,
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.accel_scale = scl3300_accel_scale,
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.accel_scale_map = scl3300_accel_scale_map,
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.incli_scale = scl3300_incli_scale,
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.incli_scale_map = scl3300_incli_scale_map,
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.num_incli_scales = ARRAY_SIZE(scl3300_incli_scale)*2,
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.num_freqs = ARRAY_SIZE(scl3300_lp_freq),
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.freq_table = scl3300_lp_freq,
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.freq_map = scl3300_lp_freq_map,
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.avail_modes_table = scl3300_avail_modes_map,
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.num_avail_modes = 3,
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.chip_id = SCL3300_WHOAMI_ID,
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.angle_supported = true,
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},
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};
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DECLARE_CRC8_TABLE(sca3300_crc_table);
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static int sca3300_transfer(struct sca3300_data *sca_data, int *val)
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{
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/* Consecutive requests min. 10 us delay (Datasheet section 5.1.2) */
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struct spi_delay delay = { .value = 10, .unit = SPI_DELAY_UNIT_USECS };
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int32_t ret;
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int rs;
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u8 crc;
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struct spi_transfer xfers[2] = {
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{
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.tx_buf = sca_data->txbuf,
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.len = ARRAY_SIZE(sca_data->txbuf),
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.delay = delay,
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.cs_change = 1,
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},
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{
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.rx_buf = sca_data->rxbuf,
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.len = ARRAY_SIZE(sca_data->rxbuf),
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.delay = delay,
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}
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};
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/* inverted crc value as described in device data sheet */
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crc = ~crc8(sca3300_crc_table, &sca_data->txbuf[0], 3, CRC8_INIT_VALUE);
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sca_data->txbuf[3] = crc;
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ret = spi_sync_transfer(sca_data->spi, xfers, ARRAY_SIZE(xfers));
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if (ret) {
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dev_err(&sca_data->spi->dev,
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"transfer error, error: %d\n", ret);
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return -EIO;
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}
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crc = ~crc8(sca3300_crc_table, &sca_data->rxbuf[0], 3, CRC8_INIT_VALUE);
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if (sca_data->rxbuf[3] != crc) {
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dev_err(&sca_data->spi->dev, "CRC checksum mismatch");
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return -EIO;
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}
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/* get return status */
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rs = sca_data->rxbuf[0] & SCA3300_MASK_RS_STATUS;
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if (rs == SCA3300_VALUE_RS_ERROR)
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ret = -EINVAL;
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*val = sign_extend32(get_unaligned_be16(&sca_data->rxbuf[1]), 15);
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return ret;
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}
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static int sca3300_error_handler(struct sca3300_data *sca_data)
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{
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int ret;
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int val;
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mutex_lock(&sca_data->lock);
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sca_data->txbuf[0] = SCA3300_REG_STATUS << 2;
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ret = sca3300_transfer(sca_data, &val);
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mutex_unlock(&sca_data->lock);
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/*
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* Return status error is cleared after reading status register once,
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* expect EINVAL here.
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*/
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if (ret != -EINVAL) {
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dev_err(&sca_data->spi->dev,
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"error reading device status: %d\n", ret);
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return ret;
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}
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dev_err(&sca_data->spi->dev, "device status: 0x%lx\n",
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val & SCA3300_STATUS_MASK);
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return 0;
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}
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static int sca3300_read_reg(struct sca3300_data *sca_data, u8 reg, int *val)
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{
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int ret;
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mutex_lock(&sca_data->lock);
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sca_data->txbuf[0] = reg << 2;
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ret = sca3300_transfer(sca_data, val);
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mutex_unlock(&sca_data->lock);
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if (ret != -EINVAL)
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return ret;
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return sca3300_error_handler(sca_data);
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}
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static int sca3300_write_reg(struct sca3300_data *sca_data, u8 reg, int val)
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{
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int reg_val = 0;
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int ret;
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mutex_lock(&sca_data->lock);
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/* BIT(7) for write operation */
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sca_data->txbuf[0] = BIT(7) | (reg << 2);
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put_unaligned_be16(val, &sca_data->txbuf[1]);
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ret = sca3300_transfer(sca_data, ®_val);
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mutex_unlock(&sca_data->lock);
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if (ret != -EINVAL)
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return ret;
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return sca3300_error_handler(sca_data);
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}
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static int sca3300_set_op_mode(struct sca3300_data *sca_data, int index)
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{
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if ((index < 0) || (index >= sca_data->chip->num_avail_modes))
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return -EINVAL;
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return sca3300_write_reg(sca_data, SCA3300_REG_MODE,
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sca_data->chip->avail_modes_table[index]);
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}
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static int sca3300_get_op_mode(struct sca3300_data *sca_data, int *index)
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{
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int reg_val;
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int ret;
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int i;
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ret = sca3300_read_reg(sca_data, SCA3300_REG_MODE, ®_val);
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if (ret)
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return ret;
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for (i = 0; i < sca_data->chip->num_avail_modes; i++) {
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if (sca_data->chip->avail_modes_table[i] == reg_val)
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break;
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}
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if (i == sca_data->chip->num_avail_modes)
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return -EINVAL;
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*index = i;
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return 0;
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}
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static int sca3300_set_frequency(struct sca3300_data *data, int val)
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{
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const struct sca3300_chip_info *chip = data->chip;
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unsigned int index;
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int *opmode_scale;
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int *new_scale;
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unsigned int i;
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if (sca3300_get_op_mode(data, &index))
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return -EINVAL;
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/*
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* Find a mode in which the requested sampling frequency is available
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* and the scaling currently set is retained.
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*/
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opmode_scale = (int *)chip->accel_scale[chip->accel_scale_map[index]];
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for (i = 0; i < chip->num_avail_modes; i++) {
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new_scale = (int *)chip->accel_scale[chip->accel_scale_map[i]];
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if ((val == chip->freq_table[chip->freq_map[i]]) &&
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(opmode_scale[1] == new_scale[1]) &&
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(opmode_scale[0] == new_scale[0]))
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break;
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}
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if (i == chip->num_avail_modes)
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return -EINVAL;
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return sca3300_set_op_mode(data, i);
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}
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static int sca3300_write_raw(struct iio_dev *indio_dev,
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struct iio_chan_spec const *chan,
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int val, int val2, long mask)
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{
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struct sca3300_data *data = iio_priv(indio_dev);
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int index;
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int i;
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switch (mask) {
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case IIO_CHAN_INFO_SCALE:
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if (chan->type != IIO_ACCEL)
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return -EINVAL;
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/*
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* Letting scale take priority over sampling frequency.
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* That makes sense given we can only ever end up increasing
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* the sampling frequency which is unlikely to be a problem.
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*/
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for (i = 0; i < data->chip->num_avail_modes; i++) {
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index = data->chip->accel_scale_map[i];
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if ((val == data->chip->accel_scale[index][0]) &&
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(val2 == data->chip->accel_scale[index][1]))
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return sca3300_set_op_mode(data, i);
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}
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return -EINVAL;
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case IIO_CHAN_INFO_LOW_PASS_FILTER_3DB_FREQUENCY:
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return sca3300_set_frequency(data, val);
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default:
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return -EINVAL;
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}
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}
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static int sca3300_read_raw(struct iio_dev *indio_dev,
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struct iio_chan_spec const *chan,
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int *val, int *val2, long mask)
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{
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struct sca3300_data *data = iio_priv(indio_dev);
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int index;
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int ret;
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switch (mask) {
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case IIO_CHAN_INFO_RAW:
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ret = sca3300_read_reg(data, chan->address, val);
|
|
if (ret)
|
|
return ret;
|
|
return IIO_VAL_INT;
|
|
case IIO_CHAN_INFO_SCALE:
|
|
ret = sca3300_get_op_mode(data, &index);
|
|
if (ret)
|
|
return ret;
|
|
switch (chan->type) {
|
|
case IIO_INCLI:
|
|
index = data->chip->incli_scale_map[index];
|
|
*val = data->chip->incli_scale[index][0];
|
|
*val2 = data->chip->incli_scale[index][1];
|
|
return IIO_VAL_INT_PLUS_MICRO;
|
|
case IIO_ACCEL:
|
|
index = data->chip->accel_scale_map[index];
|
|
*val = data->chip->accel_scale[index][0];
|
|
*val2 = data->chip->accel_scale[index][1];
|
|
return IIO_VAL_INT_PLUS_MICRO;
|
|
default:
|
|
return -EINVAL;
|
|
}
|
|
case IIO_CHAN_INFO_LOW_PASS_FILTER_3DB_FREQUENCY:
|
|
ret = sca3300_get_op_mode(data, &index);
|
|
if (ret)
|
|
return ret;
|
|
index = data->chip->freq_map[index];
|
|
*val = data->chip->freq_table[index];
|
|
return IIO_VAL_INT;
|
|
default:
|
|
return -EINVAL;
|
|
}
|
|
}
|
|
|
|
static irqreturn_t sca3300_trigger_handler(int irq, void *p)
|
|
{
|
|
struct iio_poll_func *pf = p;
|
|
struct iio_dev *indio_dev = pf->indio_dev;
|
|
struct sca3300_data *data = iio_priv(indio_dev);
|
|
int bit, ret, val, i = 0;
|
|
s16 *channels = (s16 *)data->buffer;
|
|
|
|
for_each_set_bit(bit, indio_dev->active_scan_mask,
|
|
indio_dev->masklength) {
|
|
ret = sca3300_read_reg(data, indio_dev->channels[bit].address, &val);
|
|
if (ret) {
|
|
dev_err_ratelimited(&data->spi->dev,
|
|
"failed to read register, error: %d\n", ret);
|
|
/* handled, but bailing out due to errors */
|
|
goto out;
|
|
}
|
|
channels[i++] = val;
|
|
}
|
|
|
|
iio_push_to_buffers_with_timestamp(indio_dev, data->buffer,
|
|
iio_get_time_ns(indio_dev));
|
|
out:
|
|
iio_trigger_notify_done(indio_dev->trig);
|
|
|
|
return IRQ_HANDLED;
|
|
}
|
|
|
|
/*
|
|
* sca3300_init - Device init sequence. See datasheet rev 2 section
|
|
* 4.2 Start-Up Sequence for details.
|
|
*/
|
|
static int sca3300_init(struct sca3300_data *sca_data,
|
|
struct iio_dev *indio_dev)
|
|
{
|
|
int value = 0;
|
|
int ret;
|
|
int i;
|
|
|
|
ret = sca3300_write_reg(sca_data, SCA3300_REG_MODE,
|
|
SCA3300_MODE_SW_RESET);
|
|
if (ret)
|
|
return ret;
|
|
|
|
/*
|
|
* Wait 1ms after SW-reset command.
|
|
* Wait for the settling of signal paths,
|
|
* 15ms for SCA3300 and 25ms for SCL3300,
|
|
*/
|
|
usleep_range(26e3, 50e3);
|
|
|
|
ret = sca3300_read_reg(sca_data, SCA3300_REG_WHOAMI, &value);
|
|
if (ret)
|
|
return ret;
|
|
|
|
for (i = 0; i < ARRAY_SIZE(sca3300_chip_tbl); i++) {
|
|
if (sca3300_chip_tbl[i].chip_id == value)
|
|
break;
|
|
}
|
|
if (i == ARRAY_SIZE(sca3300_chip_tbl)) {
|
|
dev_err(&sca_data->spi->dev, "unknown chip id %x\n", value);
|
|
return -ENODEV;
|
|
}
|
|
|
|
sca_data->chip = &sca3300_chip_tbl[i];
|
|
|
|
if (sca_data->chip->angle_supported) {
|
|
ret = sca3300_write_reg(sca_data, SCL3300_REG_ANG_CTRL,
|
|
SCL3300_ANG_ENABLE);
|
|
if (ret)
|
|
return ret;
|
|
}
|
|
|
|
return 0;
|
|
}
|
|
|
|
static int sca3300_debugfs_reg_access(struct iio_dev *indio_dev,
|
|
unsigned int reg, unsigned int writeval,
|
|
unsigned int *readval)
|
|
{
|
|
struct sca3300_data *data = iio_priv(indio_dev);
|
|
int value;
|
|
int ret;
|
|
|
|
if (reg > SCA3300_REG_SELBANK)
|
|
return -EINVAL;
|
|
|
|
if (!readval)
|
|
return sca3300_write_reg(data, reg, writeval);
|
|
|
|
ret = sca3300_read_reg(data, reg, &value);
|
|
if (ret)
|
|
return ret;
|
|
|
|
*readval = value;
|
|
|
|
return 0;
|
|
}
|
|
|
|
static int sca3300_read_avail(struct iio_dev *indio_dev,
|
|
struct iio_chan_spec const *chan,
|
|
const int **vals, int *type, int *length,
|
|
long mask)
|
|
{
|
|
struct sca3300_data *data = iio_priv(indio_dev);
|
|
switch (mask) {
|
|
case IIO_CHAN_INFO_SCALE:
|
|
switch (chan->type) {
|
|
case IIO_INCLI:
|
|
*vals = (const int *)data->chip->incli_scale;
|
|
*length = data->chip->num_incli_scales;
|
|
*type = IIO_VAL_INT_PLUS_MICRO;
|
|
return IIO_AVAIL_LIST;
|
|
case IIO_ACCEL:
|
|
*vals = (const int *)data->chip->accel_scale;
|
|
*length = data->chip->num_accel_scales;
|
|
*type = IIO_VAL_INT_PLUS_MICRO;
|
|
return IIO_AVAIL_LIST;
|
|
default:
|
|
return -EINVAL;
|
|
}
|
|
case IIO_CHAN_INFO_LOW_PASS_FILTER_3DB_FREQUENCY:
|
|
*vals = (const int *)data->chip->freq_table;
|
|
*length = data->chip->num_freqs;
|
|
*type = IIO_VAL_INT;
|
|
return IIO_AVAIL_LIST;
|
|
default:
|
|
return -EINVAL;
|
|
}
|
|
}
|
|
|
|
static const struct iio_info sca3300_info = {
|
|
.read_raw = sca3300_read_raw,
|
|
.write_raw = sca3300_write_raw,
|
|
.debugfs_reg_access = &sca3300_debugfs_reg_access,
|
|
.read_avail = sca3300_read_avail,
|
|
};
|
|
|
|
static int sca3300_probe(struct spi_device *spi)
|
|
{
|
|
struct sca3300_data *sca_data;
|
|
struct iio_dev *indio_dev;
|
|
int ret;
|
|
|
|
indio_dev = devm_iio_device_alloc(&spi->dev, sizeof(*sca_data));
|
|
if (!indio_dev)
|
|
return -ENOMEM;
|
|
|
|
sca_data = iio_priv(indio_dev);
|
|
mutex_init(&sca_data->lock);
|
|
sca_data->spi = spi;
|
|
|
|
crc8_populate_msb(sca3300_crc_table, SCA3300_CRC8_POLYNOMIAL);
|
|
|
|
indio_dev->info = &sca3300_info;
|
|
|
|
ret = sca3300_init(sca_data, indio_dev);
|
|
if (ret) {
|
|
dev_err(&spi->dev, "failed to init device, error: %d\n", ret);
|
|
return ret;
|
|
}
|
|
|
|
indio_dev->name = sca_data->chip->name;
|
|
indio_dev->modes = INDIO_DIRECT_MODE;
|
|
indio_dev->channels = sca_data->chip->channels;
|
|
indio_dev->num_channels = sca_data->chip->num_channels;
|
|
indio_dev->available_scan_masks = sca_data->chip->scan_masks;
|
|
|
|
ret = devm_iio_triggered_buffer_setup(&spi->dev, indio_dev,
|
|
iio_pollfunc_store_time,
|
|
sca3300_trigger_handler, NULL);
|
|
if (ret) {
|
|
dev_err(&spi->dev,
|
|
"iio triggered buffer setup failed, error: %d\n", ret);
|
|
return ret;
|
|
}
|
|
|
|
ret = devm_iio_device_register(&spi->dev, indio_dev);
|
|
if (ret) {
|
|
dev_err(&spi->dev, "iio device register failed, error: %d\n",
|
|
ret);
|
|
}
|
|
|
|
return ret;
|
|
}
|
|
|
|
static const struct of_device_id sca3300_dt_ids[] = {
|
|
{ .compatible = "murata,sca3300"},
|
|
{ .compatible = "murata,scl3300"},
|
|
{}
|
|
};
|
|
MODULE_DEVICE_TABLE(of, sca3300_dt_ids);
|
|
|
|
static const struct spi_device_id sca3300_ids[] = {
|
|
{ "sca3300" },
|
|
{ "scl3300" },
|
|
{}
|
|
};
|
|
MODULE_DEVICE_TABLE(spi, sca3300_ids);
|
|
|
|
static struct spi_driver sca3300_driver = {
|
|
.driver = {
|
|
.name = SCA3300_ALIAS,
|
|
.of_match_table = sca3300_dt_ids,
|
|
},
|
|
.probe = sca3300_probe,
|
|
.id_table = sca3300_ids,
|
|
};
|
|
module_spi_driver(sca3300_driver);
|
|
|
|
MODULE_AUTHOR("Tomas Melin <tomas.melin@vaisala.com>");
|
|
MODULE_DESCRIPTION("Murata SCA3300 SPI Accelerometer");
|
|
MODULE_LICENSE("GPL v2");
|