340 lines
8.0 KiB
C
340 lines
8.0 KiB
C
/* SPDX-License-Identifier: GPL-2.0 */
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/*
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* R8A66597 HCD (Host Controller Driver)
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*
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* Copyright (C) 2006-2007 Renesas Solutions Corp.
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* Portions Copyright (C) 2004 Psion Teklogix (for NetBook PRO)
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* Portions Copyright (C) 2004-2005 David Brownell
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* Portions Copyright (C) 1999 Roman Weissgaerber
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*
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* Author : Yoshihiro Shimoda <shimoda.yoshihiro@renesas.com>
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*/
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#ifndef __R8A66597_H__
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#define __R8A66597_H__
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#include <linux/clk.h>
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#include <linux/usb/r8a66597.h>
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#define R8A66597_MAX_NUM_PIPE 10
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#define R8A66597_BUF_BSIZE 8
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#define R8A66597_MAX_DEVICE 10
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#define R8A66597_MAX_ROOT_HUB 2
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#define R8A66597_MAX_SAMPLING 5
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#define R8A66597_RH_POLL_TIME 10
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#define R8A66597_MAX_DMA_CHANNEL 2
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#define R8A66597_PIPE_NO_DMA R8A66597_MAX_DMA_CHANNEL
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#define check_bulk_or_isoc(pipenum) ((pipenum >= 1 && pipenum <= 5))
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#define check_interrupt(pipenum) ((pipenum >= 6 && pipenum <= 9))
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#define make_devsel(addr) (addr << 12)
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struct r8a66597_pipe_info {
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unsigned long timer_interval;
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u16 pipenum;
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u16 address; /* R8A66597 HCD usb address */
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u16 epnum;
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u16 maxpacket;
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u16 type;
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u16 bufnum;
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u16 buf_bsize;
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u16 interval;
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u16 dir_in;
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};
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struct r8a66597_pipe {
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struct r8a66597_pipe_info info;
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unsigned long fifoaddr;
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unsigned long fifosel;
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unsigned long fifoctr;
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unsigned long pipectr;
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unsigned long pipetre;
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unsigned long pipetrn;
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};
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struct r8a66597_td {
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struct r8a66597_pipe *pipe;
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struct urb *urb;
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struct list_head queue;
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u16 type;
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u16 pipenum;
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int iso_cnt;
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u16 address; /* R8A66597's USB address */
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u16 maxpacket;
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unsigned zero_packet:1;
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unsigned short_packet:1;
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unsigned set_address:1;
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};
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struct r8a66597_device {
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u16 address; /* R8A66597's USB address */
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u16 hub_port;
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u16 root_port;
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unsigned short ep_in_toggle;
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unsigned short ep_out_toggle;
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unsigned char pipe_cnt[R8A66597_MAX_NUM_PIPE];
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unsigned char dma_map;
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enum usb_device_state state;
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struct usb_device *udev;
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int usb_address;
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struct list_head device_list;
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};
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struct r8a66597_root_hub {
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u32 port;
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u16 old_syssts;
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int scount;
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struct r8a66597_device *dev;
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};
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struct r8a66597;
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struct r8a66597_timers {
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struct timer_list td;
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struct timer_list interval;
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struct r8a66597 *r8a66597;
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};
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struct r8a66597 {
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spinlock_t lock;
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void __iomem *reg;
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struct clk *clk;
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struct r8a66597_platdata *pdata;
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struct r8a66597_device device0;
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struct r8a66597_root_hub root_hub[R8A66597_MAX_ROOT_HUB];
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struct list_head pipe_queue[R8A66597_MAX_NUM_PIPE];
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struct timer_list rh_timer;
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struct r8a66597_timers timers[R8A66597_MAX_NUM_PIPE];
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unsigned short address_map;
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unsigned short timeout_map;
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unsigned short interval_map;
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unsigned char pipe_cnt[R8A66597_MAX_NUM_PIPE];
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unsigned char dma_map;
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unsigned int max_root_hub;
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struct list_head child_device;
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unsigned long child_connect_map[4];
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unsigned bus_suspended:1;
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unsigned irq_sense_low:1;
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};
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static inline struct r8a66597 *hcd_to_r8a66597(struct usb_hcd *hcd)
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{
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return (struct r8a66597 *)(hcd->hcd_priv);
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}
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static inline struct usb_hcd *r8a66597_to_hcd(struct r8a66597 *r8a66597)
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{
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return container_of((void *)r8a66597, struct usb_hcd, hcd_priv);
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}
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static inline struct r8a66597_td *r8a66597_get_td(struct r8a66597 *r8a66597,
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u16 pipenum)
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{
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if (unlikely(list_empty(&r8a66597->pipe_queue[pipenum])))
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return NULL;
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return list_entry(r8a66597->pipe_queue[pipenum].next,
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struct r8a66597_td, queue);
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}
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static inline struct urb *r8a66597_get_urb(struct r8a66597 *r8a66597,
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u16 pipenum)
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{
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struct r8a66597_td *td;
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td = r8a66597_get_td(r8a66597, pipenum);
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return (td ? td->urb : NULL);
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}
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static inline u16 r8a66597_read(struct r8a66597 *r8a66597, unsigned long offset)
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{
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return ioread16(r8a66597->reg + offset);
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}
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static inline void r8a66597_read_fifo(struct r8a66597 *r8a66597,
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unsigned long offset, u16 *buf,
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int len)
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{
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void __iomem *fifoaddr = r8a66597->reg + offset;
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unsigned long count;
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if (r8a66597->pdata->on_chip) {
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count = len / 4;
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ioread32_rep(fifoaddr, buf, count);
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if (len & 0x00000003) {
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unsigned long tmp = ioread32(fifoaddr);
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memcpy((unsigned char *)buf + count * 4, &tmp,
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len & 0x03);
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}
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} else {
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len = (len + 1) / 2;
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ioread16_rep(fifoaddr, buf, len);
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}
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}
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static inline void r8a66597_write(struct r8a66597 *r8a66597, u16 val,
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unsigned long offset)
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{
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iowrite16(val, r8a66597->reg + offset);
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}
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static inline void r8a66597_mdfy(struct r8a66597 *r8a66597,
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u16 val, u16 pat, unsigned long offset)
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{
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u16 tmp;
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tmp = r8a66597_read(r8a66597, offset);
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tmp = tmp & (~pat);
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tmp = tmp | val;
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r8a66597_write(r8a66597, tmp, offset);
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}
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#define r8a66597_bclr(r8a66597, val, offset) \
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r8a66597_mdfy(r8a66597, 0, val, offset)
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#define r8a66597_bset(r8a66597, val, offset) \
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r8a66597_mdfy(r8a66597, val, 0, offset)
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static inline void r8a66597_write_fifo(struct r8a66597 *r8a66597,
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struct r8a66597_pipe *pipe, u16 *buf,
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int len)
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{
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void __iomem *fifoaddr = r8a66597->reg + pipe->fifoaddr;
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unsigned long count;
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unsigned char *pb;
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int i;
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if (r8a66597->pdata->on_chip) {
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count = len / 4;
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iowrite32_rep(fifoaddr, buf, count);
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if (len & 0x00000003) {
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pb = (unsigned char *)buf + count * 4;
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for (i = 0; i < (len & 0x00000003); i++) {
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if (r8a66597_read(r8a66597, CFIFOSEL) & BIGEND)
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iowrite8(pb[i], fifoaddr + i);
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else
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iowrite8(pb[i], fifoaddr + 3 - i);
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}
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}
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} else {
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int odd = len & 0x0001;
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len = len / 2;
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iowrite16_rep(fifoaddr, buf, len);
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if (unlikely(odd)) {
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buf = &buf[len];
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if (r8a66597->pdata->wr0_shorted_to_wr1)
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r8a66597_bclr(r8a66597, MBW_16, pipe->fifosel);
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iowrite8((unsigned char)*buf, fifoaddr);
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if (r8a66597->pdata->wr0_shorted_to_wr1)
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r8a66597_bset(r8a66597, MBW_16, pipe->fifosel);
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}
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}
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}
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static inline unsigned long get_syscfg_reg(int port)
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{
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return port == 0 ? SYSCFG0 : SYSCFG1;
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}
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static inline unsigned long get_syssts_reg(int port)
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{
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return port == 0 ? SYSSTS0 : SYSSTS1;
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}
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static inline unsigned long get_dvstctr_reg(int port)
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{
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return port == 0 ? DVSTCTR0 : DVSTCTR1;
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}
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static inline unsigned long get_dmacfg_reg(int port)
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{
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return port == 0 ? DMA0CFG : DMA1CFG;
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}
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static inline unsigned long get_intenb_reg(int port)
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{
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return port == 0 ? INTENB1 : INTENB2;
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}
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static inline unsigned long get_intsts_reg(int port)
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{
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return port == 0 ? INTSTS1 : INTSTS2;
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}
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static inline u16 get_rh_usb_speed(struct r8a66597 *r8a66597, int port)
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{
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unsigned long dvstctr_reg = get_dvstctr_reg(port);
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return r8a66597_read(r8a66597, dvstctr_reg) & RHST;
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}
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static inline void r8a66597_port_power(struct r8a66597 *r8a66597, int port,
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int power)
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{
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unsigned long dvstctr_reg = get_dvstctr_reg(port);
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if (r8a66597->pdata->port_power) {
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r8a66597->pdata->port_power(port, power);
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} else {
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if (power)
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r8a66597_bset(r8a66597, VBOUT, dvstctr_reg);
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else
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r8a66597_bclr(r8a66597, VBOUT, dvstctr_reg);
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}
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}
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static inline u16 get_xtal_from_pdata(struct r8a66597_platdata *pdata)
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{
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u16 clock = 0;
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switch (pdata->xtal) {
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case R8A66597_PLATDATA_XTAL_12MHZ:
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clock = XTAL12;
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break;
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case R8A66597_PLATDATA_XTAL_24MHZ:
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clock = XTAL24;
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break;
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case R8A66597_PLATDATA_XTAL_48MHZ:
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clock = XTAL48;
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break;
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default:
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printk(KERN_ERR "r8a66597: platdata clock is wrong.\n");
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break;
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}
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return clock;
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}
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#define get_pipectr_addr(pipenum) (PIPE1CTR + (pipenum - 1) * 2)
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#define get_pipetre_addr(pipenum) (PIPE1TRE + (pipenum - 1) * 4)
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#define get_pipetrn_addr(pipenum) (PIPE1TRN + (pipenum - 1) * 4)
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#define get_devadd_addr(address) (DEVADD0 + address * 2)
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#define enable_irq_ready(r8a66597, pipenum) \
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enable_pipe_irq(r8a66597, pipenum, BRDYENB)
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#define disable_irq_ready(r8a66597, pipenum) \
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disable_pipe_irq(r8a66597, pipenum, BRDYENB)
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#define enable_irq_empty(r8a66597, pipenum) \
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enable_pipe_irq(r8a66597, pipenum, BEMPENB)
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#define disable_irq_empty(r8a66597, pipenum) \
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disable_pipe_irq(r8a66597, pipenum, BEMPENB)
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#define enable_irq_nrdy(r8a66597, pipenum) \
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enable_pipe_irq(r8a66597, pipenum, NRDYENB)
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#define disable_irq_nrdy(r8a66597, pipenum) \
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disable_pipe_irq(r8a66597, pipenum, NRDYENB)
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#endif /* __R8A66597_H__ */
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