651 lines
22 KiB
C
651 lines
22 KiB
C
/* SPDX-License-Identifier: GPL-2.0-only */
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/*
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* Fence mechanism for dma-buf to allow for asynchronous dma access
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*
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* Copyright (C) 2012 Canonical Ltd
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* Copyright (C) 2012 Texas Instruments
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*
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* Authors:
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* Rob Clark <robdclark@gmail.com>
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* Maarten Lankhorst <maarten.lankhorst@canonical.com>
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*/
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#ifndef __LINUX_DMA_FENCE_H
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#define __LINUX_DMA_FENCE_H
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#include <linux/err.h>
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#include <linux/wait.h>
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#include <linux/list.h>
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#include <linux/bitops.h>
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#include <linux/kref.h>
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#include <linux/sched.h>
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#include <linux/printk.h>
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#include <linux/rcupdate.h>
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struct dma_fence;
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struct dma_fence_ops;
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struct dma_fence_cb;
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/**
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* struct dma_fence - software synchronization primitive
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* @refcount: refcount for this fence
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* @ops: dma_fence_ops associated with this fence
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* @rcu: used for releasing fence with kfree_rcu
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* @cb_list: list of all callbacks to call
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* @lock: spin_lock_irqsave used for locking
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* @context: execution context this fence belongs to, returned by
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* dma_fence_context_alloc()
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* @seqno: the sequence number of this fence inside the execution context,
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* can be compared to decide which fence would be signaled later.
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* @flags: A mask of DMA_FENCE_FLAG_* defined below
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* @timestamp: Timestamp when the fence was signaled.
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* @error: Optional, only valid if < 0, must be set before calling
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* dma_fence_signal, indicates that the fence has completed with an error.
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*
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* the flags member must be manipulated and read using the appropriate
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* atomic ops (bit_*), so taking the spinlock will not be needed most
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* of the time.
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*
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* DMA_FENCE_FLAG_SIGNALED_BIT - fence is already signaled
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* DMA_FENCE_FLAG_TIMESTAMP_BIT - timestamp recorded for fence signaling
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* DMA_FENCE_FLAG_ENABLE_SIGNAL_BIT - enable_signaling might have been called
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* DMA_FENCE_FLAG_USER_BITS - start of the unused bits, can be used by the
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* implementer of the fence for its own purposes. Can be used in different
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* ways by different fence implementers, so do not rely on this.
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*
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* Since atomic bitops are used, this is not guaranteed to be the case.
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* Particularly, if the bit was set, but dma_fence_signal was called right
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* before this bit was set, it would have been able to set the
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* DMA_FENCE_FLAG_SIGNALED_BIT, before enable_signaling was called.
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* Adding a check for DMA_FENCE_FLAG_SIGNALED_BIT after setting
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* DMA_FENCE_FLAG_ENABLE_SIGNAL_BIT closes this race, and makes sure that
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* after dma_fence_signal was called, any enable_signaling call will have either
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* been completed, or never called at all.
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*/
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struct dma_fence {
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spinlock_t *lock;
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const struct dma_fence_ops *ops;
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/*
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* We clear the callback list on kref_put so that by the time we
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* release the fence it is unused. No one should be adding to the
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* cb_list that they don't themselves hold a reference for.
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*
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* The lifetime of the timestamp is similarly tied to both the
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* rcu freelist and the cb_list. The timestamp is only set upon
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* signaling while simultaneously notifying the cb_list. Ergo, we
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* only use either the cb_list of timestamp. Upon destruction,
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* neither are accessible, and so we can use the rcu. This means
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* that the cb_list is *only* valid until the signal bit is set,
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* and to read either you *must* hold a reference to the fence,
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* and not just the rcu_read_lock.
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*
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* Listed in chronological order.
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*/
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union {
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struct list_head cb_list;
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/* @cb_list replaced by @timestamp on dma_fence_signal() */
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ktime_t timestamp;
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/* @timestamp replaced by @rcu on dma_fence_release() */
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struct rcu_head rcu;
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};
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u64 context;
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u64 seqno;
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unsigned long flags;
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struct kref refcount;
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int error;
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};
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enum dma_fence_flag_bits {
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DMA_FENCE_FLAG_SIGNALED_BIT,
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DMA_FENCE_FLAG_TIMESTAMP_BIT,
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DMA_FENCE_FLAG_ENABLE_SIGNAL_BIT,
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DMA_FENCE_FLAG_USER_BITS, /* must always be last member */
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};
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typedef void (*dma_fence_func_t)(struct dma_fence *fence,
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struct dma_fence_cb *cb);
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/**
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* struct dma_fence_cb - callback for dma_fence_add_callback()
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* @node: used by dma_fence_add_callback() to append this struct to fence::cb_list
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* @func: dma_fence_func_t to call
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*
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* This struct will be initialized by dma_fence_add_callback(), additional
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* data can be passed along by embedding dma_fence_cb in another struct.
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*/
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struct dma_fence_cb {
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struct list_head node;
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dma_fence_func_t func;
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};
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/**
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* struct dma_fence_ops - operations implemented for fence
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*
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*/
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struct dma_fence_ops {
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/**
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* @use_64bit_seqno:
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*
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* True if this dma_fence implementation uses 64bit seqno, false
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* otherwise.
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*/
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bool use_64bit_seqno;
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/**
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* @get_driver_name:
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*
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* Returns the driver name. This is a callback to allow drivers to
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* compute the name at runtime, without having it to store permanently
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* for each fence, or build a cache of some sort.
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*
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* This callback is mandatory.
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*/
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const char * (*get_driver_name)(struct dma_fence *fence);
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/**
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* @get_timeline_name:
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*
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* Return the name of the context this fence belongs to. This is a
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* callback to allow drivers to compute the name at runtime, without
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* having it to store permanently for each fence, or build a cache of
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* some sort.
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*
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* This callback is mandatory.
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*/
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const char * (*get_timeline_name)(struct dma_fence *fence);
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/**
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* @enable_signaling:
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*
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* Enable software signaling of fence.
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*
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* For fence implementations that have the capability for hw->hw
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* signaling, they can implement this op to enable the necessary
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* interrupts, or insert commands into cmdstream, etc, to avoid these
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* costly operations for the common case where only hw->hw
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* synchronization is required. This is called in the first
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* dma_fence_wait() or dma_fence_add_callback() path to let the fence
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* implementation know that there is another driver waiting on the
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* signal (ie. hw->sw case).
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*
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* This function can be called from atomic context, but not
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* from irq context, so normal spinlocks can be used.
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*
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* A return value of false indicates the fence already passed,
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* or some failure occurred that made it impossible to enable
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* signaling. True indicates successful enabling.
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*
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* &dma_fence.error may be set in enable_signaling, but only when false
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* is returned.
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*
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* Since many implementations can call dma_fence_signal() even when before
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* @enable_signaling has been called there's a race window, where the
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* dma_fence_signal() might result in the final fence reference being
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* released and its memory freed. To avoid this, implementations of this
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* callback should grab their own reference using dma_fence_get(), to be
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* released when the fence is signalled (through e.g. the interrupt
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* handler).
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*
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* This callback is optional. If this callback is not present, then the
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* driver must always have signaling enabled.
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*/
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bool (*enable_signaling)(struct dma_fence *fence);
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/**
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* @signaled:
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*
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* Peek whether the fence is signaled, as a fastpath optimization for
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* e.g. dma_fence_wait() or dma_fence_add_callback(). Note that this
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* callback does not need to make any guarantees beyond that a fence
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* once indicates as signalled must always return true from this
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* callback. This callback may return false even if the fence has
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* completed already, in this case information hasn't propogated throug
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* the system yet. See also dma_fence_is_signaled().
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*
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* May set &dma_fence.error if returning true.
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*
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* This callback is optional.
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*/
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bool (*signaled)(struct dma_fence *fence);
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/**
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* @wait:
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*
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* Custom wait implementation, defaults to dma_fence_default_wait() if
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* not set.
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*
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* Deprecated and should not be used by new implementations. Only used
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* by existing implementations which need special handling for their
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* hardware reset procedure.
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*
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* Must return -ERESTARTSYS if the wait is intr = true and the wait was
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* interrupted, and remaining jiffies if fence has signaled, or 0 if wait
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* timed out. Can also return other error values on custom implementations,
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* which should be treated as if the fence is signaled. For example a hardware
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* lockup could be reported like that.
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*/
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signed long (*wait)(struct dma_fence *fence,
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bool intr, signed long timeout);
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/**
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* @release:
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*
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* Called on destruction of fence to release additional resources.
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* Can be called from irq context. This callback is optional. If it is
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* NULL, then dma_fence_free() is instead called as the default
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* implementation.
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*/
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void (*release)(struct dma_fence *fence);
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/**
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* @fence_value_str:
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*
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* Callback to fill in free-form debug info specific to this fence, like
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* the sequence number.
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*
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* This callback is optional.
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*/
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void (*fence_value_str)(struct dma_fence *fence, char *str, int size);
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/**
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* @timeline_value_str:
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*
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* Fills in the current value of the timeline as a string, like the
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* sequence number. Note that the specific fence passed to this function
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* should not matter, drivers should only use it to look up the
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* corresponding timeline structures.
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*/
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void (*timeline_value_str)(struct dma_fence *fence,
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char *str, int size);
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/**
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* @set_deadline:
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*
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* Callback to allow a fence waiter to inform the fence signaler of
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* an upcoming deadline, such as vblank, by which point the waiter
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* would prefer the fence to be signaled by. This is intended to
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* give feedback to the fence signaler to aid in power management
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* decisions, such as boosting GPU frequency.
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*
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* This is called without &dma_fence.lock held, it can be called
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* multiple times and from any context. Locking is up to the callee
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* if it has some state to manage. If multiple deadlines are set,
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* the expectation is to track the soonest one. If the deadline is
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* before the current time, it should be interpreted as an immediate
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* deadline.
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*
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* This callback is optional.
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*/
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void (*set_deadline)(struct dma_fence *fence, ktime_t deadline);
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};
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void dma_fence_init(struct dma_fence *fence, const struct dma_fence_ops *ops,
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spinlock_t *lock, u64 context, u64 seqno);
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void dma_fence_release(struct kref *kref);
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void dma_fence_free(struct dma_fence *fence);
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void dma_fence_describe(struct dma_fence *fence, struct seq_file *seq);
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/**
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* dma_fence_put - decreases refcount of the fence
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* @fence: fence to reduce refcount of
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*/
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static inline void dma_fence_put(struct dma_fence *fence)
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{
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if (fence)
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kref_put(&fence->refcount, dma_fence_release);
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}
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/**
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* dma_fence_get - increases refcount of the fence
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* @fence: fence to increase refcount of
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*
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* Returns the same fence, with refcount increased by 1.
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*/
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static inline struct dma_fence *dma_fence_get(struct dma_fence *fence)
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{
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if (fence)
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kref_get(&fence->refcount);
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return fence;
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}
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/**
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* dma_fence_get_rcu - get a fence from a dma_resv_list with
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* rcu read lock
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* @fence: fence to increase refcount of
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*
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* Function returns NULL if no refcount could be obtained, or the fence.
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*/
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static inline struct dma_fence *dma_fence_get_rcu(struct dma_fence *fence)
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{
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if (kref_get_unless_zero(&fence->refcount))
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return fence;
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else
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return NULL;
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}
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/**
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* dma_fence_get_rcu_safe - acquire a reference to an RCU tracked fence
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* @fencep: pointer to fence to increase refcount of
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*
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* Function returns NULL if no refcount could be obtained, or the fence.
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* This function handles acquiring a reference to a fence that may be
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* reallocated within the RCU grace period (such as with SLAB_TYPESAFE_BY_RCU),
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* so long as the caller is using RCU on the pointer to the fence.
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*
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* An alternative mechanism is to employ a seqlock to protect a bunch of
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* fences, such as used by struct dma_resv. When using a seqlock,
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* the seqlock must be taken before and checked after a reference to the
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* fence is acquired (as shown here).
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*
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* The caller is required to hold the RCU read lock.
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*/
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static inline struct dma_fence *
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dma_fence_get_rcu_safe(struct dma_fence __rcu **fencep)
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{
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do {
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struct dma_fence *fence;
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fence = rcu_dereference(*fencep);
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if (!fence)
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return NULL;
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if (!dma_fence_get_rcu(fence))
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continue;
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/* The atomic_inc_not_zero() inside dma_fence_get_rcu()
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* provides a full memory barrier upon success (such as now).
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* This is paired with the write barrier from assigning
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* to the __rcu protected fence pointer so that if that
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* pointer still matches the current fence, we know we
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* have successfully acquire a reference to it. If it no
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* longer matches, we are holding a reference to some other
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* reallocated pointer. This is possible if the allocator
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* is using a freelist like SLAB_TYPESAFE_BY_RCU where the
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* fence remains valid for the RCU grace period, but it
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* may be reallocated. When using such allocators, we are
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* responsible for ensuring the reference we get is to
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* the right fence, as below.
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*/
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if (fence == rcu_access_pointer(*fencep))
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return rcu_pointer_handoff(fence);
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dma_fence_put(fence);
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} while (1);
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}
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#ifdef CONFIG_LOCKDEP
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bool dma_fence_begin_signalling(void);
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void dma_fence_end_signalling(bool cookie);
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void __dma_fence_might_wait(void);
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#else
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static inline bool dma_fence_begin_signalling(void)
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{
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return true;
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}
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static inline void dma_fence_end_signalling(bool cookie) {}
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static inline void __dma_fence_might_wait(void) {}
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#endif
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int dma_fence_signal(struct dma_fence *fence);
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int dma_fence_signal_locked(struct dma_fence *fence);
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int dma_fence_signal_timestamp(struct dma_fence *fence, ktime_t timestamp);
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int dma_fence_signal_timestamp_locked(struct dma_fence *fence,
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ktime_t timestamp);
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signed long dma_fence_default_wait(struct dma_fence *fence,
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bool intr, signed long timeout);
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int dma_fence_add_callback(struct dma_fence *fence,
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struct dma_fence_cb *cb,
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dma_fence_func_t func);
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bool dma_fence_remove_callback(struct dma_fence *fence,
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struct dma_fence_cb *cb);
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void dma_fence_enable_sw_signaling(struct dma_fence *fence);
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/**
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* dma_fence_is_signaled_locked - Return an indication if the fence
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* is signaled yet.
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* @fence: the fence to check
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*
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* Returns true if the fence was already signaled, false if not. Since this
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* function doesn't enable signaling, it is not guaranteed to ever return
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* true if dma_fence_add_callback(), dma_fence_wait() or
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* dma_fence_enable_sw_signaling() haven't been called before.
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*
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* This function requires &dma_fence.lock to be held.
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*
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* See also dma_fence_is_signaled().
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*/
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static inline bool
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dma_fence_is_signaled_locked(struct dma_fence *fence)
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{
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if (test_bit(DMA_FENCE_FLAG_SIGNALED_BIT, &fence->flags))
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return true;
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if (fence->ops->signaled && fence->ops->signaled(fence)) {
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dma_fence_signal_locked(fence);
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return true;
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}
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return false;
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}
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/**
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* dma_fence_is_signaled - Return an indication if the fence is signaled yet.
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* @fence: the fence to check
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*
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* Returns true if the fence was already signaled, false if not. Since this
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* function doesn't enable signaling, it is not guaranteed to ever return
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* true if dma_fence_add_callback(), dma_fence_wait() or
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* dma_fence_enable_sw_signaling() haven't been called before.
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*
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* It's recommended for seqno fences to call dma_fence_signal when the
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* operation is complete, it makes it possible to prevent issues from
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* wraparound between time of issue and time of use by checking the return
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* value of this function before calling hardware-specific wait instructions.
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*
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* See also dma_fence_is_signaled_locked().
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*/
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static inline bool
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dma_fence_is_signaled(struct dma_fence *fence)
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{
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if (test_bit(DMA_FENCE_FLAG_SIGNALED_BIT, &fence->flags))
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return true;
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if (fence->ops->signaled && fence->ops->signaled(fence)) {
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dma_fence_signal(fence);
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return true;
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}
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return false;
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}
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/**
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* __dma_fence_is_later - return if f1 is chronologically later than f2
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* @f1: the first fence's seqno
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* @f2: the second fence's seqno from the same context
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* @ops: dma_fence_ops associated with the seqno
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*
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* Returns true if f1 is chronologically later than f2. Both fences must be
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* from the same context, since a seqno is not common across contexts.
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*/
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static inline bool __dma_fence_is_later(u64 f1, u64 f2,
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const struct dma_fence_ops *ops)
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{
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/* This is for backward compatibility with drivers which can only handle
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* 32bit sequence numbers. Use a 64bit compare when the driver says to
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* do so.
|
|
*/
|
|
if (ops->use_64bit_seqno)
|
|
return f1 > f2;
|
|
|
|
return (int)(lower_32_bits(f1) - lower_32_bits(f2)) > 0;
|
|
}
|
|
|
|
/**
|
|
* dma_fence_is_later - return if f1 is chronologically later than f2
|
|
* @f1: the first fence from the same context
|
|
* @f2: the second fence from the same context
|
|
*
|
|
* Returns true if f1 is chronologically later than f2. Both fences must be
|
|
* from the same context, since a seqno is not re-used across contexts.
|
|
*/
|
|
static inline bool dma_fence_is_later(struct dma_fence *f1,
|
|
struct dma_fence *f2)
|
|
{
|
|
if (WARN_ON(f1->context != f2->context))
|
|
return false;
|
|
|
|
return __dma_fence_is_later(f1->seqno, f2->seqno, f1->ops);
|
|
}
|
|
|
|
/**
|
|
* dma_fence_later - return the chronologically later fence
|
|
* @f1: the first fence from the same context
|
|
* @f2: the second fence from the same context
|
|
*
|
|
* Returns NULL if both fences are signaled, otherwise the fence that would be
|
|
* signaled last. Both fences must be from the same context, since a seqno is
|
|
* not re-used across contexts.
|
|
*/
|
|
static inline struct dma_fence *dma_fence_later(struct dma_fence *f1,
|
|
struct dma_fence *f2)
|
|
{
|
|
if (WARN_ON(f1->context != f2->context))
|
|
return NULL;
|
|
|
|
/*
|
|
* Can't check just DMA_FENCE_FLAG_SIGNALED_BIT here, it may never
|
|
* have been set if enable_signaling wasn't called, and enabling that
|
|
* here is overkill.
|
|
*/
|
|
if (dma_fence_is_later(f1, f2))
|
|
return dma_fence_is_signaled(f1) ? NULL : f1;
|
|
else
|
|
return dma_fence_is_signaled(f2) ? NULL : f2;
|
|
}
|
|
|
|
/**
|
|
* dma_fence_get_status_locked - returns the status upon completion
|
|
* @fence: the dma_fence to query
|
|
*
|
|
* Drivers can supply an optional error status condition before they signal
|
|
* the fence (to indicate whether the fence was completed due to an error
|
|
* rather than success). The value of the status condition is only valid
|
|
* if the fence has been signaled, dma_fence_get_status_locked() first checks
|
|
* the signal state before reporting the error status.
|
|
*
|
|
* Returns 0 if the fence has not yet been signaled, 1 if the fence has
|
|
* been signaled without an error condition, or a negative error code
|
|
* if the fence has been completed in err.
|
|
*/
|
|
static inline int dma_fence_get_status_locked(struct dma_fence *fence)
|
|
{
|
|
if (dma_fence_is_signaled_locked(fence))
|
|
return fence->error ?: 1;
|
|
else
|
|
return 0;
|
|
}
|
|
|
|
int dma_fence_get_status(struct dma_fence *fence);
|
|
|
|
/**
|
|
* dma_fence_set_error - flag an error condition on the fence
|
|
* @fence: the dma_fence
|
|
* @error: the error to store
|
|
*
|
|
* Drivers can supply an optional error status condition before they signal
|
|
* the fence, to indicate that the fence was completed due to an error
|
|
* rather than success. This must be set before signaling (so that the value
|
|
* is visible before any waiters on the signal callback are woken). This
|
|
* helper exists to help catching erroneous setting of #dma_fence.error.
|
|
*/
|
|
static inline void dma_fence_set_error(struct dma_fence *fence,
|
|
int error)
|
|
{
|
|
WARN_ON(test_bit(DMA_FENCE_FLAG_SIGNALED_BIT, &fence->flags));
|
|
WARN_ON(error >= 0 || error < -MAX_ERRNO);
|
|
|
|
fence->error = error;
|
|
}
|
|
|
|
signed long dma_fence_wait_timeout(struct dma_fence *,
|
|
bool intr, signed long timeout);
|
|
signed long dma_fence_wait_any_timeout(struct dma_fence **fences,
|
|
uint32_t count,
|
|
bool intr, signed long timeout,
|
|
uint32_t *idx);
|
|
|
|
/**
|
|
* dma_fence_wait - sleep until the fence gets signaled
|
|
* @fence: the fence to wait on
|
|
* @intr: if true, do an interruptible wait
|
|
*
|
|
* This function will return -ERESTARTSYS if interrupted by a signal,
|
|
* or 0 if the fence was signaled. Other error values may be
|
|
* returned on custom implementations.
|
|
*
|
|
* Performs a synchronous wait on this fence. It is assumed the caller
|
|
* directly or indirectly holds a reference to the fence, otherwise the
|
|
* fence might be freed before return, resulting in undefined behavior.
|
|
*
|
|
* See also dma_fence_wait_timeout() and dma_fence_wait_any_timeout().
|
|
*/
|
|
static inline signed long dma_fence_wait(struct dma_fence *fence, bool intr)
|
|
{
|
|
signed long ret;
|
|
|
|
/* Since dma_fence_wait_timeout cannot timeout with
|
|
* MAX_SCHEDULE_TIMEOUT, only valid return values are
|
|
* -ERESTARTSYS and MAX_SCHEDULE_TIMEOUT.
|
|
*/
|
|
ret = dma_fence_wait_timeout(fence, intr, MAX_SCHEDULE_TIMEOUT);
|
|
|
|
return ret < 0 ? ret : 0;
|
|
}
|
|
|
|
void dma_fence_set_deadline(struct dma_fence *fence, ktime_t deadline);
|
|
|
|
struct dma_fence *dma_fence_get_stub(void);
|
|
struct dma_fence *dma_fence_allocate_private_stub(ktime_t timestamp);
|
|
u64 dma_fence_context_alloc(unsigned num);
|
|
|
|
extern const struct dma_fence_ops dma_fence_array_ops;
|
|
extern const struct dma_fence_ops dma_fence_chain_ops;
|
|
|
|
/**
|
|
* dma_fence_is_array - check if a fence is from the array subclass
|
|
* @fence: the fence to test
|
|
*
|
|
* Return true if it is a dma_fence_array and false otherwise.
|
|
*/
|
|
static inline bool dma_fence_is_array(struct dma_fence *fence)
|
|
{
|
|
return fence->ops == &dma_fence_array_ops;
|
|
}
|
|
|
|
/**
|
|
* dma_fence_is_chain - check if a fence is from the chain subclass
|
|
* @fence: the fence to test
|
|
*
|
|
* Return true if it is a dma_fence_chain and false otherwise.
|
|
*/
|
|
static inline bool dma_fence_is_chain(struct dma_fence *fence)
|
|
{
|
|
return fence->ops == &dma_fence_chain_ops;
|
|
}
|
|
|
|
/**
|
|
* dma_fence_is_container - check if a fence is a container for other fences
|
|
* @fence: the fence to test
|
|
*
|
|
* Return true if this fence is a container for other fences, false otherwise.
|
|
* This is important since we can't build up large fence structure or otherwise
|
|
* we run into recursion during operation on those fences.
|
|
*/
|
|
static inline bool dma_fence_is_container(struct dma_fence *fence)
|
|
{
|
|
return dma_fence_is_array(fence) || dma_fence_is_chain(fence);
|
|
}
|
|
|
|
#endif /* __LINUX_DMA_FENCE_H */
|