572 lines
16 KiB
C
572 lines
16 KiB
C
/* SPDX-License-Identifier: (GPL-2.0 OR Linux-OpenIB) OR BSD-2-Clause */
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/* Copyright(c) 2023 Advanced Micro Devices, Inc. */
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#ifndef _PDS_CORE_IF_H_
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#define _PDS_CORE_IF_H_
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#define PCI_VENDOR_ID_PENSANDO 0x1dd8
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#define PCI_DEVICE_ID_PENSANDO_CORE_PF 0x100c
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#define PCI_DEVICE_ID_VIRTIO_NET_TRANS 0x1000
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#define PCI_DEVICE_ID_PENSANDO_IONIC_ETH_VF 0x1003
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#define PCI_DEVICE_ID_PENSANDO_VDPA_VF 0x100b
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#define PDS_CORE_BARS_MAX 4
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#define PDS_CORE_PCI_BAR_DBELL 1
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/* Bar0 */
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#define PDS_CORE_DEV_INFO_SIGNATURE 0x44455649 /* 'DEVI' */
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#define PDS_CORE_BAR0_SIZE 0x8000
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#define PDS_CORE_BAR0_DEV_INFO_REGS_OFFSET 0x0000
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#define PDS_CORE_BAR0_DEV_CMD_REGS_OFFSET 0x0800
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#define PDS_CORE_BAR0_DEV_CMD_DATA_REGS_OFFSET 0x0c00
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#define PDS_CORE_BAR0_INTR_STATUS_OFFSET 0x1000
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#define PDS_CORE_BAR0_INTR_CTRL_OFFSET 0x2000
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#define PDS_CORE_DEV_CMD_DONE 0x00000001
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#define PDS_CORE_DEVCMD_TIMEOUT 5
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#define PDS_CORE_CLIENT_ID 0
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#define PDS_CORE_ASIC_TYPE_CAPRI 0
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/*
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* enum pds_core_cmd_opcode - Device commands
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*/
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enum pds_core_cmd_opcode {
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/* Core init */
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PDS_CORE_CMD_NOP = 0,
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PDS_CORE_CMD_IDENTIFY = 1,
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PDS_CORE_CMD_RESET = 2,
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PDS_CORE_CMD_INIT = 3,
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PDS_CORE_CMD_FW_DOWNLOAD = 4,
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PDS_CORE_CMD_FW_CONTROL = 5,
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/* SR/IOV commands */
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PDS_CORE_CMD_VF_GETATTR = 60,
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PDS_CORE_CMD_VF_SETATTR = 61,
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PDS_CORE_CMD_VF_CTRL = 62,
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/* Add commands before this line */
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PDS_CORE_CMD_MAX,
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PDS_CORE_CMD_COUNT
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};
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/*
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* enum pds_core_status_code - Device command return codes
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*/
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enum pds_core_status_code {
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PDS_RC_SUCCESS = 0, /* Success */
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PDS_RC_EVERSION = 1, /* Incorrect version for request */
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PDS_RC_EOPCODE = 2, /* Invalid cmd opcode */
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PDS_RC_EIO = 3, /* I/O error */
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PDS_RC_EPERM = 4, /* Permission denied */
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PDS_RC_EQID = 5, /* Bad qid */
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PDS_RC_EQTYPE = 6, /* Bad qtype */
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PDS_RC_ENOENT = 7, /* No such element */
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PDS_RC_EINTR = 8, /* operation interrupted */
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PDS_RC_EAGAIN = 9, /* Try again */
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PDS_RC_ENOMEM = 10, /* Out of memory */
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PDS_RC_EFAULT = 11, /* Bad address */
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PDS_RC_EBUSY = 12, /* Device or resource busy */
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PDS_RC_EEXIST = 13, /* object already exists */
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PDS_RC_EINVAL = 14, /* Invalid argument */
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PDS_RC_ENOSPC = 15, /* No space left or alloc failure */
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PDS_RC_ERANGE = 16, /* Parameter out of range */
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PDS_RC_BAD_ADDR = 17, /* Descriptor contains a bad ptr */
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PDS_RC_DEV_CMD = 18, /* Device cmd attempted on AdminQ */
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PDS_RC_ENOSUPP = 19, /* Operation not supported */
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PDS_RC_ERROR = 29, /* Generic error */
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PDS_RC_ERDMA = 30, /* Generic RDMA error */
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PDS_RC_EVFID = 31, /* VF ID does not exist */
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PDS_RC_BAD_FW = 32, /* FW file is invalid or corrupted */
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PDS_RC_ECLIENT = 33, /* No such client id */
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};
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/**
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* struct pds_core_drv_identity - Driver identity information
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* @drv_type: Driver type (enum pds_core_driver_type)
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* @os_dist: OS distribution, numeric format
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* @os_dist_str: OS distribution, string format
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* @kernel_ver: Kernel version, numeric format
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* @kernel_ver_str: Kernel version, string format
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* @driver_ver_str: Driver version, string format
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*/
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struct pds_core_drv_identity {
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__le32 drv_type;
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__le32 os_dist;
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char os_dist_str[128];
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__le32 kernel_ver;
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char kernel_ver_str[32];
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char driver_ver_str[32];
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};
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#define PDS_DEV_TYPE_MAX 16
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/**
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* struct pds_core_dev_identity - Device identity information
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* @version: Version of device identify
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* @type: Identify type (0 for now)
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* @state: Device state
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* @rsvd: Word boundary padding
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* @nlifs: Number of LIFs provisioned
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* @nintrs: Number of interrupts provisioned
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* @ndbpgs_per_lif: Number of doorbell pages per LIF
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* @intr_coal_mult: Interrupt coalescing multiplication factor
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* Scale user-supplied interrupt coalescing
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* value in usecs to device units using:
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* device units = usecs * mult / div
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* @intr_coal_div: Interrupt coalescing division factor
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* Scale user-supplied interrupt coalescing
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* value in usecs to device units using:
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* device units = usecs * mult / div
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* @vif_types: How many of each VIF device type is supported
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*/
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struct pds_core_dev_identity {
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u8 version;
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u8 type;
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u8 state;
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u8 rsvd;
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__le32 nlifs;
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__le32 nintrs;
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__le32 ndbpgs_per_lif;
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__le32 intr_coal_mult;
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__le32 intr_coal_div;
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__le16 vif_types[PDS_DEV_TYPE_MAX];
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};
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#define PDS_CORE_IDENTITY_VERSION_1 1
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/**
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* struct pds_core_dev_identify_cmd - Driver/device identify command
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* @opcode: Opcode PDS_CORE_CMD_IDENTIFY
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* @ver: Highest version of identify supported by driver
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*
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* Expects to find driver identification info (struct pds_core_drv_identity)
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* in cmd_regs->data. Driver should keep the devcmd interface locked
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* while preparing the driver info.
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*/
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struct pds_core_dev_identify_cmd {
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u8 opcode;
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u8 ver;
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};
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/**
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* struct pds_core_dev_identify_comp - Device identify command completion
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* @status: Status of the command (enum pds_core_status_code)
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* @ver: Version of identify returned by device
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*
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* Device identification info (struct pds_core_dev_identity) can be found
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* in cmd_regs->data. Driver should keep the devcmd interface locked
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* while reading the results.
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*/
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struct pds_core_dev_identify_comp {
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u8 status;
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u8 ver;
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};
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/**
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* struct pds_core_dev_reset_cmd - Device reset command
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* @opcode: Opcode PDS_CORE_CMD_RESET
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*
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* Resets and clears all LIFs, VDevs, and VIFs on the device.
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*/
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struct pds_core_dev_reset_cmd {
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u8 opcode;
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};
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/**
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* struct pds_core_dev_reset_comp - Reset command completion
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* @status: Status of the command (enum pds_core_status_code)
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*/
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struct pds_core_dev_reset_comp {
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u8 status;
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};
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/*
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* struct pds_core_dev_init_data - Pointers and info needed for the Core
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* initialization PDS_CORE_CMD_INIT command. The in and out structs are
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* overlays on the pds_core_dev_cmd_regs.data space for passing data down
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* to the firmware on init, and then returning initialization results.
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*/
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struct pds_core_dev_init_data_in {
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__le64 adminq_q_base;
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__le64 adminq_cq_base;
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__le64 notifyq_cq_base;
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__le32 flags;
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__le16 intr_index;
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u8 adminq_ring_size;
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u8 notifyq_ring_size;
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};
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struct pds_core_dev_init_data_out {
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__le32 core_hw_index;
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__le32 adminq_hw_index;
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__le32 notifyq_hw_index;
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u8 adminq_hw_type;
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u8 notifyq_hw_type;
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};
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/**
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* struct pds_core_dev_init_cmd - Core device initialize
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* @opcode: opcode PDS_CORE_CMD_INIT
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*
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* Initializes the core device and sets up the AdminQ and NotifyQ.
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* Expects to find initialization data (struct pds_core_dev_init_data_in)
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* in cmd_regs->data. Driver should keep the devcmd interface locked
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* while preparing the driver info.
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*/
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struct pds_core_dev_init_cmd {
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u8 opcode;
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};
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/**
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* struct pds_core_dev_init_comp - Core init completion
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* @status: Status of the command (enum pds_core_status_code)
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*
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* Initialization result data (struct pds_core_dev_init_data_in)
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* is found in cmd_regs->data.
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*/
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struct pds_core_dev_init_comp {
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u8 status;
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};
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/**
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* struct pds_core_fw_download_cmd - Firmware download command
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* @opcode: opcode
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* @rsvd: Word boundary padding
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* @addr: DMA address of the firmware buffer
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* @offset: offset of the firmware buffer within the full image
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* @length: number of valid bytes in the firmware buffer
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*/
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struct pds_core_fw_download_cmd {
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u8 opcode;
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u8 rsvd[3];
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__le32 offset;
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__le64 addr;
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__le32 length;
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};
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/**
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* struct pds_core_fw_download_comp - Firmware download completion
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* @status: Status of the command (enum pds_core_status_code)
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*/
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struct pds_core_fw_download_comp {
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u8 status;
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};
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/**
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* enum pds_core_fw_control_oper - FW control operations
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* @PDS_CORE_FW_INSTALL_ASYNC: Install firmware asynchronously
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* @PDS_CORE_FW_INSTALL_STATUS: Firmware installation status
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* @PDS_CORE_FW_ACTIVATE_ASYNC: Activate firmware asynchronously
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* @PDS_CORE_FW_ACTIVATE_STATUS: Firmware activate status
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* @PDS_CORE_FW_UPDATE_CLEANUP: Cleanup any firmware update leftovers
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* @PDS_CORE_FW_GET_BOOT: Return current active firmware slot
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* @PDS_CORE_FW_SET_BOOT: Set active firmware slot for next boot
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* @PDS_CORE_FW_GET_LIST: Return list of installed firmware images
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*/
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enum pds_core_fw_control_oper {
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PDS_CORE_FW_INSTALL_ASYNC = 0,
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PDS_CORE_FW_INSTALL_STATUS = 1,
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PDS_CORE_FW_ACTIVATE_ASYNC = 2,
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PDS_CORE_FW_ACTIVATE_STATUS = 3,
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PDS_CORE_FW_UPDATE_CLEANUP = 4,
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PDS_CORE_FW_GET_BOOT = 5,
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PDS_CORE_FW_SET_BOOT = 6,
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PDS_CORE_FW_GET_LIST = 7,
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};
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enum pds_core_fw_slot {
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PDS_CORE_FW_SLOT_INVALID = 0,
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PDS_CORE_FW_SLOT_A = 1,
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PDS_CORE_FW_SLOT_B = 2,
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PDS_CORE_FW_SLOT_GOLD = 3,
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};
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/**
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* struct pds_core_fw_control_cmd - Firmware control command
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* @opcode: opcode
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* @rsvd: Word boundary padding
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* @oper: firmware control operation (enum pds_core_fw_control_oper)
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* @slot: slot to operate on (enum pds_core_fw_slot)
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*/
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struct pds_core_fw_control_cmd {
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u8 opcode;
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u8 rsvd[3];
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u8 oper;
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u8 slot;
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};
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/**
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* struct pds_core_fw_control_comp - Firmware control copletion
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* @status: Status of the command (enum pds_core_status_code)
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* @rsvd: Word alignment space
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* @slot: Slot number (enum pds_core_fw_slot)
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* @rsvd1: Struct padding
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* @color: Color bit
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*/
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struct pds_core_fw_control_comp {
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u8 status;
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u8 rsvd[3];
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u8 slot;
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u8 rsvd1[10];
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u8 color;
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};
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struct pds_core_fw_name_info {
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#define PDS_CORE_FWSLOT_BUFLEN 8
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#define PDS_CORE_FWVERS_BUFLEN 32
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char slotname[PDS_CORE_FWSLOT_BUFLEN];
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char fw_version[PDS_CORE_FWVERS_BUFLEN];
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};
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struct pds_core_fw_list_info {
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#define PDS_CORE_FWVERS_LIST_LEN 16
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u8 num_fw_slots;
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struct pds_core_fw_name_info fw_names[PDS_CORE_FWVERS_LIST_LEN];
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} __packed;
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enum pds_core_vf_attr {
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PDS_CORE_VF_ATTR_SPOOFCHK = 1,
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PDS_CORE_VF_ATTR_TRUST = 2,
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PDS_CORE_VF_ATTR_MAC = 3,
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PDS_CORE_VF_ATTR_LINKSTATE = 4,
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PDS_CORE_VF_ATTR_VLAN = 5,
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PDS_CORE_VF_ATTR_RATE = 6,
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PDS_CORE_VF_ATTR_STATSADDR = 7,
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};
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/**
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* enum pds_core_vf_link_status - Virtual Function link status
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* @PDS_CORE_VF_LINK_STATUS_AUTO: Use link state of the uplink
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* @PDS_CORE_VF_LINK_STATUS_UP: Link always up
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* @PDS_CORE_VF_LINK_STATUS_DOWN: Link always down
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*/
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enum pds_core_vf_link_status {
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PDS_CORE_VF_LINK_STATUS_AUTO = 0,
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PDS_CORE_VF_LINK_STATUS_UP = 1,
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PDS_CORE_VF_LINK_STATUS_DOWN = 2,
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};
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/**
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* struct pds_core_vf_setattr_cmd - Set VF attributes on the NIC
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* @opcode: Opcode
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* @attr: Attribute type (enum pds_core_vf_attr)
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* @vf_index: VF index
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* @macaddr: mac address
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* @vlanid: vlan ID
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* @maxrate: max Tx rate in Mbps
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* @spoofchk: enable address spoof checking
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* @trust: enable VF trust
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* @linkstate: set link up or down
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* @stats: stats addr struct
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* @stats.pa: set DMA address for VF stats
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* @stats.len: length of VF stats space
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* @pad: force union to specific size
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*/
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struct pds_core_vf_setattr_cmd {
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u8 opcode;
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u8 attr;
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__le16 vf_index;
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union {
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u8 macaddr[6];
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__le16 vlanid;
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__le32 maxrate;
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u8 spoofchk;
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u8 trust;
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u8 linkstate;
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struct {
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__le64 pa;
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__le32 len;
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} stats;
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u8 pad[60];
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} __packed;
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};
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struct pds_core_vf_setattr_comp {
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u8 status;
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u8 attr;
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__le16 vf_index;
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__le16 comp_index;
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u8 rsvd[9];
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u8 color;
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};
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/**
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* struct pds_core_vf_getattr_cmd - Get VF attributes from the NIC
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* @opcode: Opcode
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* @attr: Attribute type (enum pds_core_vf_attr)
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* @vf_index: VF index
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*/
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struct pds_core_vf_getattr_cmd {
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u8 opcode;
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u8 attr;
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__le16 vf_index;
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};
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struct pds_core_vf_getattr_comp {
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u8 status;
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u8 attr;
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__le16 vf_index;
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union {
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u8 macaddr[6];
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__le16 vlanid;
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__le32 maxrate;
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u8 spoofchk;
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u8 trust;
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u8 linkstate;
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__le64 stats_pa;
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u8 pad[11];
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} __packed;
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u8 color;
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};
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enum pds_core_vf_ctrl_opcode {
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PDS_CORE_VF_CTRL_START_ALL = 0,
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PDS_CORE_VF_CTRL_START = 1,
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};
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/**
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* struct pds_core_vf_ctrl_cmd - VF control command
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* @opcode: Opcode for the command
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* @ctrl_opcode: VF control operation type
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* @vf_index: VF Index. It is unused if op START_ALL is used.
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*/
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struct pds_core_vf_ctrl_cmd {
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u8 opcode;
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u8 ctrl_opcode;
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__le16 vf_index;
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};
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/**
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* struct pds_core_vf_ctrl_comp - VF_CTRL command completion.
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* @status: Status of the command (enum pds_core_status_code)
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*/
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struct pds_core_vf_ctrl_comp {
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u8 status;
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};
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/*
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* union pds_core_dev_cmd - Overlay of core device command structures
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*/
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union pds_core_dev_cmd {
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u8 opcode;
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u32 words[16];
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struct pds_core_dev_identify_cmd identify;
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struct pds_core_dev_init_cmd init;
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struct pds_core_dev_reset_cmd reset;
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struct pds_core_fw_download_cmd fw_download;
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struct pds_core_fw_control_cmd fw_control;
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struct pds_core_vf_setattr_cmd vf_setattr;
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struct pds_core_vf_getattr_cmd vf_getattr;
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struct pds_core_vf_ctrl_cmd vf_ctrl;
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};
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/*
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* union pds_core_dev_comp - Overlay of core device completion structures
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*/
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union pds_core_dev_comp {
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u8 status;
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u8 bytes[16];
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struct pds_core_dev_identify_comp identify;
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struct pds_core_dev_reset_comp reset;
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struct pds_core_dev_init_comp init;
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struct pds_core_fw_download_comp fw_download;
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struct pds_core_fw_control_comp fw_control;
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struct pds_core_vf_setattr_comp vf_setattr;
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struct pds_core_vf_getattr_comp vf_getattr;
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struct pds_core_vf_ctrl_comp vf_ctrl;
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};
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|
|
|
/**
|
|
* struct pds_core_dev_hwstamp_regs - Hardware current timestamp registers
|
|
* @tick_low: Low 32 bits of hardware timestamp
|
|
* @tick_high: High 32 bits of hardware timestamp
|
|
*/
|
|
struct pds_core_dev_hwstamp_regs {
|
|
u32 tick_low;
|
|
u32 tick_high;
|
|
};
|
|
|
|
/**
|
|
* struct pds_core_dev_info_regs - Device info register format (read-only)
|
|
* @signature: Signature value of 0x44455649 ('DEVI')
|
|
* @version: Current version of info
|
|
* @asic_type: Asic type
|
|
* @asic_rev: Asic revision
|
|
* @fw_status: Firmware status
|
|
* bit 0 - 1 = fw running
|
|
* bit 4-7 - 4 bit generation number, changes on fw restart
|
|
* @fw_heartbeat: Firmware heartbeat counter
|
|
* @serial_num: Serial number
|
|
* @fw_version: Firmware version
|
|
* @oprom_regs: oprom_regs to store oprom debug enable/disable and bmp
|
|
* @rsvd_pad1024: Struct padding
|
|
* @hwstamp: Hardware current timestamp registers
|
|
* @rsvd_pad2048: Struct padding
|
|
*/
|
|
struct pds_core_dev_info_regs {
|
|
#define PDS_CORE_DEVINFO_FWVERS_BUFLEN 32
|
|
#define PDS_CORE_DEVINFO_SERIAL_BUFLEN 32
|
|
u32 signature;
|
|
u8 version;
|
|
u8 asic_type;
|
|
u8 asic_rev;
|
|
#define PDS_CORE_FW_STS_F_STOPPED 0x00
|
|
#define PDS_CORE_FW_STS_F_RUNNING 0x01
|
|
#define PDS_CORE_FW_STS_F_GENERATION 0xF0
|
|
u8 fw_status;
|
|
__le32 fw_heartbeat;
|
|
char fw_version[PDS_CORE_DEVINFO_FWVERS_BUFLEN];
|
|
char serial_num[PDS_CORE_DEVINFO_SERIAL_BUFLEN];
|
|
u8 oprom_regs[32]; /* reserved */
|
|
u8 rsvd_pad1024[916];
|
|
struct pds_core_dev_hwstamp_regs hwstamp; /* on 1k boundary */
|
|
u8 rsvd_pad2048[1016];
|
|
} __packed;
|
|
|
|
/**
|
|
* struct pds_core_dev_cmd_regs - Device command register format (read-write)
|
|
* @doorbell: Device Cmd Doorbell, write-only
|
|
* Write a 1 to signal device to process cmd
|
|
* @done: Command completed indicator, poll for completion
|
|
* bit 0 == 1 when command is complete
|
|
* @cmd: Opcode-specific command bytes
|
|
* @comp: Opcode-specific response bytes
|
|
* @rsvd: Struct padding
|
|
* @data: Opcode-specific side-data
|
|
*/
|
|
struct pds_core_dev_cmd_regs {
|
|
u32 doorbell;
|
|
u32 done;
|
|
union pds_core_dev_cmd cmd;
|
|
union pds_core_dev_comp comp;
|
|
u8 rsvd[48];
|
|
u32 data[478];
|
|
} __packed;
|
|
|
|
/**
|
|
* struct pds_core_dev_regs - Device register format for bar 0 page 0
|
|
* @info: Device info registers
|
|
* @devcmd: Device command registers
|
|
*/
|
|
struct pds_core_dev_regs {
|
|
struct pds_core_dev_info_regs info;
|
|
struct pds_core_dev_cmd_regs devcmd;
|
|
} __packed;
|
|
|
|
#ifndef __CHECKER__
|
|
static_assert(sizeof(struct pds_core_drv_identity) <= 1912);
|
|
static_assert(sizeof(struct pds_core_dev_identity) <= 1912);
|
|
static_assert(sizeof(union pds_core_dev_cmd) == 64);
|
|
static_assert(sizeof(union pds_core_dev_comp) == 16);
|
|
static_assert(sizeof(struct pds_core_dev_info_regs) == 2048);
|
|
static_assert(sizeof(struct pds_core_dev_cmd_regs) == 2048);
|
|
static_assert(sizeof(struct pds_core_dev_regs) == 4096);
|
|
#endif /* __CHECKER__ */
|
|
|
|
#endif /* _PDS_CORE_IF_H_ */
|