370 lines
8.4 KiB
C
370 lines
8.4 KiB
C
// SPDX-License-Identifier: (GPL-2.0-only OR BSD-3-Clause)
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//
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// This file is provided under a dual BSD/GPLv2 license. When using or
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// redistributing this file, you may do so under either license.
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//
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// Copyright(c) 2022 Advanced Micro Devices, Inc.
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//
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// Authors: Ajit Kumar Pandey <AjitKumar.Pandey@amd.com>
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// V sujith kumar Reddy <Vsujithkumar.Reddy@amd.com>
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/*
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* Hardware interface for Renoir ACP block
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*/
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#include <linux/platform_device.h>
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#include <linux/module.h>
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#include <linux/err.h>
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#include <linux/io.h>
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#include <sound/pcm_params.h>
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#include <sound/soc.h>
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#include <sound/soc-dai.h>
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#include <linux/dma-mapping.h>
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#include "amd.h"
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#define DRV_NAME "acp_asoc_rembrandt"
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#define ACP6X_PGFSM_CONTROL 0x1024
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#define ACP6X_PGFSM_STATUS 0x1028
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#define ACP_SOFT_RESET_SOFTRESET_AUDDONE_MASK 0x00010001
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#define ACP_PGFSM_CNTL_POWER_ON_MASK 0x01
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#define ACP_PGFSM_CNTL_POWER_OFF_MASK 0x00
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#define ACP_PGFSM_STATUS_MASK 0x03
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#define ACP_POWERED_ON 0x00
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#define ACP_POWER_ON_IN_PROGRESS 0x01
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#define ACP_POWERED_OFF 0x02
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#define ACP_POWER_OFF_IN_PROGRESS 0x03
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#define ACP_ERROR_MASK 0x20000000
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#define ACP_EXT_INTR_STAT_CLEAR_MASK 0xFFFFFFFF
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static int rmb_acp_init(void __iomem *base);
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static int rmb_acp_deinit(void __iomem *base);
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static struct acp_resource rsrc = {
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.offset = 0,
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.no_of_ctrls = 2,
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.irqp_used = 1,
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.soc_mclk = true,
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.irq_reg_offset = 0x1a00,
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.i2s_pin_cfg_offset = 0x1440,
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.i2s_mode = 0x0a,
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.scratch_reg_offset = 0x12800,
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.sram_pte_offset = 0x03802800,
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};
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static struct snd_soc_acpi_codecs amp_rt1019 = {
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.num_codecs = 1,
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.codecs = {"10EC1019"}
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};
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static struct snd_soc_acpi_codecs amp_max = {
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.num_codecs = 1,
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.codecs = {"MX98360A"}
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};
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static struct snd_soc_acpi_mach snd_soc_acpi_amd_rmb_acp_machines[] = {
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{
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.id = "10508825",
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.drv_name = "rmb-nau8825-max",
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.machine_quirk = snd_soc_acpi_codec_list,
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.quirk_data = &_max,
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},
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{
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.id = "AMDI0007",
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.drv_name = "rembrandt-acp",
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},
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{
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.id = "RTL5682",
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.drv_name = "rmb-rt5682s-rt1019",
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.machine_quirk = snd_soc_acpi_codec_list,
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.quirk_data = &_rt1019,
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},
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{},
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};
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static struct snd_soc_dai_driver acp_rmb_dai[] = {
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{
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.name = "acp-i2s-sp",
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.id = I2S_SP_INSTANCE,
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.playback = {
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.stream_name = "I2S SP Playback",
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.rates = SNDRV_PCM_RATE_8000_96000,
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.formats = SNDRV_PCM_FMTBIT_S16_LE | SNDRV_PCM_FMTBIT_S8 |
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SNDRV_PCM_FMTBIT_U8 | SNDRV_PCM_FMTBIT_S32_LE,
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.channels_min = 2,
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.channels_max = 8,
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.rate_min = 8000,
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.rate_max = 96000,
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},
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.capture = {
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.stream_name = "I2S SP Capture",
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.rates = SNDRV_PCM_RATE_8000_48000,
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.formats = SNDRV_PCM_FMTBIT_S16_LE | SNDRV_PCM_FMTBIT_S8 |
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SNDRV_PCM_FMTBIT_U8 | SNDRV_PCM_FMTBIT_S32_LE,
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.channels_min = 2,
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.channels_max = 2,
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.rate_min = 8000,
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.rate_max = 48000,
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},
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.ops = &asoc_acp_cpu_dai_ops,
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.probe = &asoc_acp_i2s_probe,
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},
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{
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.name = "acp-i2s-bt",
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.id = I2S_BT_INSTANCE,
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.playback = {
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.stream_name = "I2S BT Playback",
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.rates = SNDRV_PCM_RATE_8000_96000,
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.formats = SNDRV_PCM_FMTBIT_S16_LE | SNDRV_PCM_FMTBIT_S8 |
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SNDRV_PCM_FMTBIT_U8 | SNDRV_PCM_FMTBIT_S32_LE,
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.channels_min = 2,
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.channels_max = 8,
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.rate_min = 8000,
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.rate_max = 96000,
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},
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.capture = {
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.stream_name = "I2S BT Capture",
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.rates = SNDRV_PCM_RATE_8000_48000,
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.formats = SNDRV_PCM_FMTBIT_S16_LE | SNDRV_PCM_FMTBIT_S8 |
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SNDRV_PCM_FMTBIT_U8 | SNDRV_PCM_FMTBIT_S32_LE,
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.channels_min = 2,
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.channels_max = 2,
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.rate_min = 8000,
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.rate_max = 48000,
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},
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.ops = &asoc_acp_cpu_dai_ops,
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.probe = &asoc_acp_i2s_probe,
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},
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{
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.name = "acp-i2s-hs",
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.id = I2S_HS_INSTANCE,
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.playback = {
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.stream_name = "I2S HS Playback",
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.rates = SNDRV_PCM_RATE_8000_96000,
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.formats = SNDRV_PCM_FMTBIT_S16_LE | SNDRV_PCM_FMTBIT_S8 |
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SNDRV_PCM_FMTBIT_U8 | SNDRV_PCM_FMTBIT_S32_LE,
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.channels_min = 2,
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.channels_max = 8,
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.rate_min = 8000,
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.rate_max = 96000,
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},
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.capture = {
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.stream_name = "I2S HS Capture",
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.rates = SNDRV_PCM_RATE_8000_48000,
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.formats = SNDRV_PCM_FMTBIT_S16_LE | SNDRV_PCM_FMTBIT_S8 |
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SNDRV_PCM_FMTBIT_U8 | SNDRV_PCM_FMTBIT_S32_LE,
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.channels_min = 2,
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.channels_max = 8,
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.rate_min = 8000,
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.rate_max = 48000,
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},
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.ops = &asoc_acp_cpu_dai_ops,
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.probe = &asoc_acp_i2s_probe,
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},
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{
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.name = "acp-pdm-dmic",
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.id = DMIC_INSTANCE,
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.capture = {
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.rates = SNDRV_PCM_RATE_8000_48000,
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.formats = SNDRV_PCM_FMTBIT_S32_LE,
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.channels_min = 2,
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.channels_max = 2,
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.rate_min = 8000,
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.rate_max = 48000,
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},
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.ops = &acp_dmic_dai_ops,
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},
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};
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static int acp6x_power_on(void __iomem *base)
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{
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u32 val;
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int timeout;
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val = readl(base + ACP6X_PGFSM_STATUS);
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if (val == ACP_POWERED_ON)
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return 0;
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if ((val & ACP_PGFSM_STATUS_MASK) !=
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ACP_POWER_ON_IN_PROGRESS)
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writel(ACP_PGFSM_CNTL_POWER_ON_MASK,
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base + ACP6X_PGFSM_CONTROL);
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timeout = 0;
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while (++timeout < 500) {
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val = readl(base + ACP6X_PGFSM_STATUS);
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if (!val)
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return 0;
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udelay(1);
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}
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return -ETIMEDOUT;
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}
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static int acp6x_reset(void __iomem *base)
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{
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u32 val;
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int timeout;
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writel(1, base + ACP_SOFT_RESET);
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timeout = 0;
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while (++timeout < 500) {
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val = readl(base + ACP_SOFT_RESET);
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if (val & ACP_SOFT_RESET_SOFTRESET_AUDDONE_MASK)
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break;
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cpu_relax();
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}
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writel(0, base + ACP_SOFT_RESET);
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timeout = 0;
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while (++timeout < 500) {
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val = readl(base + ACP_SOFT_RESET);
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if (!val)
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return 0;
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cpu_relax();
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}
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return -ETIMEDOUT;
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}
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static void acp6x_enable_interrupts(struct acp_dev_data *adata)
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{
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struct acp_resource *rsrc = adata->rsrc;
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u32 ext_intr_ctrl;
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writel(0x01, ACP_EXTERNAL_INTR_ENB(adata));
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ext_intr_ctrl = readl(ACP_EXTERNAL_INTR_CNTL(adata, rsrc->irqp_used));
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ext_intr_ctrl |= ACP_ERROR_MASK;
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writel(ext_intr_ctrl, ACP_EXTERNAL_INTR_CNTL(adata, rsrc->irqp_used));
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}
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static void acp6x_disable_interrupts(struct acp_dev_data *adata)
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{
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struct acp_resource *rsrc = adata->rsrc;
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writel(ACP_EXT_INTR_STAT_CLEAR_MASK,
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ACP_EXTERNAL_INTR_STAT(adata, rsrc->irqp_used));
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writel(0x00, ACP_EXTERNAL_INTR_ENB(adata));
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}
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static int rmb_acp_init(void __iomem *base)
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{
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int ret;
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/* power on */
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ret = acp6x_power_on(base);
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if (ret) {
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pr_err("ACP power on failed\n");
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return ret;
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}
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writel(0x01, base + ACP_CONTROL);
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/* Reset */
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ret = acp6x_reset(base);
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if (ret) {
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pr_err("ACP reset failed\n");
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return ret;
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}
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return 0;
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}
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static int rmb_acp_deinit(void __iomem *base)
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{
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int ret = 0;
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/* Reset */
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ret = acp6x_reset(base);
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if (ret) {
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pr_err("ACP reset failed\n");
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return ret;
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}
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writel(0x00, base + ACP_CONTROL);
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return 0;
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}
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static int rembrandt_audio_probe(struct platform_device *pdev)
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{
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struct device *dev = &pdev->dev;
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struct acp_chip_info *chip;
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struct acp_dev_data *adata;
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struct resource *res;
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chip = dev_get_platdata(&pdev->dev);
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if (!chip || !chip->base) {
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dev_err(&pdev->dev, "ACP chip data is NULL\n");
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return -ENODEV;
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}
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if (chip->acp_rev != ACP6X_DEV) {
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dev_err(&pdev->dev, "Un-supported ACP Revision %d\n", chip->acp_rev);
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return -ENODEV;
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}
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rmb_acp_init(chip->base);
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adata = devm_kzalloc(dev, sizeof(struct acp_dev_data), GFP_KERNEL);
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if (!adata)
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return -ENOMEM;
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res = platform_get_resource_byname(pdev, IORESOURCE_MEM, "acp_mem");
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if (!res) {
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dev_err(&pdev->dev, "IORESOURCE_MEM FAILED\n");
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return -ENODEV;
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}
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adata->acp_base = devm_ioremap(&pdev->dev, res->start, resource_size(res));
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if (!adata->acp_base)
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return -ENOMEM;
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res = platform_get_resource_byname(pdev, IORESOURCE_IRQ, "acp_dai_irq");
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if (!res) {
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dev_err(&pdev->dev, "IORESOURCE_IRQ FAILED\n");
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return -ENODEV;
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}
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adata->i2s_irq = res->start;
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adata->dev = dev;
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adata->dai_driver = acp_rmb_dai;
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adata->num_dai = ARRAY_SIZE(acp_rmb_dai);
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adata->rsrc = &rsrc;
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adata->machines = snd_soc_acpi_amd_rmb_acp_machines;
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acp_machine_select(adata);
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dev_set_drvdata(dev, adata);
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acp6x_enable_interrupts(adata);
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acp_platform_register(dev);
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return 0;
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}
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static void rembrandt_audio_remove(struct platform_device *pdev)
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{
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struct device *dev = &pdev->dev;
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struct acp_dev_data *adata = dev_get_drvdata(dev);
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struct acp_chip_info *chip = dev_get_platdata(dev);
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rmb_acp_deinit(chip->base);
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acp6x_disable_interrupts(adata);
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acp_platform_unregister(dev);
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}
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static struct platform_driver rembrandt_driver = {
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.probe = rembrandt_audio_probe,
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.remove_new = rembrandt_audio_remove,
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.driver = {
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.name = "acp_asoc_rembrandt",
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},
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};
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module_platform_driver(rembrandt_driver);
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MODULE_DESCRIPTION("AMD ACP Rembrandt Driver");
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MODULE_IMPORT_NS(SND_SOC_ACP_COMMON);
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MODULE_LICENSE("Dual BSD/GPL");
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MODULE_ALIAS("platform:" DRV_NAME);
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