81 lines
2.0 KiB
YAML
81 lines
2.0 KiB
YAML
# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
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%YAML 1.2
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---
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$id: http://devicetree.org/schemas/fpga/xlnx,fpga-slave-serial.yaml#
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$schema: http://devicetree.org/meta-schemas/core.yaml#
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title: Xilinx Slave Serial SPI FPGA
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maintainers:
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- Nava kishore Manne <nava.kishore.manne@amd.com>
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description: |
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Xilinx Spartan-6 and 7 Series FPGAs support a method of loading the bitstream
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over what is referred to as slave serial interface.The slave serial link is
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not technically SPI, and might require extra circuits in order to play nicely
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with other SPI slaves on the same bus.
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Datasheets:
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https://www.xilinx.com/support/documentation/user_guides/ug380.pdf
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https://www.xilinx.com/support/documentation/user_guides/ug470_7Series_Config.pdf
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https://www.xilinx.com/support/documentation/application_notes/xapp583-fpga-configuration.pdf
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allOf:
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- $ref: /schemas/spi/spi-peripheral-props.yaml#
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properties:
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compatible:
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enum:
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- xlnx,fpga-slave-serial
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spi-cpha: true
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spi-max-frequency:
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maximum: 60000000
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reg:
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maxItems: 1
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prog_b-gpios:
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description:
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config pin (referred to as PROGRAM_B in the manual)
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maxItems: 1
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done-gpios:
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description:
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config status pin (referred to as DONE in the manual)
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maxItems: 1
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init-b-gpios:
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description:
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initialization status and configuration error pin
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(referred to as INIT_B in the manual)
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maxItems: 1
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required:
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- compatible
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- reg
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- prog_b-gpios
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- done-gpios
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- init-b-gpios
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additionalProperties: false
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examples:
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- |
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#include <dt-bindings/gpio/gpio.h>
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spi {
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#address-cells = <1>;
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#size-cells = <0>;
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fpga_mgr_spi: fpga-mgr@0 {
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compatible = "xlnx,fpga-slave-serial";
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spi-max-frequency = <60000000>;
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spi-cpha;
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reg = <0>;
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prog_b-gpios = <&gpio0 29 GPIO_ACTIVE_LOW>;
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init-b-gpios = <&gpio0 28 GPIO_ACTIVE_LOW>;
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done-gpios = <&gpio0 9 GPIO_ACTIVE_HIGH>;
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};
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};
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...
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