125 lines
3.7 KiB
YAML
125 lines
3.7 KiB
YAML
# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
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%YAML 1.2
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---
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$id: http://devicetree.org/schemas/mailbox/nvidia,tegra186-hsp.yaml#
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$schema: http://devicetree.org/meta-schemas/core.yaml#
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title: NVIDIA Tegra Hardware Synchronization Primitives (HSP)
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maintainers:
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- Thierry Reding <thierry.reding@gmail.com>
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- Jon Hunter <jonathanh@nvidia.com>
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description: |
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The HSP modules are used for the processors to share resources and
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communicate together. It provides a set of hardware synchronization
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primitives for interprocessor communication. So the interprocessor
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communication (IPC) protocols can use hardware synchronization
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primitives, when operating between two processors not in an SMP
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relationship.
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The features that HSP supported are shared mailboxes, shared
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semaphores, arbitrated semaphores and doorbells.
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The mbox specifier of the "mboxes" property in the client node should
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contain two cells. The first cell determines the HSP type and the
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second cell is used to identify the mailbox that the client is going
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to use.
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For shared mailboxes, the first cell composed of two fields:
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- bits 15..8:
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A bit mask of flags that further specifies the type of shared
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mailbox to be used (based on the data size). If no flag is
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specified then, 32-bit shared mailbox is used.
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- bits 7..0:
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Defines the type of the mailbox to be used. This field should be
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TEGRA_HSP_MBOX_TYPE_SM for shared mailboxes.
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For doorbells, the second cell specifies the index of the doorbell to
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use.
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For shared mailboxes, the second cell is composed of two fields:
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- bits 31..24:
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A bit mask of flags that further specify how the shared mailbox
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will be used. Valid flags are:
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- bit 31:
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Defines the direction of the mailbox. If set, the mailbox
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will be used as a producer (i.e. used to send data). If
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cleared, the mailbox is the consumer of data sent by a
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producer.
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- bits 23..0:
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The index of the shared mailbox to use. The number of available
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mailboxes may vary by instance of the HSP block and SoC
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generation.
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The following file contains definitions that can be used to
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construct mailbox specifiers:
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<dt-bindings/mailbox/tegra186-hsp.h>
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properties:
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$nodename:
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pattern: "^hsp@[0-9a-f]+$"
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compatible:
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oneOf:
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- const: nvidia,tegra186-hsp
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- const: nvidia,tegra194-hsp
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- const: nvidia,tegra264-hsp
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- items:
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- const: nvidia,tegra234-hsp
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- const: nvidia,tegra194-hsp
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reg:
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maxItems: 1
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interrupts:
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minItems: 1
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maxItems: 9
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interrupt-names:
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oneOf:
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# shared interrupts are optional
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- items:
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- const: doorbell
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- items:
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- const: doorbell
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- pattern: "^shared[0-7]$"
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- pattern: "^shared[0-7]$"
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- pattern: "^shared[0-7]$"
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- pattern: "^shared[0-7]$"
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- pattern: "^shared[0-7]$"
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- pattern: "^shared[0-7]$"
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- pattern: "^shared[0-7]$"
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- pattern: "^shared[0-7]$"
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- items:
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- pattern: "^shared[0-7]$"
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- pattern: "^shared[0-7]$"
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- pattern: "^shared[0-7]$"
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- pattern: "^shared[0-7]$"
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"#mbox-cells":
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const: 2
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additionalProperties: false
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examples:
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- |
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#include <dt-bindings/interrupt-controller/arm-gic.h>
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#include <dt-bindings/mailbox/tegra186-hsp.h>
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hsp_top0: hsp@3c00000 {
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compatible = "nvidia,tegra186-hsp";
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reg = <0x03c00000 0xa0000>;
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interrupts = <GIC_SPI 176 IRQ_TYPE_LEVEL_HIGH>;
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interrupt-names = "doorbell";
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#mbox-cells = <2>;
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};
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client {
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mboxes = <&hsp_top0 TEGRA_HSP_MBOX_TYPE_DB TEGRA_HSP_DB_MASTER_CCPLEX>;
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};
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