186 lines
4.6 KiB
YAML
186 lines
4.6 KiB
YAML
# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
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%YAML 1.2
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---
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$id: http://devicetree.org/schemas/media/mediatek,vcodec-encoder.yaml#
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$schema: http://devicetree.org/meta-schemas/core.yaml#
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title: Mediatek Video Encode Accelerator
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maintainers:
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- Yunfei Dong <yunfei.dong@mediatek.com>
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description: |+
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Mediatek Video Encode is the video encode hardware present in Mediatek
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SoCs which supports high resolution encoding functionalities.
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properties:
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compatible:
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enum:
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- mediatek,mt8173-vcodec-enc-vp8
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- mediatek,mt8173-vcodec-enc
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- mediatek,mt8183-vcodec-enc
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- mediatek,mt8188-vcodec-enc
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- mediatek,mt8192-vcodec-enc
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- mediatek,mt8195-vcodec-enc
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reg:
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maxItems: 1
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interrupts:
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maxItems: 1
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clocks:
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minItems: 1
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maxItems: 5
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clock-names:
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minItems: 1
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maxItems: 5
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assigned-clocks: true
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assigned-clock-parents: true
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iommus:
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minItems: 1
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maxItems: 32
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description: |
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List of the hardware port in respective IOMMU block for current Socs.
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Refer to bindings/iommu/mediatek,iommu.yaml.
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mediatek,vpu:
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$ref: /schemas/types.yaml#/definitions/phandle
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description:
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Describes point to vpu.
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mediatek,scp:
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$ref: /schemas/types.yaml#/definitions/phandle
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description:
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Describes point to scp.
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power-domains:
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maxItems: 1
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"#address-cells":
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const: 2
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"#size-cells":
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const: 2
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required:
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- compatible
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- reg
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- interrupts
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- clocks
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- clock-names
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- iommus
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- assigned-clocks
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- assigned-clock-parents
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allOf:
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- if:
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properties:
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compatible:
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contains:
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enum:
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- mediatek,mt8183-vcodec-enc
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- mediatek,mt8188-vcodec-enc
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- mediatek,mt8192-vcodec-enc
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- mediatek,mt8195-vcodec-enc
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then:
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required:
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- mediatek,scp
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- if:
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properties:
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compatible:
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contains:
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enum:
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- mediatek,mt8173-vcodec-enc-vp8
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- mediatek,mt8173-vcodec-enc
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then:
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required:
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- mediatek,vpu
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- if:
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properties:
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compatible:
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enum:
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- mediatek,mt8173-vcodec-enc
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- mediatek,mt8188-vcodec-enc
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- mediatek,mt8192-vcodec-enc
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- mediatek,mt8195-vcodec-enc
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then:
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properties:
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clock:
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items:
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minItems: 1
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maxItems: 1
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clock-names:
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items:
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- const: venc_sel
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else: # for vp8 hw encoder
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properties:
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clock:
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items:
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minItems: 1
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maxItems: 1
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clock-names:
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items:
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- const: venc_lt_sel
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additionalProperties: false
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examples:
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- |
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#include <dt-bindings/interrupt-controller/arm-gic.h>
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#include <dt-bindings/clock/mt8173-clk.h>
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#include <dt-bindings/memory/mt8173-larb-port.h>
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#include <dt-bindings/interrupt-controller/irq.h>
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vcodec_enc_avc: vcodec@18002000 {
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compatible = "mediatek,mt8173-vcodec-enc";
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reg = <0x18002000 0x1000>;
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interrupts = <GIC_SPI 198 IRQ_TYPE_LEVEL_LOW>;
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iommus = <&iommu M4U_PORT_VENC_RCPU>,
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<&iommu M4U_PORT_VENC_REC>,
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<&iommu M4U_PORT_VENC_BSDMA>,
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<&iommu M4U_PORT_VENC_SV_COMV>,
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<&iommu M4U_PORT_VENC_RD_COMV>,
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<&iommu M4U_PORT_VENC_CUR_LUMA>,
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<&iommu M4U_PORT_VENC_CUR_CHROMA>,
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<&iommu M4U_PORT_VENC_REF_LUMA>,
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<&iommu M4U_PORT_VENC_REF_CHROMA>,
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<&iommu M4U_PORT_VENC_NBM_RDMA>,
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<&iommu M4U_PORT_VENC_NBM_WDMA>;
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mediatek,vpu = <&vpu>;
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clocks = <&topckgen CLK_TOP_VENC_SEL>;
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clock-names = "venc_sel";
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assigned-clocks = <&topckgen CLK_TOP_VENC_SEL>;
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assigned-clock-parents = <&topckgen CLK_TOP_VCODECPLL>;
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};
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vcodec_enc_vp8: vcodec@19002000 {
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compatible = "mediatek,mt8173-vcodec-enc-vp8";
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reg = <0x19002000 0x1000>; /* VENC_LT_SYS */
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interrupts = <GIC_SPI 202 IRQ_TYPE_LEVEL_LOW>;
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iommus = <&iommu M4U_PORT_VENC_RCPU_SET2>,
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<&iommu M4U_PORT_VENC_REC_FRM_SET2>,
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<&iommu M4U_PORT_VENC_BSDMA_SET2>,
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<&iommu M4U_PORT_VENC_SV_COMA_SET2>,
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<&iommu M4U_PORT_VENC_RD_COMA_SET2>,
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<&iommu M4U_PORT_VENC_CUR_LUMA_SET2>,
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<&iommu M4U_PORT_VENC_CUR_CHROMA_SET2>,
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<&iommu M4U_PORT_VENC_REF_LUMA_SET2>,
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<&iommu M4U_PORT_VENC_REC_CHROMA_SET2>;
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mediatek,vpu = <&vpu>;
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clocks = <&topckgen CLK_TOP_VENC_LT_SEL>;
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clock-names = "venc_lt_sel";
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assigned-clocks = <&topckgen CLK_TOP_VENC_LT_SEL>;
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assigned-clock-parents = <&topckgen CLK_TOP_VCODECPLL_370P5>;
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};
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