263 lines
8.2 KiB
YAML
263 lines
8.2 KiB
YAML
# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
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%YAML 1.2
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---
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$id: http://devicetree.org/schemas/net/renesas,r8a779f0-ether-switch.yaml#
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$schema: http://devicetree.org/meta-schemas/core.yaml#
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title: Renesas Ethernet Switch
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maintainers:
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- Yoshihiro Shimoda <yoshihiro.shimoda.uh@renesas.com>
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properties:
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compatible:
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const: renesas,r8a779f0-ether-switch
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reg:
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maxItems: 2
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reg-names:
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items:
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- const: base
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- const: secure_base
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interrupts:
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maxItems: 47
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interrupt-names:
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items:
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- const: mfwd_error
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- const: race_error
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- const: coma_error
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- const: gwca0_error
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- const: gwca1_error
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- const: etha0_error
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- const: etha1_error
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- const: etha2_error
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- const: gptp0_status
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- const: gptp1_status
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- const: mfwd_status
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- const: race_status
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- const: coma_status
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- const: gwca0_status
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- const: gwca1_status
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- const: etha0_status
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- const: etha1_status
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- const: etha2_status
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- const: rmac0_status
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- const: rmac1_status
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- const: rmac2_status
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- const: gwca0_rxtx0
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- const: gwca0_rxtx1
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- const: gwca0_rxtx2
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- const: gwca0_rxtx3
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- const: gwca0_rxtx4
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- const: gwca0_rxtx5
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- const: gwca0_rxtx6
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- const: gwca0_rxtx7
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- const: gwca1_rxtx0
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- const: gwca1_rxtx1
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- const: gwca1_rxtx2
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- const: gwca1_rxtx3
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- const: gwca1_rxtx4
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- const: gwca1_rxtx5
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- const: gwca1_rxtx6
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- const: gwca1_rxtx7
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- const: gwca0_rxts0
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- const: gwca0_rxts1
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- const: gwca1_rxts0
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- const: gwca1_rxts1
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- const: rmac0_mdio
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- const: rmac1_mdio
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- const: rmac2_mdio
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- const: rmac0_phy
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- const: rmac1_phy
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- const: rmac2_phy
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clocks:
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maxItems: 1
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resets:
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maxItems: 1
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iommus:
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maxItems: 16
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power-domains:
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maxItems: 1
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ethernet-ports:
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type: object
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additionalProperties: false
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properties:
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'#address-cells':
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description: Port number of ETHA (TSNA).
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const: 1
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'#size-cells':
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const: 0
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patternProperties:
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"^port@[0-9a-f]+$":
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type: object
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$ref: /schemas/net/ethernet-controller.yaml#
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unevaluatedProperties: false
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properties:
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reg:
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maxItems: 1
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description:
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Port number of ETHA (TSNA).
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phys:
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maxItems: 1
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description:
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Phandle of an Ethernet SERDES.
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mdio:
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$ref: /schemas/net/mdio.yaml#
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unevaluatedProperties: false
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required:
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- reg
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- phy-handle
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- phy-mode
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- phys
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- mdio
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required:
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- compatible
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- reg
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- reg-names
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- interrupts
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- interrupt-names
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- clocks
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- resets
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- power-domains
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- ethernet-ports
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additionalProperties: false
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examples:
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- |
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#include <dt-bindings/clock/r8a779f0-cpg-mssr.h>
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#include <dt-bindings/interrupt-controller/arm-gic.h>
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#include <dt-bindings/power/r8a779f0-sysc.h>
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ethernet@e6880000 {
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compatible = "renesas,r8a779f0-ether-switch";
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reg = <0xe6880000 0x20000>, <0xe68c0000 0x20000>;
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reg-names = "base", "secure_base";
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interrupts = <GIC_SPI 256 IRQ_TYPE_LEVEL_HIGH>,
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<GIC_SPI 257 IRQ_TYPE_LEVEL_HIGH>,
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<GIC_SPI 258 IRQ_TYPE_LEVEL_HIGH>,
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<GIC_SPI 259 IRQ_TYPE_LEVEL_HIGH>,
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<GIC_SPI 260 IRQ_TYPE_LEVEL_HIGH>,
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<GIC_SPI 261 IRQ_TYPE_LEVEL_HIGH>,
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<GIC_SPI 262 IRQ_TYPE_LEVEL_HIGH>,
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<GIC_SPI 263 IRQ_TYPE_LEVEL_HIGH>,
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<GIC_SPI 265 IRQ_TYPE_LEVEL_HIGH>,
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<GIC_SPI 266 IRQ_TYPE_LEVEL_HIGH>,
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<GIC_SPI 267 IRQ_TYPE_LEVEL_HIGH>,
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<GIC_SPI 268 IRQ_TYPE_LEVEL_HIGH>,
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<GIC_SPI 269 IRQ_TYPE_LEVEL_HIGH>,
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<GIC_SPI 270 IRQ_TYPE_LEVEL_HIGH>,
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<GIC_SPI 271 IRQ_TYPE_LEVEL_HIGH>,
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<GIC_SPI 272 IRQ_TYPE_LEVEL_HIGH>,
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<GIC_SPI 273 IRQ_TYPE_LEVEL_HIGH>,
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<GIC_SPI 274 IRQ_TYPE_LEVEL_HIGH>,
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<GIC_SPI 276 IRQ_TYPE_LEVEL_HIGH>,
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<GIC_SPI 277 IRQ_TYPE_LEVEL_HIGH>,
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<GIC_SPI 278 IRQ_TYPE_LEVEL_HIGH>,
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<GIC_SPI 280 IRQ_TYPE_LEVEL_HIGH>,
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<GIC_SPI 281 IRQ_TYPE_LEVEL_HIGH>,
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<GIC_SPI 282 IRQ_TYPE_LEVEL_HIGH>,
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<GIC_SPI 283 IRQ_TYPE_LEVEL_HIGH>,
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<GIC_SPI 284 IRQ_TYPE_LEVEL_HIGH>,
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<GIC_SPI 285 IRQ_TYPE_LEVEL_HIGH>,
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<GIC_SPI 286 IRQ_TYPE_LEVEL_HIGH>,
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<GIC_SPI 287 IRQ_TYPE_LEVEL_HIGH>,
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<GIC_SPI 288 IRQ_TYPE_LEVEL_HIGH>,
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<GIC_SPI 289 IRQ_TYPE_LEVEL_HIGH>,
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<GIC_SPI 290 IRQ_TYPE_LEVEL_HIGH>,
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<GIC_SPI 291 IRQ_TYPE_LEVEL_HIGH>,
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<GIC_SPI 292 IRQ_TYPE_LEVEL_HIGH>,
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<GIC_SPI 293 IRQ_TYPE_LEVEL_HIGH>,
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<GIC_SPI 294 IRQ_TYPE_LEVEL_HIGH>,
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<GIC_SPI 295 IRQ_TYPE_LEVEL_HIGH>,
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<GIC_SPI 296 IRQ_TYPE_LEVEL_HIGH>,
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<GIC_SPI 297 IRQ_TYPE_LEVEL_HIGH>,
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<GIC_SPI 298 IRQ_TYPE_LEVEL_HIGH>,
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<GIC_SPI 299 IRQ_TYPE_LEVEL_HIGH>,
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<GIC_SPI 300 IRQ_TYPE_LEVEL_HIGH>,
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<GIC_SPI 301 IRQ_TYPE_LEVEL_HIGH>,
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<GIC_SPI 302 IRQ_TYPE_LEVEL_HIGH>,
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<GIC_SPI 304 IRQ_TYPE_LEVEL_HIGH>,
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<GIC_SPI 305 IRQ_TYPE_LEVEL_HIGH>,
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<GIC_SPI 306 IRQ_TYPE_LEVEL_HIGH>;
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interrupt-names = "mfwd_error", "race_error",
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"coma_error", "gwca0_error",
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"gwca1_error", "etha0_error",
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"etha1_error", "etha2_error",
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"gptp0_status", "gptp1_status",
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"mfwd_status", "race_status",
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"coma_status", "gwca0_status",
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"gwca1_status", "etha0_status",
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"etha1_status", "etha2_status",
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"rmac0_status", "rmac1_status",
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"rmac2_status",
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"gwca0_rxtx0", "gwca0_rxtx1",
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"gwca0_rxtx2", "gwca0_rxtx3",
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"gwca0_rxtx4", "gwca0_rxtx5",
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"gwca0_rxtx6", "gwca0_rxtx7",
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"gwca1_rxtx0", "gwca1_rxtx1",
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"gwca1_rxtx2", "gwca1_rxtx3",
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"gwca1_rxtx4", "gwca1_rxtx5",
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"gwca1_rxtx6", "gwca1_rxtx7",
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"gwca0_rxts0", "gwca0_rxts1",
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"gwca1_rxts0", "gwca1_rxts1",
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"rmac0_mdio", "rmac1_mdio",
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"rmac2_mdio",
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"rmac0_phy", "rmac1_phy",
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"rmac2_phy";
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clocks = <&cpg CPG_MOD 1505>;
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power-domains = <&sysc R8A779F0_PD_ALWAYS_ON>;
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resets = <&cpg 1505>;
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ethernet-ports {
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#address-cells = <1>;
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#size-cells = <0>;
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port@0 {
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reg = <0>;
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phy-handle = <ð_phy0>;
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phy-mode = "sgmii";
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phys = <ð_serdes 0>;
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mdio {
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#address-cells = <1>;
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#size-cells = <0>;
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};
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};
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port@1 {
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reg = <1>;
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phy-handle = <ð_phy1>;
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phy-mode = "sgmii";
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phys = <ð_serdes 1>;
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mdio {
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#address-cells = <1>;
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#size-cells = <0>;
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};
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};
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port@2 {
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reg = <2>;
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phy-handle = <ð_phy2>;
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phy-mode = "sgmii";
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phys = <ð_serdes 2>;
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mdio {
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#address-cells = <1>;
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#size-cells = <0>;
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};
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};
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};
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};
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