104 lines
2.2 KiB
YAML
104 lines
2.2 KiB
YAML
# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
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%YAML 1.2
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---
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$id: http://devicetree.org/schemas/phy/fsl,imx8mq-usb-phy.yaml#
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$schema: http://devicetree.org/meta-schemas/core.yaml#
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title: Freescale i.MX8MQ USB3 PHY
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maintainers:
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- Li Jun <jun.li@nxp.com>
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properties:
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compatible:
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enum:
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- fsl,imx8mq-usb-phy
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- fsl,imx8mp-usb-phy
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reg:
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maxItems: 1
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"#phy-cells":
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const: 0
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clocks:
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maxItems: 1
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clock-names:
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items:
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- const: phy
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power-domains:
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maxItems: 1
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vbus-supply:
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description:
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A phandle to the regulator for USB VBUS.
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fsl,phy-tx-vref-tune-percent:
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description:
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Tunes the HS DC level relative to the nominal level
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minimum: 94
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maximum: 124
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fsl,phy-tx-rise-tune-percent:
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description:
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Adjusts the rise/fall time duration of the HS waveform relative to
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its nominal value
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minimum: 97
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maximum: 103
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fsl,phy-tx-preemp-amp-tune-microamp:
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description:
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Adjust amount of current sourced to DPn and DMn after a J-to-K
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or K-to-J transition. Default is 0 (disabled).
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minimum: 0
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maximum: 1800
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fsl,phy-tx-vboost-level-microvolt:
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description:
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Adjust the boosted transmit launch pk-pk differential amplitude
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minimum: 880
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maximum: 1120
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fsl,phy-comp-dis-tune-percent:
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description:
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Adjust the voltage level used to detect a disconnect event at the host
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relative to the nominal value
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minimum: 91
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maximum: 115
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fsl,phy-pcs-tx-deemph-3p5db-attenuation-db:
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description:
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Adjust TX de-emphasis attenuation in dB at nominal
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3.5dB point as per USB specification
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$ref: /schemas/types.yaml#/definitions/uint32
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minimum: 0
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maximum: 36
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fsl,phy-pcs-tx-swing-full-percent:
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description:
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Scaling of the voltage defined by fsl,phy-tx-vboost-level-microvolt
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minimum: 0
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maximum: 100
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required:
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- compatible
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- reg
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- "#phy-cells"
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- clocks
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- clock-names
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additionalProperties: false
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examples:
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- |
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#include <dt-bindings/clock/imx8mq-clock.h>
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usb3_phy0: phy@381f0040 {
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compatible = "fsl,imx8mq-usb-phy";
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reg = <0x381f0040 0x40>;
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clocks = <&clk IMX8MQ_CLK_USB1_PHY_ROOT>;
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clock-names = "phy";
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#phy-cells = <0>;
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};
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