125 lines
3.1 KiB
YAML
125 lines
3.1 KiB
YAML
# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
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%YAML 1.2
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---
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$id: http://devicetree.org/schemas/spi/mediatek,spi-mtk-snfi.yaml#
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$schema: http://devicetree.org/meta-schemas/core.yaml#
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title: SPI-NAND flash controller for MediaTek ARM SoCs
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maintainers:
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- Chuanhong Guo <gch981213@gmail.com>
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description: |
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The Mediatek SPI-NAND flash controller is an extended version of
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the Mediatek NAND flash controller. It can perform standard SPI
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instructions with one continuous write and one read for up-to 0xa0
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bytes. It also supports typical SPI-NAND page cache operations
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in single, dual or quad IO mode with pipelined ECC encoding/decoding
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using the accompanying ECC engine. There should be only one spi
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slave device following generic spi bindings.
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properties:
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compatible:
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enum:
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- mediatek,mt7622-snand
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- mediatek,mt7629-snand
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- mediatek,mt7986-snand
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reg:
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items:
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- description: core registers
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interrupts:
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items:
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- description: NFI interrupt
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clocks:
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minItems: 2
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maxItems: 3
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clock-names:
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minItems: 2
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maxItems: 3
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nand-ecc-engine:
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description: device-tree node of the accompanying ECC engine.
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$ref: /schemas/types.yaml#/definitions/phandle
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mediatek,rx-latch-latency-ns:
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description: Data read latch latency, unit is nanoseconds.
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required:
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- compatible
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- reg
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- interrupts
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- clocks
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- clock-names
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- nand-ecc-engine
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allOf:
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- $ref: /schemas/spi/spi-controller.yaml#
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- if:
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properties:
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compatible:
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enum:
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- mediatek,mt7622-snand
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- mediatek,mt7629-snand
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then:
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properties:
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clocks:
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items:
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- description: clock used for the controller
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- description: clock used for the SPI bus
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clock-names:
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items:
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- const: nfi_clk
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- const: pad_clk
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- if:
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properties:
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compatible:
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enum:
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- mediatek,mt7986-snand
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then:
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properties:
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clocks:
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items:
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- description: clock used for the controller
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- description: clock used for the SPI bus
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- description: clock used for the AHB bus
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clock-names:
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items:
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- const: nfi_clk
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- const: pad_clk
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- const: nfi_hclk
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unevaluatedProperties: false
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examples:
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- |
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#include <dt-bindings/interrupt-controller/irq.h>
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#include <dt-bindings/interrupt-controller/arm-gic.h>
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#include <dt-bindings/clock/mt7622-clk.h>
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soc {
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#address-cells = <2>;
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#size-cells = <2>;
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snfi: spi@1100d000 {
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compatible = "mediatek,mt7622-snand";
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reg = <0 0x1100d000 0 0x1000>;
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interrupts = <GIC_SPI 96 IRQ_TYPE_LEVEL_LOW>;
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clocks = <&pericfg CLK_PERI_NFI_PD>, <&pericfg CLK_PERI_SNFI_PD>;
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clock-names = "nfi_clk", "pad_clk";
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nand-ecc-engine = <&bch>;
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#address-cells = <1>;
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#size-cells = <0>;
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flash@0 {
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compatible = "spi-nand";
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reg = <0>;
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spi-tx-bus-width = <4>;
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spi-rx-bus-width = <4>;
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nand-ecc-engine = <&snfi>;
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};
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};
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};
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