278 lines
8.1 KiB
C
278 lines
8.1 KiB
C
/* SPDX-License-Identifier: GPL-2.0 */
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/*
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* CPU-measurement facilities
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*
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* Copyright IBM Corp. 2012, 2018
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* Author(s): Hendrik Brueckner <brueckner@linux.vnet.ibm.com>
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* Jan Glauber <jang@linux.vnet.ibm.com>
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*/
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#ifndef _ASM_S390_CPU_MF_H
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#define _ASM_S390_CPU_MF_H
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#include <linux/errno.h>
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#include <asm/asm-extable.h>
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#include <asm/facility.h>
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asm(".include \"asm/cpu_mf-insn.h\"\n");
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#define CPU_MF_INT_SF_IAE (1 << 31) /* invalid entry address */
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#define CPU_MF_INT_SF_ISE (1 << 30) /* incorrect SDBT entry */
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#define CPU_MF_INT_SF_PRA (1 << 29) /* program request alert */
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#define CPU_MF_INT_SF_SACA (1 << 23) /* sampler auth. change alert */
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#define CPU_MF_INT_SF_LSDA (1 << 22) /* loss of sample data alert */
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#define CPU_MF_INT_CF_MTDA (1 << 15) /* loss of MT ctr. data alert */
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#define CPU_MF_INT_CF_CACA (1 << 7) /* counter auth. change alert */
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#define CPU_MF_INT_CF_LCDA (1 << 6) /* loss of counter data alert */
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#define CPU_MF_INT_CF_MASK (CPU_MF_INT_CF_MTDA|CPU_MF_INT_CF_CACA| \
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CPU_MF_INT_CF_LCDA)
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#define CPU_MF_INT_SF_MASK (CPU_MF_INT_SF_IAE|CPU_MF_INT_SF_ISE| \
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CPU_MF_INT_SF_PRA|CPU_MF_INT_SF_SACA| \
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CPU_MF_INT_SF_LSDA)
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#define CPU_MF_SF_RIBM_NOTAV 0x1 /* Sampling unavailable */
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/* CPU measurement facility support */
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static inline int cpum_cf_avail(void)
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{
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return test_facility(40) && test_facility(67);
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}
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static inline int cpum_sf_avail(void)
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{
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return test_facility(40) && test_facility(68);
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}
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struct cpumf_ctr_info {
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u16 cfvn;
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u16 auth_ctl;
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u16 enable_ctl;
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u16 act_ctl;
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u16 max_cpu;
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u16 csvn;
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u16 max_cg;
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u16 reserved1;
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u32 reserved2[12];
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} __packed;
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/* QUERY SAMPLING INFORMATION block */
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struct hws_qsi_info_block { /* Bit(s) */
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unsigned int b0_13:14; /* 0-13: zeros */
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unsigned int as:1; /* 14: basic-sampling authorization */
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unsigned int ad:1; /* 15: diag-sampling authorization */
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unsigned int b16_21:6; /* 16-21: zeros */
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unsigned int es:1; /* 22: basic-sampling enable control */
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unsigned int ed:1; /* 23: diag-sampling enable control */
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unsigned int b24_29:6; /* 24-29: zeros */
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unsigned int cs:1; /* 30: basic-sampling activation control */
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unsigned int cd:1; /* 31: diag-sampling activation control */
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unsigned int bsdes:16; /* 4-5: size of basic sampling entry */
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unsigned int dsdes:16; /* 6-7: size of diagnostic sampling entry */
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unsigned long min_sampl_rate; /* 8-15: minimum sampling interval */
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unsigned long max_sampl_rate; /* 16-23: maximum sampling interval*/
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unsigned long tear; /* 24-31: TEAR contents */
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unsigned long dear; /* 32-39: DEAR contents */
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unsigned int rsvrd0:24; /* 40-42: reserved */
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unsigned int ribm:8; /* 43: Reserved by IBM */
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unsigned int cpu_speed; /* 44-47: CPU speed */
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unsigned long long rsvrd1; /* 48-55: reserved */
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unsigned long long rsvrd2; /* 56-63: reserved */
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} __packed;
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/* SET SAMPLING CONTROLS request block */
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struct hws_lsctl_request_block {
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unsigned int s:1; /* 0: maximum buffer indicator */
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unsigned int h:1; /* 1: part. level reserved for VM use*/
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unsigned long long b2_53:52;/* 2-53: zeros */
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unsigned int es:1; /* 54: basic-sampling enable control */
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unsigned int ed:1; /* 55: diag-sampling enable control */
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unsigned int b56_61:6; /* 56-61: - zeros */
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unsigned int cs:1; /* 62: basic-sampling activation control */
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unsigned int cd:1; /* 63: diag-sampling activation control */
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unsigned long interval; /* 8-15: sampling interval */
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unsigned long tear; /* 16-23: TEAR contents */
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unsigned long dear; /* 24-31: DEAR contents */
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/* 32-63: */
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unsigned long rsvrd1; /* reserved */
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unsigned long rsvrd2; /* reserved */
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unsigned long rsvrd3; /* reserved */
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unsigned long rsvrd4; /* reserved */
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} __packed;
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struct hws_basic_entry {
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unsigned int def:16; /* 0-15 Data Entry Format */
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unsigned int R:4; /* 16-19 reserved */
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unsigned int U:4; /* 20-23 Number of unique instruct. */
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unsigned int z:2; /* zeros */
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unsigned int T:1; /* 26 PSW DAT mode */
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unsigned int W:1; /* 27 PSW wait state */
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unsigned int P:1; /* 28 PSW Problem state */
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unsigned int AS:2; /* 29-30 PSW address-space control */
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unsigned int I:1; /* 31 entry valid or invalid */
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unsigned int CL:2; /* 32-33 Configuration Level */
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unsigned int H:1; /* 34 Host Indicator */
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unsigned int LS:1; /* 35 Limited Sampling */
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unsigned int:12;
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unsigned int prim_asn:16; /* primary ASN */
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unsigned long long ia; /* Instruction Address */
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unsigned long long gpp; /* Guest Program Parameter */
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unsigned long long hpp; /* Host Program Parameter */
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} __packed;
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struct hws_diag_entry {
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unsigned int def:16; /* 0-15 Data Entry Format */
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unsigned int R:15; /* 16-19 and 20-30 reserved */
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unsigned int I:1; /* 31 entry valid or invalid */
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u8 data[]; /* Machine-dependent sample data */
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} __packed;
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struct hws_combined_entry {
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struct hws_basic_entry basic; /* Basic-sampling data entry */
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struct hws_diag_entry diag; /* Diagnostic-sampling data entry */
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} __packed;
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union hws_trailer_header {
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struct {
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unsigned int f:1; /* 0 - Block Full Indicator */
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unsigned int a:1; /* 1 - Alert request control */
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unsigned int t:1; /* 2 - Timestamp format */
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unsigned int :29; /* 3 - 31: Reserved */
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unsigned int bsdes:16; /* 32-47: size of basic SDE */
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unsigned int dsdes:16; /* 48-63: size of diagnostic SDE */
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unsigned long long overflow; /* 64 - Overflow Count */
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};
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u128 val;
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};
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struct hws_trailer_entry {
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union hws_trailer_header header; /* 0 - 15 Flags + Overflow Count */
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unsigned char timestamp[16]; /* 16 - 31 timestamp */
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unsigned long long reserved1; /* 32 -Reserved */
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unsigned long long reserved2; /* */
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union { /* 48 - reserved for programming use */
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struct {
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unsigned int clock_base:1; /* in progusage2 */
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unsigned long long progusage1:63;
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unsigned long long progusage2;
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};
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unsigned long long progusage[2];
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};
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} __packed;
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/* Load program parameter */
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static inline void lpp(void *pp)
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{
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asm volatile("lpp 0(%0)\n" :: "a" (pp) : "memory");
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}
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/* Query counter information */
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static inline int qctri(struct cpumf_ctr_info *info)
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{
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int rc = -EINVAL;
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asm volatile (
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"0: qctri %1\n"
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"1: lhi %0,0\n"
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"2:\n"
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EX_TABLE(1b, 2b)
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: "+d" (rc), "=Q" (*info));
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return rc;
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}
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/* Load CPU-counter-set controls */
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static inline int lcctl(u64 ctl)
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{
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int cc;
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asm volatile (
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" lcctl %1\n"
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" ipm %0\n"
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" srl %0,28\n"
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: "=d" (cc) : "Q" (ctl) : "cc");
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return cc;
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}
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/* Extract CPU counter */
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static inline int __ecctr(u64 ctr, u64 *content)
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{
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u64 _content;
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int cc;
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asm volatile (
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" ecctr %0,%2\n"
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" ipm %1\n"
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" srl %1,28\n"
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: "=d" (_content), "=d" (cc) : "d" (ctr) : "cc");
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*content = _content;
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return cc;
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}
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/* Extract CPU counter */
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static inline int ecctr(u64 ctr, u64 *val)
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{
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u64 content;
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int cc;
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cc = __ecctr(ctr, &content);
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if (!cc)
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*val = content;
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return cc;
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}
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/* Store CPU counter multiple for a particular counter set */
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enum stcctm_ctr_set {
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EXTENDED = 0,
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BASIC = 1,
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PROBLEM_STATE = 2,
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CRYPTO_ACTIVITY = 3,
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MT_DIAG = 5,
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MT_DIAG_CLEARING = 9, /* clears loss-of-MT-ctr-data alert */
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};
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static __always_inline int stcctm(enum stcctm_ctr_set set, u64 range, u64 *dest)
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{
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int cc;
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asm volatile (
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" STCCTM %2,%3,%1\n"
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" ipm %0\n"
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" srl %0,28\n"
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: "=d" (cc)
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: "Q" (*dest), "d" (range), "i" (set)
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: "cc", "memory");
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return cc;
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}
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/* Query sampling information */
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static inline int qsi(struct hws_qsi_info_block *info)
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{
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int cc = 1;
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asm volatile(
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"0: qsi %1\n"
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"1: lhi %0,0\n"
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"2:\n"
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EX_TABLE(0b, 2b) EX_TABLE(1b, 2b)
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: "+d" (cc), "+Q" (*info));
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return cc ? -EINVAL : 0;
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}
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/* Load sampling controls */
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static inline int lsctl(struct hws_lsctl_request_block *req)
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{
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int cc;
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cc = 1;
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asm volatile(
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"0: lsctl 0(%1)\n"
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"1: ipm %0\n"
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" srl %0,28\n"
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"2:\n"
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EX_TABLE(0b, 2b) EX_TABLE(1b, 2b)
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: "+d" (cc), "+a" (req)
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: "m" (*req)
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: "cc", "memory");
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return cc ? -EINVAL : 0;
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}
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#endif /* _ASM_S390_CPU_MF_H */
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