65 lines
1.4 KiB
C
65 lines
1.4 KiB
C
/* SPDX-License-Identifier: GPL-2.0 */
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/* Copyright (C) 2019 Cadence Design Systems Inc. */
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#ifndef _ASM_XTENSA_CORE_H
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#define _ASM_XTENSA_CORE_H
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#include <variant/core.h>
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#ifndef XCHAL_HAVE_EXCLUSIVE
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#define XCHAL_HAVE_EXCLUSIVE 0
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#endif
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#ifndef XCHAL_HAVE_EXTERN_REGS
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#define XCHAL_HAVE_EXTERN_REGS 0
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#endif
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#ifndef XCHAL_HAVE_MPU
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#define XCHAL_HAVE_MPU 0
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#endif
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#ifndef XCHAL_HAVE_VECBASE
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#define XCHAL_HAVE_VECBASE 0
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#endif
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#ifndef XCHAL_SPANNING_WAY
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#define XCHAL_SPANNING_WAY 0
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#endif
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#ifndef XCHAL_HAVE_TRAX
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#define XCHAL_HAVE_TRAX 0
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#endif
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#ifndef XCHAL_NUM_PERF_COUNTERS
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#define XCHAL_NUM_PERF_COUNTERS 0
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#endif
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#if XCHAL_HAVE_WINDOWED
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#if defined(CONFIG_USER_ABI_DEFAULT) || defined(CONFIG_USER_ABI_CALL0_PROBE)
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/* Whether windowed ABI is supported in userspace. */
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#define USER_SUPPORT_WINDOWED
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#endif
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#if defined(__XTENSA_WINDOWED_ABI__) || defined(USER_SUPPORT_WINDOWED)
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/* Whether windowed ABI is supported either in userspace or in the kernel. */
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#define SUPPORT_WINDOWED
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#endif
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#endif
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/* Xtensa ABI requires stack alignment to be at least 16 */
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#if XCHAL_DATA_WIDTH > 16
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#define XTENSA_STACK_ALIGNMENT XCHAL_DATA_WIDTH
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#else
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#define XTENSA_STACK_ALIGNMENT 16
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#endif
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#ifndef XCHAL_HW_MIN_VERSION
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#if defined(XCHAL_HW_MIN_VERSION_MAJOR) && defined(XCHAL_HW_MIN_VERSION_MINOR)
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#define XCHAL_HW_MIN_VERSION (XCHAL_HW_MIN_VERSION_MAJOR * 100 + \
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XCHAL_HW_MIN_VERSION_MINOR)
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#else
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#define XCHAL_HW_MIN_VERSION 0
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#endif
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#endif
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#endif
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