140 lines
3.4 KiB
C
140 lines
3.4 KiB
C
// SPDX-License-Identifier: GPL-2.0-only
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/*
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*
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* Copyright (C) 2013 ARM Limited
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*/
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#include <linux/amba/sp810.h>
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#include <linux/slab.h>
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#include <linux/clk.h>
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#include <linux/clk-provider.h>
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#include <linux/err.h>
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#include <linux/io.h>
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#include <linux/of.h>
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#include <linux/of_address.h>
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#define to_clk_sp810_timerclken(_hw) \
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container_of(_hw, struct clk_sp810_timerclken, hw)
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struct clk_sp810;
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struct clk_sp810_timerclken {
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struct clk_hw hw;
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struct clk *clk;
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struct clk_sp810 *sp810;
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int channel;
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};
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struct clk_sp810 {
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struct device_node *node;
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void __iomem *base;
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spinlock_t lock;
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struct clk_sp810_timerclken timerclken[4];
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};
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static u8 clk_sp810_timerclken_get_parent(struct clk_hw *hw)
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{
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struct clk_sp810_timerclken *timerclken = to_clk_sp810_timerclken(hw);
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u32 val = readl(timerclken->sp810->base + SCCTRL);
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return !!(val & (1 << SCCTRL_TIMERENnSEL_SHIFT(timerclken->channel)));
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}
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static int clk_sp810_timerclken_set_parent(struct clk_hw *hw, u8 index)
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{
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struct clk_sp810_timerclken *timerclken = to_clk_sp810_timerclken(hw);
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struct clk_sp810 *sp810 = timerclken->sp810;
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u32 val, shift = SCCTRL_TIMERENnSEL_SHIFT(timerclken->channel);
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unsigned long flags = 0;
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if (WARN_ON(index > 1))
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return -EINVAL;
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spin_lock_irqsave(&sp810->lock, flags);
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val = readl(sp810->base + SCCTRL);
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val &= ~(1 << shift);
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val |= index << shift;
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writel(val, sp810->base + SCCTRL);
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spin_unlock_irqrestore(&sp810->lock, flags);
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return 0;
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}
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static const struct clk_ops clk_sp810_timerclken_ops = {
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.determine_rate = clk_hw_determine_rate_no_reparent,
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.get_parent = clk_sp810_timerclken_get_parent,
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.set_parent = clk_sp810_timerclken_set_parent,
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};
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static struct clk *clk_sp810_timerclken_of_get(struct of_phandle_args *clkspec,
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void *data)
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{
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struct clk_sp810 *sp810 = data;
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if (WARN_ON(clkspec->args_count != 1 ||
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clkspec->args[0] >= ARRAY_SIZE(sp810->timerclken)))
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return NULL;
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return sp810->timerclken[clkspec->args[0]].clk;
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}
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static void __init clk_sp810_of_setup(struct device_node *node)
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{
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struct clk_sp810 *sp810 = kzalloc(sizeof(*sp810), GFP_KERNEL);
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const char *parent_names[2];
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int num = ARRAY_SIZE(parent_names);
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char name[12];
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struct clk_init_data init;
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static int instance;
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int i;
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bool deprecated;
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if (!sp810)
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return;
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if (of_clk_parent_fill(node, parent_names, num) != num) {
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pr_warn("Failed to obtain parent clocks for SP810!\n");
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kfree(sp810);
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return;
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}
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sp810->node = node;
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sp810->base = of_iomap(node, 0);
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spin_lock_init(&sp810->lock);
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init.name = name;
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init.ops = &clk_sp810_timerclken_ops;
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init.flags = 0;
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init.parent_names = parent_names;
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init.num_parents = num;
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deprecated = !of_find_property(node, "assigned-clock-parents", NULL);
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for (i = 0; i < ARRAY_SIZE(sp810->timerclken); i++) {
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snprintf(name, sizeof(name), "sp810_%d_%d", instance, i);
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sp810->timerclken[i].sp810 = sp810;
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sp810->timerclken[i].channel = i;
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sp810->timerclken[i].hw.init = &init;
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/*
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* If DT isn't setting the parent, force it to be
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* the 1 MHz clock without going through the framework.
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* We do this before clk_register() so that it can determine
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* the parent and setup the tree properly.
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*/
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if (deprecated)
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init.ops->set_parent(&sp810->timerclken[i].hw, 1);
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sp810->timerclken[i].clk = clk_register(NULL,
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&sp810->timerclken[i].hw);
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WARN_ON(IS_ERR(sp810->timerclken[i].clk));
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}
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of_clk_add_provider(node, clk_sp810_timerclken_of_get, sp810);
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instance++;
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}
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CLK_OF_DECLARE(sp810, "arm,sp810", clk_sp810_of_setup);
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