67 lines
1.3 KiB
C
67 lines
1.3 KiB
C
/* SPDX-License-Identifier: GPL-2.0-only */
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/*
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* UEFI Common Platform Error Record (CPER) support for CXL Section.
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*
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* Copyright (C) 2022 Advanced Micro Devices, Inc.
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*
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* Author: Smita Koralahalli <Smita.KoralahalliChannabasappa@amd.com>
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*/
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#ifndef LINUX_CPER_CXL_H
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#define LINUX_CPER_CXL_H
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/* CXL Protocol Error Section */
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#define CPER_SEC_CXL_PROT_ERR \
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GUID_INIT(0x80B9EFB4, 0x52B5, 0x4DE3, 0xA7, 0x77, 0x68, 0x78, \
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0x4B, 0x77, 0x10, 0x48)
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#pragma pack(1)
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/* Compute Express Link Protocol Error Section, UEFI v2.10 sec N.2.13 */
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struct cper_sec_prot_err {
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u64 valid_bits;
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u8 agent_type;
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u8 reserved[7];
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/*
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* Except for RCH Downstream Port, all the remaining CXL Agent
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* types are uniquely identified by the PCIe compatible SBDF number.
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*/
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union {
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u64 rcrb_base_addr;
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struct {
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u8 function;
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u8 device;
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u8 bus;
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u16 segment;
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u8 reserved_1[3];
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};
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} agent_addr;
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struct {
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u16 vendor_id;
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u16 device_id;
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u16 subsystem_vendor_id;
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u16 subsystem_id;
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u8 class_code[2];
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u16 slot;
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u8 reserved_1[4];
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} device_id;
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struct {
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u32 lower_dw;
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u32 upper_dw;
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} dev_serial_num;
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u8 capability[60];
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u16 dvsec_len;
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u16 err_len;
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u8 reserved_2[4];
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};
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#pragma pack()
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void cper_print_prot_err(const char *pfx, const struct cper_sec_prot_err *prot_err);
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#endif //__CPER_CXL_
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