67 lines
2.1 KiB
C
67 lines
2.1 KiB
C
/*
|
|
* Copyright 2018 Advanced Micro Devices, Inc.
|
|
*
|
|
* Permission is hereby granted, free of charge, to any person obtaining a
|
|
* copy of this software and associated documentation files (the "Software"),
|
|
* to deal in the Software without restriction, including without limitation
|
|
* the rights to use, copy, modify, merge, publish, distribute, sublicense,
|
|
* and/or sell copies of the Software, and to permit persons to whom the
|
|
* Software is furnished to do so, subject to the following conditions:
|
|
*
|
|
* The above copyright notice and this permission notice shall be included in
|
|
* all copies or substantial portions of the Software.
|
|
*
|
|
* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
|
|
* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
|
|
* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
|
|
* THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR
|
|
* OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
|
|
* ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
|
|
* OTHER DEALINGS IN THE SOFTWARE.
|
|
*
|
|
*/
|
|
#include "amdgpu.h"
|
|
#include "soc15.h"
|
|
#include "soc15_hw_ip.h"
|
|
#include "vega10_ip_offset.h"
|
|
#include "soc15_common.h"
|
|
#include "vega10_inc.h"
|
|
#include "smu9_baco.h"
|
|
|
|
int smu9_baco_get_capability(struct pp_hwmgr *hwmgr, bool *cap)
|
|
{
|
|
struct amdgpu_device *adev = (struct amdgpu_device *)(hwmgr->adev);
|
|
uint32_t reg, data;
|
|
|
|
*cap = false;
|
|
if (!phm_cap_enabled(hwmgr->platform_descriptor.platformCaps, PHM_PlatformCaps_BACO))
|
|
return 0;
|
|
|
|
WREG32(0x12074, 0xFFF0003B);
|
|
data = RREG32(0x12075);
|
|
|
|
if (data == 0x1) {
|
|
reg = RREG32_SOC15(NBIF, 0, mmRCC_BIF_STRAP0);
|
|
|
|
if (reg & RCC_BIF_STRAP0__STRAP_PX_CAPABLE_MASK)
|
|
*cap = true;
|
|
}
|
|
|
|
return 0;
|
|
}
|
|
|
|
int smu9_baco_get_state(struct pp_hwmgr *hwmgr, enum BACO_STATE *state)
|
|
{
|
|
struct amdgpu_device *adev = (struct amdgpu_device *)(hwmgr->adev);
|
|
uint32_t reg;
|
|
|
|
reg = RREG32_SOC15(NBIF, 0, mmBACO_CNTL);
|
|
|
|
if (reg & BACO_CNTL__BACO_MODE_MASK)
|
|
/* gfx has already entered BACO state */
|
|
*state = BACO_STATE_IN;
|
|
else
|
|
*state = BACO_STATE_OUT;
|
|
return 0;
|
|
}
|