67 lines
2.6 KiB
C
67 lines
2.6 KiB
C
/* SPDX-License-Identifier: GPL-2.0-only */
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/* Copyright (c) 2015-2018, The Linux Foundation. All rights reserved.
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*/
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#ifndef _DPU_HWIO_H
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#define _DPU_HWIO_H
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#include "dpu_hw_util.h"
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/**
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* MDP TOP block Register and bit fields and defines
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*/
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#define DISP_INTF_SEL 0x004
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#define INTR_EN 0x010
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#define INTR_STATUS 0x014
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#define INTR_CLEAR 0x018
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#define INTR2_EN 0x008
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#define INTR2_STATUS 0x00c
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#define SSPP_SPARE 0x028
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#define INTR2_CLEAR 0x02c
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#define HIST_INTR_EN 0x01c
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#define HIST_INTR_STATUS 0x020
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#define HIST_INTR_CLEAR 0x024
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#define SPLIT_DISPLAY_EN 0x2F4
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#define SPLIT_DISPLAY_UPPER_PIPE_CTRL 0x2F8
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#define DSPP_IGC_COLOR0_RAM_LUTN 0x300
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#define DSPP_IGC_COLOR1_RAM_LUTN 0x304
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#define DSPP_IGC_COLOR2_RAM_LUTN 0x308
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#define DANGER_STATUS 0x360
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#define SAFE_STATUS 0x364
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#define HW_EVENTS_CTL 0x37C
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#define MDP_WD_TIMER_0_CTL 0x380
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#define MDP_WD_TIMER_0_CTL2 0x384
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#define MDP_WD_TIMER_0_LOAD_VALUE 0x388
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#define MDP_WD_TIMER_1_CTL 0x390
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#define MDP_WD_TIMER_1_CTL2 0x394
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#define MDP_WD_TIMER_1_LOAD_VALUE 0x398
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#define CLK_CTRL3 0x3A8
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#define CLK_STATUS3 0x3AC
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#define CLK_CTRL4 0x3B0
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#define CLK_STATUS4 0x3B4
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#define CLK_CTRL5 0x3B8
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#define CLK_STATUS5 0x3BC
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#define CLK_CTRL7 0x3D0
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#define CLK_STATUS7 0x3D4
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#define SPLIT_DISPLAY_LOWER_PIPE_CTRL 0x3F0
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#define SPLIT_DISPLAY_TE_LINE_INTERVAL 0x3F4
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#define INTF_SW_RESET_MASK 0x3FC
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#define HDMI_DP_CORE_SELECT 0x408
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#define MDP_OUT_CTL_0 0x410
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#define MDP_VSYNC_SEL 0x414
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#define MDP_WD_TIMER_2_CTL 0x420
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#define MDP_WD_TIMER_2_CTL2 0x424
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#define MDP_WD_TIMER_2_LOAD_VALUE 0x428
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#define MDP_WD_TIMER_3_CTL 0x430
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#define MDP_WD_TIMER_3_CTL2 0x434
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#define MDP_WD_TIMER_3_LOAD_VALUE 0x438
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#define MDP_WD_TIMER_4_CTL 0x440
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#define MDP_WD_TIMER_4_CTL2 0x444
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#define MDP_WD_TIMER_4_LOAD_VALUE 0x448
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#define DCE_SEL 0x450
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#define MDP_PERIPH_TOP0 MDP_WD_TIMER_0_CTL
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#define MDP_PERIPH_TOP0_END CLK_CTRL3
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#endif /*_DPU_HWIO_H */
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