231 lines
6.0 KiB
C
231 lines
6.0 KiB
C
/*
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* Copyright 2017 Red Hat Inc.
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*
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* Permission is hereby granted, free of charge, to any person obtaining a
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* copy of this software and associated documentation files (the "Software"),
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* to deal in the Software without restriction, including without limitation
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* the rights to use, copy, modify, merge, publish, distribute, sublicense,
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* and/or sell copies of the Software, and to permit persons to whom the
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* Software is furnished to do so, subject to the following conditions:
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*
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* The above copyright notice and this permission notice shall be included in
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* all copies or substantial portions of the Software.
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*
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* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
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* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
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* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
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* THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR
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* OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
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* ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
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* OTHER DEALINGS IN THE SOFTWARE.
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*/
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#include "vmm.h"
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#include <subdev/timer.h>
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static void
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nv44_vmm_pgt_fill(struct nvkm_vmm *vmm, struct nvkm_mmu_pt *pt,
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dma_addr_t *list, u32 ptei, u32 ptes)
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{
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u32 pteo = (ptei << 2) & ~0x0000000f;
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u32 tmp[4];
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tmp[0] = nvkm_ro32(pt->memory, pteo + 0x0);
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tmp[1] = nvkm_ro32(pt->memory, pteo + 0x4);
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tmp[2] = nvkm_ro32(pt->memory, pteo + 0x8);
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tmp[3] = nvkm_ro32(pt->memory, pteo + 0xc);
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while (ptes--) {
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u32 addr = (list ? *list++ : vmm->null) >> 12;
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switch (ptei++ & 0x3) {
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case 0:
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tmp[0] &= ~0x07ffffff;
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tmp[0] |= addr;
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break;
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case 1:
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tmp[0] &= ~0xf8000000;
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tmp[0] |= addr << 27;
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tmp[1] &= ~0x003fffff;
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tmp[1] |= addr >> 5;
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break;
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case 2:
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tmp[1] &= ~0xffc00000;
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tmp[1] |= addr << 22;
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tmp[2] &= ~0x0001ffff;
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tmp[2] |= addr >> 10;
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break;
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case 3:
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tmp[2] &= ~0xfffe0000;
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tmp[2] |= addr << 17;
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tmp[3] &= ~0x00000fff;
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tmp[3] |= addr >> 15;
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break;
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}
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}
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VMM_WO032(pt, vmm, pteo + 0x0, tmp[0]);
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VMM_WO032(pt, vmm, pteo + 0x4, tmp[1]);
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VMM_WO032(pt, vmm, pteo + 0x8, tmp[2]);
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VMM_WO032(pt, vmm, pteo + 0xc, tmp[3] | 0x40000000);
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}
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static void
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nv44_vmm_pgt_pte(struct nvkm_vmm *vmm, struct nvkm_mmu_pt *pt,
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u32 ptei, u32 ptes, struct nvkm_vmm_map *map, u64 addr)
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{
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dma_addr_t tmp[4], i;
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if (ptei & 3) {
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const u32 pten = min(ptes, 4 - (ptei & 3));
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for (i = 0; i < pten; i++, addr += 0x1000)
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tmp[i] = addr;
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nv44_vmm_pgt_fill(vmm, pt, tmp, ptei, pten);
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ptei += pten;
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ptes -= pten;
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}
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while (ptes >= 4) {
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for (i = 0; i < 4; i++, addr += 0x1000)
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tmp[i] = addr >> 12;
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VMM_WO032(pt, vmm, ptei++ * 4, tmp[0] >> 0 | tmp[1] << 27);
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VMM_WO032(pt, vmm, ptei++ * 4, tmp[1] >> 5 | tmp[2] << 22);
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VMM_WO032(pt, vmm, ptei++ * 4, tmp[2] >> 10 | tmp[3] << 17);
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VMM_WO032(pt, vmm, ptei++ * 4, tmp[3] >> 15 | 0x40000000);
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ptes -= 4;
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}
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if (ptes) {
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for (i = 0; i < ptes; i++, addr += 0x1000)
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tmp[i] = addr;
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nv44_vmm_pgt_fill(vmm, pt, tmp, ptei, ptes);
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}
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}
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static void
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nv44_vmm_pgt_sgl(struct nvkm_vmm *vmm, struct nvkm_mmu_pt *pt,
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u32 ptei, u32 ptes, struct nvkm_vmm_map *map)
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{
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VMM_MAP_ITER_SGL(vmm, pt, ptei, ptes, map, nv44_vmm_pgt_pte);
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}
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static void
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nv44_vmm_pgt_dma(struct nvkm_vmm *vmm, struct nvkm_mmu_pt *pt,
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u32 ptei, u32 ptes, struct nvkm_vmm_map *map)
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{
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#if PAGE_SHIFT == 12
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nvkm_kmap(pt->memory);
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if (ptei & 3) {
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const u32 pten = min(ptes, 4 - (ptei & 3));
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nv44_vmm_pgt_fill(vmm, pt, map->dma, ptei, pten);
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ptei += pten;
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ptes -= pten;
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map->dma += pten;
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}
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while (ptes >= 4) {
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u32 tmp[4], i;
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for (i = 0; i < 4; i++)
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tmp[i] = *map->dma++ >> 12;
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VMM_WO032(pt, vmm, ptei++ * 4, tmp[0] >> 0 | tmp[1] << 27);
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VMM_WO032(pt, vmm, ptei++ * 4, tmp[1] >> 5 | tmp[2] << 22);
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VMM_WO032(pt, vmm, ptei++ * 4, tmp[2] >> 10 | tmp[3] << 17);
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VMM_WO032(pt, vmm, ptei++ * 4, tmp[3] >> 15 | 0x40000000);
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ptes -= 4;
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}
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if (ptes) {
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nv44_vmm_pgt_fill(vmm, pt, map->dma, ptei, ptes);
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map->dma += ptes;
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}
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nvkm_done(pt->memory);
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#else
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VMM_MAP_ITER_DMA(vmm, pt, ptei, ptes, map, nv44_vmm_pgt_pte);
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#endif
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}
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static void
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nv44_vmm_pgt_unmap(struct nvkm_vmm *vmm,
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struct nvkm_mmu_pt *pt, u32 ptei, u32 ptes)
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{
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nvkm_kmap(pt->memory);
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if (ptei & 3) {
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const u32 pten = min(ptes, 4 - (ptei & 3));
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nv44_vmm_pgt_fill(vmm, pt, NULL, ptei, pten);
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ptei += pten;
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ptes -= pten;
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}
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while (ptes > 4) {
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VMM_WO032(pt, vmm, ptei++ * 4, 0x00000000);
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VMM_WO032(pt, vmm, ptei++ * 4, 0x00000000);
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VMM_WO032(pt, vmm, ptei++ * 4, 0x00000000);
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VMM_WO032(pt, vmm, ptei++ * 4, 0x00000000);
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ptes -= 4;
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}
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if (ptes)
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nv44_vmm_pgt_fill(vmm, pt, NULL, ptei, ptes);
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nvkm_done(pt->memory);
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}
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static const struct nvkm_vmm_desc_func
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nv44_vmm_desc_pgt = {
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.unmap = nv44_vmm_pgt_unmap,
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.dma = nv44_vmm_pgt_dma,
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.sgl = nv44_vmm_pgt_sgl,
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};
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static const struct nvkm_vmm_desc
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nv44_vmm_desc_12[] = {
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{ PGT, 17, 4, 0x80000, &nv44_vmm_desc_pgt },
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{}
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};
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static void
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nv44_vmm_flush(struct nvkm_vmm *vmm, int level)
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{
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struct nvkm_device *device = vmm->mmu->subdev.device;
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nvkm_wr32(device, 0x100814, vmm->limit - 4096);
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nvkm_wr32(device, 0x100808, 0x000000020);
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nvkm_msec(device, 2000,
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if (nvkm_rd32(device, 0x100808) & 0x00000001)
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break;
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);
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nvkm_wr32(device, 0x100808, 0x00000000);
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}
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static const struct nvkm_vmm_func
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nv44_vmm = {
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.valid = nv04_vmm_valid,
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.flush = nv44_vmm_flush,
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.page = {
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{ 12, &nv44_vmm_desc_12[0], NVKM_VMM_PAGE_HOST },
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{}
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}
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};
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int
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nv44_vmm_new(struct nvkm_mmu *mmu, bool managed, u64 addr, u64 size,
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void *argv, u32 argc, struct lock_class_key *key, const char *name,
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struct nvkm_vmm **pvmm)
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{
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struct nvkm_subdev *subdev = &mmu->subdev;
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struct nvkm_vmm *vmm;
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int ret;
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ret = nv04_vmm_new_(&nv44_vmm, mmu, 0, managed, addr, size,
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argv, argc, key, name, &vmm);
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*pvmm = vmm;
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if (ret)
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return ret;
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vmm->nullp = dma_alloc_coherent(subdev->device->dev, 16 * 1024,
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&vmm->null, GFP_KERNEL);
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if (!vmm->nullp) {
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nvkm_warn(subdev, "unable to allocate dummy pages\n");
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vmm->null = 0;
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}
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return 0;
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}
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