405 lines
10 KiB
C
405 lines
10 KiB
C
// SPDX-License-Identifier: GPL-2.0-only
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/*
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* Copyright (C) 2016 Broadcom Limited
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*/
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/**
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* DOC: VC4 DPI module
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*
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* The VC4 DPI hardware supports MIPI DPI type 4 and Nokia ViSSI
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* signals. On BCM2835, these can be routed out to GPIO0-27 with the
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* ALT2 function.
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*/
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#include <drm/drm_atomic_helper.h>
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#include <drm/drm_bridge.h>
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#include <drm/drm_drv.h>
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#include <drm/drm_edid.h>
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#include <drm/drm_of.h>
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#include <drm/drm_panel.h>
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#include <drm/drm_probe_helper.h>
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#include <drm/drm_simple_kms_helper.h>
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#include <linux/clk.h>
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#include <linux/component.h>
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#include <linux/media-bus-format.h>
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#include <linux/of_graph.h>
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#include <linux/of_platform.h>
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#include "vc4_drv.h"
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#include "vc4_regs.h"
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#define DPI_C 0x00
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# define DPI_OUTPUT_ENABLE_MODE BIT(16)
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/* The order field takes the incoming 24 bit RGB from the pixel valve
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* and shuffles the 3 channels.
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*/
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# define DPI_ORDER_MASK VC4_MASK(15, 14)
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# define DPI_ORDER_SHIFT 14
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# define DPI_ORDER_RGB 0
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# define DPI_ORDER_BGR 1
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# define DPI_ORDER_GRB 2
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# define DPI_ORDER_BRG 3
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/* The format field takes the ORDER-shuffled pixel valve data and
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* formats it onto the output lines.
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*/
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# define DPI_FORMAT_MASK VC4_MASK(13, 11)
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# define DPI_FORMAT_SHIFT 11
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/* This define is named in the hardware, but actually just outputs 0. */
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# define DPI_FORMAT_9BIT_666_RGB 0
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/* Outputs 00000000rrrrrggggggbbbbb */
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# define DPI_FORMAT_16BIT_565_RGB_1 1
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/* Outputs 000rrrrr00gggggg000bbbbb */
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# define DPI_FORMAT_16BIT_565_RGB_2 2
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/* Outputs 00rrrrr000gggggg00bbbbb0 */
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# define DPI_FORMAT_16BIT_565_RGB_3 3
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/* Outputs 000000rrrrrrggggggbbbbbb */
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# define DPI_FORMAT_18BIT_666_RGB_1 4
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/* Outputs 00rrrrrr00gggggg00bbbbbb */
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# define DPI_FORMAT_18BIT_666_RGB_2 5
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/* Outputs rrrrrrrrggggggggbbbbbbbb */
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# define DPI_FORMAT_24BIT_888_RGB 6
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/* Reverses the polarity of the corresponding signal */
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# define DPI_PIXEL_CLK_INVERT BIT(10)
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# define DPI_HSYNC_INVERT BIT(9)
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# define DPI_VSYNC_INVERT BIT(8)
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# define DPI_OUTPUT_ENABLE_INVERT BIT(7)
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/* Outputs the signal the falling clock edge instead of rising. */
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# define DPI_HSYNC_NEGATE BIT(6)
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# define DPI_VSYNC_NEGATE BIT(5)
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# define DPI_OUTPUT_ENABLE_NEGATE BIT(4)
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/* Disables the signal */
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# define DPI_HSYNC_DISABLE BIT(3)
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# define DPI_VSYNC_DISABLE BIT(2)
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# define DPI_OUTPUT_ENABLE_DISABLE BIT(1)
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/* Power gate to the device, full reset at 0 -> 1 transition */
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# define DPI_ENABLE BIT(0)
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/* All other registers besides DPI_C return the ID */
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#define DPI_ID 0x04
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# define DPI_ID_VALUE 0x00647069
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/* General DPI hardware state. */
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struct vc4_dpi {
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struct vc4_encoder encoder;
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struct platform_device *pdev;
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void __iomem *regs;
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struct clk *pixel_clock;
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struct clk *core_clock;
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struct debugfs_regset32 regset;
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};
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#define to_vc4_dpi(_encoder) \
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container_of_const(_encoder, struct vc4_dpi, encoder.base)
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#define DPI_READ(offset) \
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({ \
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kunit_fail_current_test("Accessing a register in a unit test!\n"); \
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readl(dpi->regs + (offset)); \
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})
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#define DPI_WRITE(offset, val) \
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do { \
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kunit_fail_current_test("Accessing a register in a unit test!\n"); \
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writel(val, dpi->regs + (offset)); \
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} while (0)
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static const struct debugfs_reg32 dpi_regs[] = {
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VC4_REG32(DPI_C),
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VC4_REG32(DPI_ID),
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};
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static void vc4_dpi_encoder_disable(struct drm_encoder *encoder)
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{
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struct drm_device *dev = encoder->dev;
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struct vc4_dpi *dpi = to_vc4_dpi(encoder);
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int idx;
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if (!drm_dev_enter(dev, &idx))
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return;
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clk_disable_unprepare(dpi->pixel_clock);
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drm_dev_exit(idx);
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}
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static void vc4_dpi_encoder_enable(struct drm_encoder *encoder)
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{
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struct drm_device *dev = encoder->dev;
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struct drm_display_mode *mode = &encoder->crtc->mode;
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struct vc4_dpi *dpi = to_vc4_dpi(encoder);
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struct drm_connector_list_iter conn_iter;
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struct drm_connector *connector = NULL, *connector_scan;
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u32 dpi_c = DPI_ENABLE;
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int idx;
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int ret;
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/* Look up the connector attached to DPI so we can get the
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* bus_format. Ideally the bridge would tell us the
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* bus_format we want, but it doesn't yet, so assume that it's
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* uniform throughout the bridge chain.
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*/
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drm_connector_list_iter_begin(dev, &conn_iter);
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drm_for_each_connector_iter(connector_scan, &conn_iter) {
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if (connector_scan->encoder == encoder) {
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connector = connector_scan;
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break;
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}
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}
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drm_connector_list_iter_end(&conn_iter);
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/* Default to 18bit if no connector or format found. */
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dpi_c |= VC4_SET_FIELD(DPI_FORMAT_18BIT_666_RGB_1, DPI_FORMAT);
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if (connector) {
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if (connector->display_info.num_bus_formats) {
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u32 bus_format = connector->display_info.bus_formats[0];
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dpi_c &= ~DPI_FORMAT_MASK;
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switch (bus_format) {
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case MEDIA_BUS_FMT_RGB888_1X24:
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dpi_c |= VC4_SET_FIELD(DPI_FORMAT_24BIT_888_RGB,
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DPI_FORMAT);
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break;
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case MEDIA_BUS_FMT_BGR888_1X24:
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dpi_c |= VC4_SET_FIELD(DPI_FORMAT_24BIT_888_RGB,
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DPI_FORMAT);
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dpi_c |= VC4_SET_FIELD(DPI_ORDER_BGR,
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DPI_ORDER);
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break;
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case MEDIA_BUS_FMT_BGR666_1X24_CPADHI:
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dpi_c |= VC4_SET_FIELD(DPI_ORDER_BGR, DPI_ORDER);
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fallthrough;
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case MEDIA_BUS_FMT_RGB666_1X24_CPADHI:
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dpi_c |= VC4_SET_FIELD(DPI_FORMAT_18BIT_666_RGB_2,
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DPI_FORMAT);
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break;
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case MEDIA_BUS_FMT_BGR666_1X18:
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dpi_c |= VC4_SET_FIELD(DPI_ORDER_BGR, DPI_ORDER);
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fallthrough;
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case MEDIA_BUS_FMT_RGB666_1X18:
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dpi_c |= VC4_SET_FIELD(DPI_FORMAT_18BIT_666_RGB_1,
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DPI_FORMAT);
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break;
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case MEDIA_BUS_FMT_RGB565_1X16:
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dpi_c |= VC4_SET_FIELD(DPI_FORMAT_16BIT_565_RGB_1,
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DPI_FORMAT);
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break;
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case MEDIA_BUS_FMT_RGB565_1X24_CPADHI:
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dpi_c |= VC4_SET_FIELD(DPI_FORMAT_16BIT_565_RGB_2,
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DPI_FORMAT);
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break;
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default:
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DRM_ERROR("Unknown media bus format %d\n",
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bus_format);
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break;
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}
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}
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if (connector->display_info.bus_flags & DRM_BUS_FLAG_PIXDATA_DRIVE_NEGEDGE)
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dpi_c |= DPI_PIXEL_CLK_INVERT;
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if (connector->display_info.bus_flags & DRM_BUS_FLAG_DE_LOW)
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dpi_c |= DPI_OUTPUT_ENABLE_INVERT;
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}
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if (mode->flags & DRM_MODE_FLAG_CSYNC) {
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if (mode->flags & DRM_MODE_FLAG_NCSYNC)
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dpi_c |= DPI_OUTPUT_ENABLE_INVERT;
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} else {
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dpi_c |= DPI_OUTPUT_ENABLE_MODE;
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if (mode->flags & DRM_MODE_FLAG_NHSYNC)
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dpi_c |= DPI_HSYNC_INVERT;
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else if (!(mode->flags & DRM_MODE_FLAG_PHSYNC))
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dpi_c |= DPI_HSYNC_DISABLE;
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if (mode->flags & DRM_MODE_FLAG_NVSYNC)
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dpi_c |= DPI_VSYNC_INVERT;
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else if (!(mode->flags & DRM_MODE_FLAG_PVSYNC))
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dpi_c |= DPI_VSYNC_DISABLE;
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}
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if (!drm_dev_enter(dev, &idx))
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return;
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DPI_WRITE(DPI_C, dpi_c);
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ret = clk_set_rate(dpi->pixel_clock, mode->clock * 1000);
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if (ret)
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DRM_ERROR("Failed to set clock rate: %d\n", ret);
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ret = clk_prepare_enable(dpi->pixel_clock);
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if (ret)
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DRM_ERROR("Failed to set clock rate: %d\n", ret);
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drm_dev_exit(idx);
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}
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static enum drm_mode_status vc4_dpi_encoder_mode_valid(struct drm_encoder *encoder,
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const struct drm_display_mode *mode)
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{
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if (mode->flags & DRM_MODE_FLAG_INTERLACE)
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return MODE_NO_INTERLACE;
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return MODE_OK;
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}
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static const struct drm_encoder_helper_funcs vc4_dpi_encoder_helper_funcs = {
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.disable = vc4_dpi_encoder_disable,
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.enable = vc4_dpi_encoder_enable,
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.mode_valid = vc4_dpi_encoder_mode_valid,
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};
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static int vc4_dpi_late_register(struct drm_encoder *encoder)
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{
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struct drm_device *drm = encoder->dev;
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struct vc4_dpi *dpi = to_vc4_dpi(encoder);
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vc4_debugfs_add_regset32(drm, "dpi_regs", &dpi->regset);
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return 0;
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}
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static const struct drm_encoder_funcs vc4_dpi_encoder_funcs = {
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.late_register = vc4_dpi_late_register,
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};
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static const struct of_device_id vc4_dpi_dt_match[] = {
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{ .compatible = "brcm,bcm2835-dpi", .data = NULL },
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{}
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};
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/* Sets up the next link in the display chain, whether it's a panel or
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* a bridge.
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*/
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static int vc4_dpi_init_bridge(struct vc4_dpi *dpi)
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{
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struct drm_device *drm = dpi->encoder.base.dev;
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struct device *dev = &dpi->pdev->dev;
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struct drm_bridge *bridge;
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bridge = drmm_of_get_bridge(drm, dev->of_node, 0, 0);
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if (IS_ERR(bridge)) {
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/* If nothing was connected in the DT, that's not an
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* error.
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*/
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if (PTR_ERR(bridge) == -ENODEV)
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return 0;
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else
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return PTR_ERR(bridge);
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}
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return drm_bridge_attach(&dpi->encoder.base, bridge, NULL, 0);
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}
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static void vc4_dpi_disable_clock(void *ptr)
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{
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struct vc4_dpi *dpi = ptr;
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clk_disable_unprepare(dpi->core_clock);
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}
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static int vc4_dpi_bind(struct device *dev, struct device *master, void *data)
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{
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struct platform_device *pdev = to_platform_device(dev);
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struct drm_device *drm = dev_get_drvdata(master);
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struct vc4_dpi *dpi;
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int ret;
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dpi = drmm_kzalloc(drm, sizeof(*dpi), GFP_KERNEL);
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if (!dpi)
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return -ENOMEM;
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dpi->encoder.type = VC4_ENCODER_TYPE_DPI;
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dpi->pdev = pdev;
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dpi->regs = vc4_ioremap_regs(pdev, 0);
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if (IS_ERR(dpi->regs))
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return PTR_ERR(dpi->regs);
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dpi->regset.base = dpi->regs;
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dpi->regset.regs = dpi_regs;
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dpi->regset.nregs = ARRAY_SIZE(dpi_regs);
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if (DPI_READ(DPI_ID) != DPI_ID_VALUE) {
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dev_err(dev, "Port returned 0x%08x for ID instead of 0x%08x\n",
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DPI_READ(DPI_ID), DPI_ID_VALUE);
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return -ENODEV;
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}
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dpi->core_clock = devm_clk_get(dev, "core");
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if (IS_ERR(dpi->core_clock)) {
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ret = PTR_ERR(dpi->core_clock);
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if (ret != -EPROBE_DEFER)
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DRM_ERROR("Failed to get core clock: %d\n", ret);
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return ret;
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}
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dpi->pixel_clock = devm_clk_get(dev, "pixel");
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if (IS_ERR(dpi->pixel_clock)) {
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ret = PTR_ERR(dpi->pixel_clock);
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if (ret != -EPROBE_DEFER)
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DRM_ERROR("Failed to get pixel clock: %d\n", ret);
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return ret;
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}
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ret = clk_prepare_enable(dpi->core_clock);
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if (ret) {
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DRM_ERROR("Failed to turn on core clock: %d\n", ret);
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return ret;
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}
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ret = devm_add_action_or_reset(dev, vc4_dpi_disable_clock, dpi);
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if (ret)
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return ret;
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ret = drmm_encoder_init(drm, &dpi->encoder.base,
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&vc4_dpi_encoder_funcs,
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DRM_MODE_ENCODER_DPI,
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NULL);
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if (ret)
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return ret;
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drm_encoder_helper_add(&dpi->encoder.base, &vc4_dpi_encoder_helper_funcs);
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ret = vc4_dpi_init_bridge(dpi);
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if (ret)
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return ret;
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dev_set_drvdata(dev, dpi);
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return 0;
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}
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static const struct component_ops vc4_dpi_ops = {
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.bind = vc4_dpi_bind,
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};
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static int vc4_dpi_dev_probe(struct platform_device *pdev)
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{
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return component_add(&pdev->dev, &vc4_dpi_ops);
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}
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static int vc4_dpi_dev_remove(struct platform_device *pdev)
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{
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component_del(&pdev->dev, &vc4_dpi_ops);
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return 0;
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}
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struct platform_driver vc4_dpi_driver = {
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.probe = vc4_dpi_dev_probe,
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.remove = vc4_dpi_dev_remove,
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.driver = {
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.name = "vc4_dpi",
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.of_match_table = vc4_dpi_dt_match,
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},
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};
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