608 lines
15 KiB
C
608 lines
15 KiB
C
// SPDX-License-Identifier: GPL-2.0-only
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/* Copyright (C) 2022 Hewlett-Packard Enterprise Development Company, L.P. */
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#include <linux/err.h>
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#include <linux/io.h>
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#include <linux/i2c.h>
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#include <linux/module.h>
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#include <linux/of_device.h>
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#include <linux/regmap.h>
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#include <linux/mfd/syscon.h>
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#define GXP_MAX_I2C_ENGINE 10
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static const char * const gxp_i2c_name[] = {
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"gxp-i2c0", "gxp-i2c1", "gxp-i2c2", "gxp-i2c3",
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"gxp-i2c4", "gxp-i2c5", "gxp-i2c6", "gxp-i2c7",
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"gxp-i2c8", "gxp-i2c9" };
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/* GXP I2C Global interrupt status/enable register*/
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#define GXP_I2CINTSTAT 0x00
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#define GXP_I2CINTEN 0x04
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/* GXP I2C registers */
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#define GXP_I2CSTAT 0x00
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#define MASK_STOP_EVENT 0x20
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#define MASK_ACK 0x08
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#define MASK_RW 0x04
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#define GXP_I2CEVTERR 0x01
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#define MASK_SLAVE_CMD_EVENT 0x01
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#define MASK_SLAVE_DATA_EVENT 0x02
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#define MASK_MASTER_EVENT 0x10
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#define GXP_I2CSNPDAT 0x02
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#define GXP_I2CMCMD 0x04
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#define GXP_I2CSCMD 0x06
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#define GXP_I2CSNPAA 0x09
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#define GXP_I2CADVFEAT 0x0A
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#define GXP_I2COWNADR 0x0B
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#define GXP_I2CFREQDIV 0x0C
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#define GXP_I2CFLTFAIR 0x0D
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#define GXP_I2CTMOEDG 0x0E
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#define GXP_I2CCYCTIM 0x0F
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/* I2CSCMD Bits */
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#define SNOOP_EVT_CLR 0x80
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#define SLAVE_EVT_CLR 0x40
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#define SNOOP_EVT_MASK 0x20
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#define SLAVE_EVT_MASK 0x10
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#define SLAVE_ACK_ENAB 0x08
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#define SLAVE_EVT_STALL 0x01
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/* I2CMCMD Bits */
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#define MASTER_EVT_CLR 0x80
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#define MASTER_ACK_ENAB 0x08
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#define RW_CMD 0x04
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#define STOP_CMD 0x02
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#define START_CMD 0x01
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/* I2CTMOEDG value */
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#define GXP_DATA_EDGE_RST_CTRL 0x0a /* 30ns */
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/* I2CFLTFAIR Bits */
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#define FILTER_CNT 0x30
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#define FAIRNESS_CNT 0x02
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enum {
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GXP_I2C_IDLE = 0,
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GXP_I2C_ADDR_PHASE,
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GXP_I2C_RDATA_PHASE,
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GXP_I2C_WDATA_PHASE,
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GXP_I2C_ADDR_NACK,
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GXP_I2C_DATA_NACK,
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GXP_I2C_ERROR,
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GXP_I2C_COMP
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};
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struct gxp_i2c_drvdata {
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struct device *dev;
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void __iomem *base;
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struct i2c_timings t;
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u32 engine;
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int irq;
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struct completion completion;
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struct i2c_adapter adapter;
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struct i2c_msg *curr_msg;
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int msgs_remaining;
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int msgs_num;
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u8 *buf;
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size_t buf_remaining;
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unsigned char state;
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struct i2c_client *slave;
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unsigned char stopped;
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};
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static struct regmap *i2cg_map;
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static void gxp_i2c_start(struct gxp_i2c_drvdata *drvdata)
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{
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u16 value;
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drvdata->buf = drvdata->curr_msg->buf;
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drvdata->buf_remaining = drvdata->curr_msg->len;
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/* Note: Address in struct i2c_msg is 7 bits */
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value = drvdata->curr_msg->addr << 9;
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/* Read or Write */
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value |= drvdata->curr_msg->flags & I2C_M_RD ? RW_CMD | START_CMD : START_CMD;
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drvdata->state = GXP_I2C_ADDR_PHASE;
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writew(value, drvdata->base + GXP_I2CMCMD);
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}
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static int gxp_i2c_master_xfer(struct i2c_adapter *adapter,
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struct i2c_msg *msgs, int num)
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{
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int ret;
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struct gxp_i2c_drvdata *drvdata = i2c_get_adapdata(adapter);
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unsigned long time_left;
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drvdata->msgs_remaining = num;
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drvdata->curr_msg = msgs;
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drvdata->msgs_num = num;
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reinit_completion(&drvdata->completion);
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gxp_i2c_start(drvdata);
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time_left = wait_for_completion_timeout(&drvdata->completion,
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adapter->timeout);
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ret = num - drvdata->msgs_remaining;
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if (time_left == 0)
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return -ETIMEDOUT;
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if (drvdata->state == GXP_I2C_ADDR_NACK)
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return -ENXIO;
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if (drvdata->state == GXP_I2C_DATA_NACK)
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return -EIO;
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return ret;
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}
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static u32 gxp_i2c_func(struct i2c_adapter *adap)
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{
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if (IS_ENABLED(CONFIG_I2C_SLAVE))
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return I2C_FUNC_I2C | I2C_FUNC_SMBUS_EMUL | I2C_FUNC_SLAVE;
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return I2C_FUNC_I2C | I2C_FUNC_SMBUS_EMUL;
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}
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#if IS_ENABLED(CONFIG_I2C_SLAVE)
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static int gxp_i2c_reg_slave(struct i2c_client *slave)
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{
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struct gxp_i2c_drvdata *drvdata = i2c_get_adapdata(slave->adapter);
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if (drvdata->slave)
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return -EBUSY;
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if (slave->flags & I2C_CLIENT_TEN)
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return -EAFNOSUPPORT;
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drvdata->slave = slave;
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writeb(slave->addr << 1, drvdata->base + GXP_I2COWNADR);
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writeb(SLAVE_EVT_CLR | SNOOP_EVT_MASK | SLAVE_ACK_ENAB |
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SLAVE_EVT_STALL, drvdata->base + GXP_I2CSCMD);
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return 0;
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}
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static int gxp_i2c_unreg_slave(struct i2c_client *slave)
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{
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struct gxp_i2c_drvdata *drvdata = i2c_get_adapdata(slave->adapter);
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WARN_ON(!drvdata->slave);
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writeb(0x00, drvdata->base + GXP_I2COWNADR);
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writeb(SNOOP_EVT_CLR | SLAVE_EVT_CLR | SNOOP_EVT_MASK |
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SLAVE_EVT_MASK, drvdata->base + GXP_I2CSCMD);
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drvdata->slave = NULL;
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return 0;
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}
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#endif
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static const struct i2c_algorithm gxp_i2c_algo = {
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.master_xfer = gxp_i2c_master_xfer,
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.functionality = gxp_i2c_func,
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#if IS_ENABLED(CONFIG_I2C_SLAVE)
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.reg_slave = gxp_i2c_reg_slave,
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.unreg_slave = gxp_i2c_unreg_slave,
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#endif
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};
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static void gxp_i2c_stop(struct gxp_i2c_drvdata *drvdata)
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{
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/* Clear event and send stop */
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writeb(MASTER_EVT_CLR | STOP_CMD, drvdata->base + GXP_I2CMCMD);
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complete(&drvdata->completion);
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}
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static void gxp_i2c_restart(struct gxp_i2c_drvdata *drvdata)
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{
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u16 value;
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drvdata->buf = drvdata->curr_msg->buf;
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drvdata->buf_remaining = drvdata->curr_msg->len;
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value = drvdata->curr_msg->addr << 9;
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if (drvdata->curr_msg->flags & I2C_M_RD) {
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/* Read and clear master event */
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value |= MASTER_EVT_CLR | RW_CMD | START_CMD;
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} else {
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/* Write and clear master event */
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value |= MASTER_EVT_CLR | START_CMD;
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}
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drvdata->state = GXP_I2C_ADDR_PHASE;
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writew(value, drvdata->base + GXP_I2CMCMD);
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}
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static void gxp_i2c_chk_addr_ack(struct gxp_i2c_drvdata *drvdata)
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{
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u16 value;
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value = readb(drvdata->base + GXP_I2CSTAT);
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if (!(value & MASK_ACK)) {
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/* Got no ack, stop */
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drvdata->state = GXP_I2C_ADDR_NACK;
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gxp_i2c_stop(drvdata);
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return;
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}
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if (drvdata->curr_msg->flags & I2C_M_RD) {
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/* Start to read data from slave */
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if (drvdata->buf_remaining == 0) {
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/* No more data to read, stop */
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drvdata->msgs_remaining--;
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drvdata->state = GXP_I2C_COMP;
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gxp_i2c_stop(drvdata);
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return;
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}
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drvdata->state = GXP_I2C_RDATA_PHASE;
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if (drvdata->buf_remaining == 1) {
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/* The last data, do not ack */
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writeb(MASTER_EVT_CLR | RW_CMD,
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drvdata->base + GXP_I2CMCMD);
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} else {
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/* Read data and ack it */
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writeb(MASTER_EVT_CLR | MASTER_ACK_ENAB |
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RW_CMD, drvdata->base + GXP_I2CMCMD);
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}
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} else {
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/* Start to write first data to slave */
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if (drvdata->buf_remaining == 0) {
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/* No more data to write, stop */
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drvdata->msgs_remaining--;
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drvdata->state = GXP_I2C_COMP;
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gxp_i2c_stop(drvdata);
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return;
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}
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value = *drvdata->buf;
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value = value << 8;
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/* Clear master event */
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value |= MASTER_EVT_CLR;
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drvdata->buf++;
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drvdata->buf_remaining--;
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drvdata->state = GXP_I2C_WDATA_PHASE;
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writew(value, drvdata->base + GXP_I2CMCMD);
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}
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}
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static void gxp_i2c_ack_data(struct gxp_i2c_drvdata *drvdata)
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{
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u8 value;
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/* Store the data returned */
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value = readb(drvdata->base + GXP_I2CSNPDAT);
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*drvdata->buf = value;
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drvdata->buf++;
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drvdata->buf_remaining--;
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if (drvdata->buf_remaining == 0) {
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/* No more data, this message is completed. */
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drvdata->msgs_remaining--;
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if (drvdata->msgs_remaining == 0) {
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/* No more messages, stop */
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drvdata->state = GXP_I2C_COMP;
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gxp_i2c_stop(drvdata);
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return;
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}
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/* Move to next message and start transfer */
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drvdata->curr_msg++;
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gxp_i2c_restart(drvdata);
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return;
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}
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/* Ack the slave to make it send next byte */
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drvdata->state = GXP_I2C_RDATA_PHASE;
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if (drvdata->buf_remaining == 1) {
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/* The last data, do not ack */
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writeb(MASTER_EVT_CLR | RW_CMD,
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drvdata->base + GXP_I2CMCMD);
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} else {
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/* Read data and ack it */
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writeb(MASTER_EVT_CLR | MASTER_ACK_ENAB |
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RW_CMD, drvdata->base + GXP_I2CMCMD);
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}
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}
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static void gxp_i2c_chk_data_ack(struct gxp_i2c_drvdata *drvdata)
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{
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u16 value;
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value = readb(drvdata->base + GXP_I2CSTAT);
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if (!(value & MASK_ACK)) {
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/* Received No ack, stop */
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drvdata->state = GXP_I2C_DATA_NACK;
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gxp_i2c_stop(drvdata);
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return;
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}
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/* Got ack, check if there is more data to write */
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if (drvdata->buf_remaining == 0) {
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/* No more data, this message is completed */
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drvdata->msgs_remaining--;
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if (drvdata->msgs_remaining == 0) {
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/* No more messages, stop */
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drvdata->state = GXP_I2C_COMP;
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gxp_i2c_stop(drvdata);
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return;
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}
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/* Move to next message and start transfer */
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drvdata->curr_msg++;
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gxp_i2c_restart(drvdata);
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return;
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}
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/* Write data to slave */
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value = *drvdata->buf;
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value = value << 8;
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/* Clear master event */
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value |= MASTER_EVT_CLR;
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drvdata->buf++;
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drvdata->buf_remaining--;
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drvdata->state = GXP_I2C_WDATA_PHASE;
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writew(value, drvdata->base + GXP_I2CMCMD);
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}
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static bool gxp_i2c_slave_irq_handler(struct gxp_i2c_drvdata *drvdata)
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{
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u8 value;
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u8 buf;
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int ret;
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value = readb(drvdata->base + GXP_I2CEVTERR);
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/* Received start or stop event */
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if (value & MASK_SLAVE_CMD_EVENT) {
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value = readb(drvdata->base + GXP_I2CSTAT);
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/* Master sent stop */
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if (value & MASK_STOP_EVENT) {
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if (drvdata->stopped == 0)
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i2c_slave_event(drvdata->slave, I2C_SLAVE_STOP, &buf);
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writeb(SLAVE_EVT_CLR | SNOOP_EVT_MASK |
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SLAVE_ACK_ENAB | SLAVE_EVT_STALL, drvdata->base + GXP_I2CSCMD);
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drvdata->stopped = 1;
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} else {
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/* Master sent start and wants to read */
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drvdata->stopped = 0;
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if (value & MASK_RW) {
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i2c_slave_event(drvdata->slave,
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I2C_SLAVE_READ_REQUESTED, &buf);
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value = buf << 8 | (SLAVE_EVT_CLR | SNOOP_EVT_MASK |
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SLAVE_EVT_STALL);
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writew(value, drvdata->base + GXP_I2CSCMD);
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} else {
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/* Master wants to write to us */
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ret = i2c_slave_event(drvdata->slave,
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I2C_SLAVE_WRITE_REQUESTED, &buf);
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if (!ret) {
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/* Ack next byte from master */
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writeb(SLAVE_EVT_CLR | SNOOP_EVT_MASK |
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SLAVE_ACK_ENAB | SLAVE_EVT_STALL,
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drvdata->base + GXP_I2CSCMD);
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} else {
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/* Nack next byte from master */
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writeb(SLAVE_EVT_CLR | SNOOP_EVT_MASK |
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SLAVE_EVT_STALL, drvdata->base + GXP_I2CSCMD);
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}
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}
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}
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} else if (value & MASK_SLAVE_DATA_EVENT) {
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value = readb(drvdata->base + GXP_I2CSTAT);
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/* Master wants to read */
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if (value & MASK_RW) {
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/* Master wants another byte */
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if (value & MASK_ACK) {
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i2c_slave_event(drvdata->slave,
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I2C_SLAVE_READ_PROCESSED, &buf);
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value = buf << 8 | (SLAVE_EVT_CLR | SNOOP_EVT_MASK |
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SLAVE_EVT_STALL);
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writew(value, drvdata->base + GXP_I2CSCMD);
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} else {
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/* No more bytes needed */
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writew(SLAVE_EVT_CLR | SNOOP_EVT_MASK |
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SLAVE_ACK_ENAB | SLAVE_EVT_STALL,
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drvdata->base + GXP_I2CSCMD);
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}
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} else {
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/* Master wants to write to us */
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value = readb(drvdata->base + GXP_I2CSNPDAT);
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buf = (uint8_t)value;
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ret = i2c_slave_event(drvdata->slave,
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I2C_SLAVE_WRITE_RECEIVED, &buf);
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if (!ret) {
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/* Ack next byte from master */
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writeb(SLAVE_EVT_CLR | SNOOP_EVT_MASK |
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SLAVE_ACK_ENAB | SLAVE_EVT_STALL,
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drvdata->base + GXP_I2CSCMD);
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} else {
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/* Nack next byte from master */
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writeb(SLAVE_EVT_CLR | SNOOP_EVT_MASK |
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SLAVE_EVT_STALL, drvdata->base + GXP_I2CSCMD);
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}
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}
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} else {
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return false;
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}
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return true;
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}
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static irqreturn_t gxp_i2c_irq_handler(int irq, void *_drvdata)
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{
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struct gxp_i2c_drvdata *drvdata = (struct gxp_i2c_drvdata *)_drvdata;
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u32 value;
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/* Check if the interrupt is for the current engine */
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regmap_read(i2cg_map, GXP_I2CINTSTAT, &value);
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if (!(value & BIT(drvdata->engine)))
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return IRQ_NONE;
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value = readb(drvdata->base + GXP_I2CEVTERR);
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/* Error */
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if (value & ~(MASK_MASTER_EVENT | MASK_SLAVE_CMD_EVENT |
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MASK_SLAVE_DATA_EVENT)) {
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/* Clear all events */
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writeb(0x00, drvdata->base + GXP_I2CEVTERR);
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drvdata->state = GXP_I2C_ERROR;
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gxp_i2c_stop(drvdata);
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return IRQ_HANDLED;
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}
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if (IS_ENABLED(CONFIG_I2C_SLAVE)) {
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/* Slave mode */
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if (value & (MASK_SLAVE_CMD_EVENT | MASK_SLAVE_DATA_EVENT)) {
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if (gxp_i2c_slave_irq_handler(drvdata))
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return IRQ_HANDLED;
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return IRQ_NONE;
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}
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}
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/* Master mode */
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switch (drvdata->state) {
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case GXP_I2C_ADDR_PHASE:
|
|
gxp_i2c_chk_addr_ack(drvdata);
|
|
break;
|
|
|
|
case GXP_I2C_RDATA_PHASE:
|
|
gxp_i2c_ack_data(drvdata);
|
|
break;
|
|
|
|
case GXP_I2C_WDATA_PHASE:
|
|
gxp_i2c_chk_data_ack(drvdata);
|
|
break;
|
|
}
|
|
|
|
return IRQ_HANDLED;
|
|
}
|
|
|
|
static void gxp_i2c_init(struct gxp_i2c_drvdata *drvdata)
|
|
{
|
|
drvdata->state = GXP_I2C_IDLE;
|
|
writeb(2000000 / drvdata->t.bus_freq_hz,
|
|
drvdata->base + GXP_I2CFREQDIV);
|
|
writeb(FILTER_CNT | FAIRNESS_CNT,
|
|
drvdata->base + GXP_I2CFLTFAIR);
|
|
writeb(GXP_DATA_EDGE_RST_CTRL, drvdata->base + GXP_I2CTMOEDG);
|
|
writeb(0x00, drvdata->base + GXP_I2CCYCTIM);
|
|
writeb(0x00, drvdata->base + GXP_I2CSNPAA);
|
|
writeb(0x00, drvdata->base + GXP_I2CADVFEAT);
|
|
writeb(SNOOP_EVT_CLR | SLAVE_EVT_CLR | SNOOP_EVT_MASK |
|
|
SLAVE_EVT_MASK, drvdata->base + GXP_I2CSCMD);
|
|
writeb(MASTER_EVT_CLR, drvdata->base + GXP_I2CMCMD);
|
|
writeb(0x00, drvdata->base + GXP_I2CEVTERR);
|
|
writeb(0x00, drvdata->base + GXP_I2COWNADR);
|
|
}
|
|
|
|
static int gxp_i2c_probe(struct platform_device *pdev)
|
|
{
|
|
struct gxp_i2c_drvdata *drvdata;
|
|
int rc;
|
|
struct i2c_adapter *adapter;
|
|
|
|
if (!i2cg_map) {
|
|
i2cg_map = syscon_regmap_lookup_by_phandle(pdev->dev.of_node,
|
|
"hpe,sysreg");
|
|
if (IS_ERR(i2cg_map)) {
|
|
return dev_err_probe(&pdev->dev, PTR_ERR(i2cg_map),
|
|
"failed to map i2cg_handle\n");
|
|
}
|
|
|
|
/* Disable interrupt */
|
|
regmap_update_bits(i2cg_map, GXP_I2CINTEN, 0x00000FFF, 0);
|
|
}
|
|
|
|
drvdata = devm_kzalloc(&pdev->dev, sizeof(*drvdata),
|
|
GFP_KERNEL);
|
|
if (!drvdata)
|
|
return -ENOMEM;
|
|
|
|
platform_set_drvdata(pdev, drvdata);
|
|
drvdata->dev = &pdev->dev;
|
|
init_completion(&drvdata->completion);
|
|
|
|
drvdata->base = devm_platform_ioremap_resource(pdev, 0);
|
|
if (IS_ERR(drvdata->base))
|
|
return PTR_ERR(drvdata->base);
|
|
|
|
/* Use physical memory address to determine which I2C engine this is. */
|
|
drvdata->engine = ((size_t)drvdata->base & 0xf00) >> 8;
|
|
|
|
if (drvdata->engine >= GXP_MAX_I2C_ENGINE) {
|
|
return dev_err_probe(&pdev->dev, -EINVAL, "i2c engine% is unsupported\n",
|
|
drvdata->engine);
|
|
}
|
|
|
|
rc = platform_get_irq(pdev, 0);
|
|
if (rc < 0)
|
|
return rc;
|
|
|
|
drvdata->irq = rc;
|
|
rc = devm_request_irq(&pdev->dev, drvdata->irq, gxp_i2c_irq_handler,
|
|
IRQF_SHARED, gxp_i2c_name[drvdata->engine], drvdata);
|
|
if (rc < 0)
|
|
return dev_err_probe(&pdev->dev, rc, "irq request failed\n");
|
|
|
|
i2c_parse_fw_timings(&pdev->dev, &drvdata->t, true);
|
|
|
|
gxp_i2c_init(drvdata);
|
|
|
|
/* Enable interrupt */
|
|
regmap_update_bits(i2cg_map, GXP_I2CINTEN, BIT(drvdata->engine),
|
|
BIT(drvdata->engine));
|
|
|
|
adapter = &drvdata->adapter;
|
|
i2c_set_adapdata(adapter, drvdata);
|
|
|
|
adapter->owner = THIS_MODULE;
|
|
strscpy(adapter->name, "HPE GXP I2C adapter", sizeof(adapter->name));
|
|
adapter->algo = &gxp_i2c_algo;
|
|
adapter->dev.parent = &pdev->dev;
|
|
adapter->dev.of_node = pdev->dev.of_node;
|
|
|
|
rc = i2c_add_adapter(adapter);
|
|
if (rc)
|
|
return dev_err_probe(&pdev->dev, rc, "i2c add adapter failed\n");
|
|
|
|
return 0;
|
|
}
|
|
|
|
static void gxp_i2c_remove(struct platform_device *pdev)
|
|
{
|
|
struct gxp_i2c_drvdata *drvdata = platform_get_drvdata(pdev);
|
|
|
|
/* Disable interrupt */
|
|
regmap_update_bits(i2cg_map, GXP_I2CINTEN, BIT(drvdata->engine), 0);
|
|
i2c_del_adapter(&drvdata->adapter);
|
|
}
|
|
|
|
static const struct of_device_id gxp_i2c_of_match[] = {
|
|
{ .compatible = "hpe,gxp-i2c" },
|
|
{},
|
|
};
|
|
MODULE_DEVICE_TABLE(of, gxp_i2c_of_match);
|
|
|
|
static struct platform_driver gxp_i2c_driver = {
|
|
.probe = gxp_i2c_probe,
|
|
.remove_new = gxp_i2c_remove,
|
|
.driver = {
|
|
.name = "gxp-i2c",
|
|
.of_match_table = gxp_i2c_of_match,
|
|
},
|
|
};
|
|
module_platform_driver(gxp_i2c_driver);
|
|
|
|
MODULE_AUTHOR("Nick Hawkins <nick.hawkins@hpe.com>");
|
|
MODULE_DESCRIPTION("HPE GXP I2C bus driver");
|
|
MODULE_LICENSE("GPL");
|