467 lines
13 KiB
C
467 lines
13 KiB
C
// SPDX-License-Identifier: GPL-2.0-only
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/*
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* IIO driver for the Apex Embedded Systems STX104
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* Copyright (C) 2016 William Breathitt Gray
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*/
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#include <linux/bitfield.h>
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#include <linux/bits.h>
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#include <linux/device.h>
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#include <linux/err.h>
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#include <linux/gpio/regmap.h>
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#include <linux/iio/iio.h>
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#include <linux/iio/types.h>
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#include <linux/isa.h>
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#include <linux/kernel.h>
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#include <linux/limits.h>
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#include <linux/module.h>
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#include <linux/moduleparam.h>
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#include <linux/mutex.h>
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#include <linux/regmap.h>
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#include <linux/types.h>
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#define STX104_OUT_CHAN(chan) { \
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.type = IIO_VOLTAGE, \
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.channel = chan, \
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.info_mask_separate = BIT(IIO_CHAN_INFO_RAW), \
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.indexed = 1, \
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.output = 1 \
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}
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#define STX104_IN_CHAN(chan, diff) { \
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.type = IIO_VOLTAGE, \
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.channel = chan, \
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.channel2 = chan, \
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.info_mask_shared_by_type = BIT(IIO_CHAN_INFO_HARDWAREGAIN) | \
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BIT(IIO_CHAN_INFO_OFFSET) | BIT(IIO_CHAN_INFO_SCALE), \
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.info_mask_separate = BIT(IIO_CHAN_INFO_RAW), \
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.indexed = 1, \
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.differential = diff \
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}
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#define STX104_NUM_OUT_CHAN 2
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#define STX104_EXTENT 16
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static unsigned int base[max_num_isa_dev(STX104_EXTENT)];
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static unsigned int num_stx104;
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module_param_hw_array(base, uint, ioport, &num_stx104, 0);
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MODULE_PARM_DESC(base, "Apex Embedded Systems STX104 base addresses");
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#define STX104_AIO_BASE 0x0
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#define STX104_SOFTWARE_STROBE STX104_AIO_BASE
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#define STX104_ADC_DATA STX104_AIO_BASE
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#define STX104_ADC_CHANNEL (STX104_AIO_BASE + 0x2)
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#define STX104_DIO_REG (STX104_AIO_BASE + 0x3)
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#define STX104_DAC_BASE (STX104_AIO_BASE + 0x4)
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#define STX104_ADC_STATUS (STX104_AIO_BASE + 0x8)
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#define STX104_ADC_CONTROL (STX104_AIO_BASE + 0x9)
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#define STX104_ADC_CONFIGURATION (STX104_AIO_BASE + 0x11)
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#define STX104_AIO_DATA_STRIDE 2
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#define STX104_DAC_OFFSET(_channel) (STX104_DAC_BASE + STX104_AIO_DATA_STRIDE * (_channel))
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/* ADC Channel */
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#define STX104_FC GENMASK(3, 0)
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#define STX104_LC GENMASK(7, 4)
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#define STX104_SINGLE_CHANNEL(_channel) \
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(u8_encode_bits(_channel, STX104_FC) | u8_encode_bits(_channel, STX104_LC))
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/* ADC Status */
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#define STX104_SD BIT(5)
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#define STX104_CNV BIT(7)
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#define STX104_DIFFERENTIAL 1
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/* ADC Control */
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#define STX104_ALSS GENMASK(1, 0)
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#define STX104_SOFTWARE_TRIGGER u8_encode_bits(0x0, STX104_ALSS)
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/* ADC Configuration */
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#define STX104_GAIN GENMASK(1, 0)
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#define STX104_ADBU BIT(2)
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#define STX104_BIPOLAR 0
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#define STX104_GAIN_X1 0
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#define STX104_GAIN_X2 1
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#define STX104_GAIN_X4 2
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#define STX104_GAIN_X8 3
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/**
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* struct stx104_iio - IIO device private data structure
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* @lock: synchronization lock to prevent I/O race conditions
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* @aio_data_map: Regmap for analog I/O data
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* @aio_ctl_map: Regmap for analog I/O control
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*/
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struct stx104_iio {
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struct mutex lock;
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struct regmap *aio_data_map;
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struct regmap *aio_ctl_map;
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};
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static const struct regmap_range aio_ctl_wr_ranges[] = {
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regmap_reg_range(0x0, 0x0), regmap_reg_range(0x2, 0x2), regmap_reg_range(0x9, 0x9),
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regmap_reg_range(0x11, 0x11),
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};
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static const struct regmap_range aio_ctl_rd_ranges[] = {
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regmap_reg_range(0x2, 0x2), regmap_reg_range(0x8, 0x9), regmap_reg_range(0x11, 0x11),
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};
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static const struct regmap_range aio_ctl_volatile_ranges[] = {
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regmap_reg_range(0x8, 0x8),
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};
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static const struct regmap_access_table aio_ctl_wr_table = {
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.yes_ranges = aio_ctl_wr_ranges,
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.n_yes_ranges = ARRAY_SIZE(aio_ctl_wr_ranges),
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};
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static const struct regmap_access_table aio_ctl_rd_table = {
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.yes_ranges = aio_ctl_rd_ranges,
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.n_yes_ranges = ARRAY_SIZE(aio_ctl_rd_ranges),
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};
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static const struct regmap_access_table aio_ctl_volatile_table = {
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.yes_ranges = aio_ctl_volatile_ranges,
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.n_yes_ranges = ARRAY_SIZE(aio_ctl_volatile_ranges),
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};
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static const struct regmap_config aio_ctl_regmap_config = {
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.name = "aio_ctl",
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.reg_bits = 8,
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.reg_stride = 1,
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.reg_base = STX104_AIO_BASE,
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.val_bits = 8,
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.io_port = true,
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.wr_table = &aio_ctl_wr_table,
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.rd_table = &aio_ctl_rd_table,
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.volatile_table = &aio_ctl_volatile_table,
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.cache_type = REGCACHE_FLAT,
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};
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static const struct regmap_range aio_data_wr_ranges[] = {
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regmap_reg_range(0x4, 0x6),
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};
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static const struct regmap_range aio_data_rd_ranges[] = {
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regmap_reg_range(0x0, 0x0),
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};
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static const struct regmap_access_table aio_data_wr_table = {
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.yes_ranges = aio_data_wr_ranges,
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.n_yes_ranges = ARRAY_SIZE(aio_data_wr_ranges),
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};
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static const struct regmap_access_table aio_data_rd_table = {
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.yes_ranges = aio_data_rd_ranges,
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.n_yes_ranges = ARRAY_SIZE(aio_data_rd_ranges),
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};
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static const struct regmap_config aio_data_regmap_config = {
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.name = "aio_data",
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.reg_bits = 16,
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.reg_stride = STX104_AIO_DATA_STRIDE,
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.reg_base = STX104_AIO_BASE,
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.val_bits = 16,
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.io_port = true,
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.wr_table = &aio_data_wr_table,
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.rd_table = &aio_data_rd_table,
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.volatile_table = &aio_data_rd_table,
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.cache_type = REGCACHE_FLAT,
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};
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static const struct regmap_config dio_regmap_config = {
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.name = "dio",
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.reg_bits = 8,
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.reg_stride = 1,
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.reg_base = STX104_DIO_REG,
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.val_bits = 8,
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.io_port = true,
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};
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static int stx104_read_raw(struct iio_dev *indio_dev,
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struct iio_chan_spec const *chan, int *val, int *val2, long mask)
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{
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struct stx104_iio *const priv = iio_priv(indio_dev);
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int err;
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unsigned int adc_config;
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unsigned int value;
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unsigned int adc_status;
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switch (mask) {
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case IIO_CHAN_INFO_HARDWAREGAIN:
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err = regmap_read(priv->aio_ctl_map, STX104_ADC_CONFIGURATION, &adc_config);
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if (err)
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return err;
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*val = BIT(u8_get_bits(adc_config, STX104_GAIN));
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return IIO_VAL_INT;
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case IIO_CHAN_INFO_RAW:
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if (chan->output) {
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err = regmap_read(priv->aio_data_map, STX104_DAC_OFFSET(chan->channel),
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&value);
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if (err)
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return err;
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*val = value;
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return IIO_VAL_INT;
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}
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mutex_lock(&priv->lock);
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/* select ADC channel */
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err = regmap_write(priv->aio_ctl_map, STX104_ADC_CHANNEL,
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STX104_SINGLE_CHANNEL(chan->channel));
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if (err) {
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mutex_unlock(&priv->lock);
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return err;
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}
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/*
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* Trigger ADC sample capture by writing to the 8-bit Software Strobe Register and
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* wait for completion; the conversion time range is 5 microseconds to 53.68 seconds
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* in steps of 25 nanoseconds. The actual Analog Input Frame Timer time interval is
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* calculated as:
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* ai_time_frame_ns = ( AIFT + 1 ) * ( 25 nanoseconds ).
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* Where 0 <= AIFT <= 2147483648.
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*/
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err = regmap_write(priv->aio_ctl_map, STX104_SOFTWARE_STROBE, 0);
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if (err) {
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mutex_unlock(&priv->lock);
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return err;
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}
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err = regmap_read_poll_timeout(priv->aio_ctl_map, STX104_ADC_STATUS, adc_status,
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!u8_get_bits(adc_status, STX104_CNV), 0, 53687092);
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if (err) {
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mutex_unlock(&priv->lock);
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return err;
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}
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err = regmap_read(priv->aio_data_map, STX104_ADC_DATA, &value);
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if (err) {
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mutex_unlock(&priv->lock);
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return err;
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}
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*val = value;
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mutex_unlock(&priv->lock);
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return IIO_VAL_INT;
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case IIO_CHAN_INFO_OFFSET:
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/* get ADC bipolar/unipolar configuration */
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err = regmap_read(priv->aio_ctl_map, STX104_ADC_CONFIGURATION, &adc_config);
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if (err)
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return err;
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*val = (u8_get_bits(adc_config, STX104_ADBU) == STX104_BIPOLAR) ? -32768 : 0;
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return IIO_VAL_INT;
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case IIO_CHAN_INFO_SCALE:
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/* get ADC bipolar/unipolar and gain configuration */
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err = regmap_read(priv->aio_ctl_map, STX104_ADC_CONFIGURATION, &adc_config);
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if (err)
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return err;
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*val = 5;
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*val2 = (u8_get_bits(adc_config, STX104_ADBU) == STX104_BIPOLAR) ? 14 : 15;
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*val2 += u8_get_bits(adc_config, STX104_GAIN);
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return IIO_VAL_FRACTIONAL_LOG2;
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}
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return -EINVAL;
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}
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static int stx104_write_raw(struct iio_dev *indio_dev,
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struct iio_chan_spec const *chan, int val, int val2, long mask)
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{
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struct stx104_iio *const priv = iio_priv(indio_dev);
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u8 gain;
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switch (mask) {
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case IIO_CHAN_INFO_HARDWAREGAIN:
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/* Only four gain states (x1, x2, x4, x8) */
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switch (val) {
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case 1:
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gain = STX104_GAIN_X1;
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break;
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case 2:
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gain = STX104_GAIN_X2;
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break;
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case 4:
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gain = STX104_GAIN_X4;
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break;
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case 8:
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gain = STX104_GAIN_X8;
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break;
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default:
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return -EINVAL;
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}
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return regmap_write(priv->aio_ctl_map, STX104_ADC_CONFIGURATION, gain);
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case IIO_CHAN_INFO_RAW:
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if (!chan->output)
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return -EINVAL;
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if (val < 0 || val > U16_MAX)
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return -EINVAL;
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return regmap_write(priv->aio_data_map, STX104_DAC_OFFSET(chan->channel), val);
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}
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return -EINVAL;
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}
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static const struct iio_info stx104_info = {
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.read_raw = stx104_read_raw,
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.write_raw = stx104_write_raw
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};
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/* single-ended input channels configuration */
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static const struct iio_chan_spec stx104_channels_sing[] = {
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STX104_OUT_CHAN(0), STX104_OUT_CHAN(1),
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STX104_IN_CHAN(0, 0), STX104_IN_CHAN(1, 0), STX104_IN_CHAN(2, 0),
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STX104_IN_CHAN(3, 0), STX104_IN_CHAN(4, 0), STX104_IN_CHAN(5, 0),
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STX104_IN_CHAN(6, 0), STX104_IN_CHAN(7, 0), STX104_IN_CHAN(8, 0),
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STX104_IN_CHAN(9, 0), STX104_IN_CHAN(10, 0), STX104_IN_CHAN(11, 0),
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STX104_IN_CHAN(12, 0), STX104_IN_CHAN(13, 0), STX104_IN_CHAN(14, 0),
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STX104_IN_CHAN(15, 0)
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};
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/* differential input channels configuration */
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static const struct iio_chan_spec stx104_channels_diff[] = {
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STX104_OUT_CHAN(0), STX104_OUT_CHAN(1),
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STX104_IN_CHAN(0, 1), STX104_IN_CHAN(1, 1), STX104_IN_CHAN(2, 1),
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STX104_IN_CHAN(3, 1), STX104_IN_CHAN(4, 1), STX104_IN_CHAN(5, 1),
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STX104_IN_CHAN(6, 1), STX104_IN_CHAN(7, 1)
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};
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static int stx104_reg_mask_xlate(struct gpio_regmap *const gpio, const unsigned int base,
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unsigned int offset, unsigned int *const reg,
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unsigned int *const mask)
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{
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/* Output lines are located at same register bit offsets as input lines */
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if (offset >= 4)
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offset -= 4;
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*reg = base;
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*mask = BIT(offset);
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return 0;
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}
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#define STX104_NGPIO 8
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static const char *stx104_names[STX104_NGPIO] = {
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"DIN0", "DIN1", "DIN2", "DIN3", "DOUT0", "DOUT1", "DOUT2", "DOUT3"
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};
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static int stx104_init_hw(struct stx104_iio *const priv)
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{
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int err;
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/* configure device for software trigger operation */
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err = regmap_write(priv->aio_ctl_map, STX104_ADC_CONTROL, STX104_SOFTWARE_TRIGGER);
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if (err)
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return err;
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/* initialize gain setting to x1 */
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err = regmap_write(priv->aio_ctl_map, STX104_ADC_CONFIGURATION, STX104_GAIN_X1);
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if (err)
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return err;
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/* initialize DAC outputs to 0V */
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err = regmap_write(priv->aio_data_map, STX104_DAC_BASE, 0);
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if (err)
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return err;
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err = regmap_write(priv->aio_data_map, STX104_DAC_BASE + STX104_AIO_DATA_STRIDE, 0);
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if (err)
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return err;
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return 0;
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}
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static int stx104_probe(struct device *dev, unsigned int id)
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{
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struct iio_dev *indio_dev;
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struct stx104_iio *priv;
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struct gpio_regmap_config gpio_config;
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void __iomem *stx104_base;
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struct regmap *aio_ctl_map;
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struct regmap *aio_data_map;
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struct regmap *dio_map;
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int err;
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unsigned int adc_status;
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indio_dev = devm_iio_device_alloc(dev, sizeof(*priv));
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if (!indio_dev)
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return -ENOMEM;
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if (!devm_request_region(dev, base[id], STX104_EXTENT,
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dev_name(dev))) {
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dev_err(dev, "Unable to lock port addresses (0x%X-0x%X)\n",
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base[id], base[id] + STX104_EXTENT);
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return -EBUSY;
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}
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stx104_base = devm_ioport_map(dev, base[id], STX104_EXTENT);
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if (!stx104_base)
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return -ENOMEM;
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aio_ctl_map = devm_regmap_init_mmio(dev, stx104_base, &aio_ctl_regmap_config);
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if (IS_ERR(aio_ctl_map))
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return dev_err_probe(dev, PTR_ERR(aio_ctl_map),
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"Unable to initialize aio_ctl register map\n");
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aio_data_map = devm_regmap_init_mmio(dev, stx104_base, &aio_data_regmap_config);
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if (IS_ERR(aio_data_map))
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return dev_err_probe(dev, PTR_ERR(aio_data_map),
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"Unable to initialize aio_data register map\n");
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dio_map = devm_regmap_init_mmio(dev, stx104_base, &dio_regmap_config);
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if (IS_ERR(dio_map))
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return dev_err_probe(dev, PTR_ERR(dio_map),
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"Unable to initialize dio register map\n");
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priv = iio_priv(indio_dev);
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priv->aio_ctl_map = aio_ctl_map;
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priv->aio_data_map = aio_data_map;
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indio_dev->info = &stx104_info;
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indio_dev->modes = INDIO_DIRECT_MODE;
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err = regmap_read(aio_ctl_map, STX104_ADC_STATUS, &adc_status);
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if (err)
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return err;
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if (u8_get_bits(adc_status, STX104_SD) == STX104_DIFFERENTIAL) {
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indio_dev->num_channels = ARRAY_SIZE(stx104_channels_diff);
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indio_dev->channels = stx104_channels_diff;
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} else {
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indio_dev->num_channels = ARRAY_SIZE(stx104_channels_sing);
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indio_dev->channels = stx104_channels_sing;
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}
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indio_dev->name = dev_name(dev);
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mutex_init(&priv->lock);
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err = stx104_init_hw(priv);
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if (err)
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return err;
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err = devm_iio_device_register(dev, indio_dev);
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if (err)
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return err;
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gpio_config = (struct gpio_regmap_config) {
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.parent = dev,
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.regmap = dio_map,
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.ngpio = STX104_NGPIO,
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.names = stx104_names,
|
|
.reg_dat_base = GPIO_REGMAP_ADDR(STX104_DIO_REG),
|
|
.reg_set_base = GPIO_REGMAP_ADDR(STX104_DIO_REG),
|
|
.ngpio_per_reg = STX104_NGPIO,
|
|
.reg_mask_xlate = stx104_reg_mask_xlate,
|
|
.drvdata = dio_map,
|
|
};
|
|
|
|
return PTR_ERR_OR_ZERO(devm_gpio_regmap_register(dev, &gpio_config));
|
|
}
|
|
|
|
static struct isa_driver stx104_driver = {
|
|
.probe = stx104_probe,
|
|
.driver = {
|
|
.name = "stx104"
|
|
},
|
|
};
|
|
|
|
module_isa_driver(stx104_driver, num_stx104);
|
|
|
|
MODULE_AUTHOR("William Breathitt Gray <vilhelm.gray@gmail.com>");
|
|
MODULE_DESCRIPTION("Apex Embedded Systems STX104 IIO driver");
|
|
MODULE_LICENSE("GPL v2");
|