628 lines
15 KiB
C
628 lines
15 KiB
C
// SPDX-License-Identifier: GPL-2.0-only
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/*
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Driver for the Spase sp887x demodulator
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*/
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/*
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* This driver needs external firmware. Please use the command
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* "<kerneldir>/scripts/get_dvb_firmware sp887x" to
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* download/extract it, and then copy it to /usr/lib/hotplug/firmware
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* or /lib/firmware (depending on configuration of firmware hotplug).
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*/
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#define SP887X_DEFAULT_FIRMWARE "dvb-fe-sp887x.fw"
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#include <linux/init.h>
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#include <linux/module.h>
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#include <linux/device.h>
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#include <linux/firmware.h>
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#include <linux/string.h>
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#include <linux/slab.h>
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#include <media/dvb_frontend.h>
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#include "sp887x.h"
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struct sp887x_state {
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struct i2c_adapter* i2c;
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const struct sp887x_config* config;
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struct dvb_frontend frontend;
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/* demodulator private data */
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u8 initialised:1;
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};
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static int debug;
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#define dprintk(args...) \
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do { \
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if (debug) printk(KERN_DEBUG "sp887x: " args); \
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} while (0)
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static int i2c_writebytes (struct sp887x_state* state, u8 *buf, u8 len)
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{
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struct i2c_msg msg = { .addr = state->config->demod_address, .flags = 0, .buf = buf, .len = len };
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int err;
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if ((err = i2c_transfer (state->i2c, &msg, 1)) != 1) {
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printk ("%s: i2c write error (addr %02x, err == %i)\n",
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__func__, state->config->demod_address, err);
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return -EREMOTEIO;
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}
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return 0;
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}
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static int sp887x_writereg (struct sp887x_state* state, u16 reg, u16 data)
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{
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u8 b0 [] = { reg >> 8 , reg & 0xff, data >> 8, data & 0xff };
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struct i2c_msg msg = { .addr = state->config->demod_address, .flags = 0, .buf = b0, .len = 4 };
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int ret;
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if ((ret = i2c_transfer(state->i2c, &msg, 1)) != 1) {
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/*
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* in case of soft reset we ignore ACK errors...
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*/
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if (!(reg == 0xf1a && data == 0x000 &&
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(ret == -EREMOTEIO || ret == -EFAULT)))
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{
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printk("%s: writereg error (reg %03x, data %03x, ret == %i)\n",
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__func__, reg & 0xffff, data & 0xffff, ret);
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return ret;
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}
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}
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return 0;
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}
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static int sp887x_readreg (struct sp887x_state* state, u16 reg)
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{
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u8 b0 [] = { reg >> 8 , reg & 0xff };
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u8 b1 [2];
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int ret;
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struct i2c_msg msg[] = {{ .addr = state->config->demod_address, .flags = 0, .buf = b0, .len = 2 },
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{ .addr = state->config->demod_address, .flags = I2C_M_RD, .buf = b1, .len = 2 }};
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if ((ret = i2c_transfer(state->i2c, msg, 2)) != 2) {
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printk("%s: readreg error (ret == %i)\n", __func__, ret);
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return -1;
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}
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return (((b1[0] << 8) | b1[1]) & 0xfff);
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}
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static void sp887x_microcontroller_stop (struct sp887x_state* state)
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{
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dprintk("%s\n", __func__);
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sp887x_writereg(state, 0xf08, 0x000);
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sp887x_writereg(state, 0xf09, 0x000);
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/* microcontroller STOP */
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sp887x_writereg(state, 0xf00, 0x000);
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}
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static void sp887x_microcontroller_start (struct sp887x_state* state)
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{
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dprintk("%s\n", __func__);
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sp887x_writereg(state, 0xf08, 0x000);
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sp887x_writereg(state, 0xf09, 0x000);
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/* microcontroller START */
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sp887x_writereg(state, 0xf00, 0x001);
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}
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static void sp887x_setup_agc (struct sp887x_state* state)
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{
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/* setup AGC parameters */
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dprintk("%s\n", __func__);
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sp887x_writereg(state, 0x33c, 0x054);
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sp887x_writereg(state, 0x33b, 0x04c);
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sp887x_writereg(state, 0x328, 0x000);
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sp887x_writereg(state, 0x327, 0x005);
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sp887x_writereg(state, 0x326, 0x001);
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sp887x_writereg(state, 0x325, 0x001);
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sp887x_writereg(state, 0x324, 0x001);
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sp887x_writereg(state, 0x318, 0x050);
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sp887x_writereg(state, 0x317, 0x3fe);
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sp887x_writereg(state, 0x316, 0x001);
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sp887x_writereg(state, 0x313, 0x005);
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sp887x_writereg(state, 0x312, 0x002);
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sp887x_writereg(state, 0x306, 0x000);
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sp887x_writereg(state, 0x303, 0x000);
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}
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#define BLOCKSIZE 30
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#define FW_SIZE 0x4000
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/*
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* load firmware and setup MPEG interface...
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*/
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static int sp887x_initial_setup (struct dvb_frontend* fe, const struct firmware *fw)
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{
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struct sp887x_state* state = fe->demodulator_priv;
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u8 buf [BLOCKSIZE + 2];
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int i;
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int fw_size = fw->size;
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const unsigned char *mem = fw->data + 10;
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dprintk("%s\n", __func__);
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/* ignore the first 10 bytes, then we expect 0x4000 bytes of firmware */
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if (fw_size < FW_SIZE + 10)
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return -ENODEV;
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/* soft reset */
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sp887x_writereg(state, 0xf1a, 0x000);
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sp887x_microcontroller_stop (state);
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printk ("%s: firmware upload... ", __func__);
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/* setup write pointer to -1 (end of memory) */
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/* bit 0x8000 in address is set to enable 13bit mode */
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sp887x_writereg(state, 0x8f08, 0x1fff);
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/* dummy write (wrap around to start of memory) */
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sp887x_writereg(state, 0x8f0a, 0x0000);
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for (i = 0; i < FW_SIZE; i += BLOCKSIZE) {
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int c = BLOCKSIZE;
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int err;
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if (c > FW_SIZE - i)
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c = FW_SIZE - i;
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/* bit 0x8000 in address is set to enable 13bit mode */
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/* bit 0x4000 enables multibyte read/write transfers */
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/* write register is 0xf0a */
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buf[0] = 0xcf;
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buf[1] = 0x0a;
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memcpy(&buf[2], mem + i, c);
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if ((err = i2c_writebytes (state, buf, c+2)) < 0) {
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printk ("failed.\n");
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printk ("%s: i2c error (err == %i)\n", __func__, err);
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return err;
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}
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}
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/* don't write RS bytes between packets */
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sp887x_writereg(state, 0xc13, 0x001);
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/* suppress clock if (!data_valid) */
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sp887x_writereg(state, 0xc14, 0x000);
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/* setup MPEG interface... */
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sp887x_writereg(state, 0xc1a, 0x872);
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sp887x_writereg(state, 0xc1b, 0x001);
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sp887x_writereg(state, 0xc1c, 0x000); /* parallel mode (serial mode == 1) */
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sp887x_writereg(state, 0xc1a, 0x871);
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/* ADC mode, 2 for MT8872, 3 for SP8870/SP8871 */
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sp887x_writereg(state, 0x301, 0x002);
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sp887x_setup_agc(state);
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/* bit 0x010: enable data valid signal */
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sp887x_writereg(state, 0xd00, 0x010);
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sp887x_writereg(state, 0x0d1, 0x000);
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return 0;
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};
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static int configure_reg0xc05(struct dtv_frontend_properties *p, u16 *reg0xc05)
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{
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int known_parameters = 1;
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*reg0xc05 = 0x000;
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switch (p->modulation) {
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case QPSK:
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break;
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case QAM_16:
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*reg0xc05 |= (1 << 10);
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break;
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case QAM_64:
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*reg0xc05 |= (2 << 10);
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break;
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case QAM_AUTO:
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known_parameters = 0;
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break;
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default:
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return -EINVAL;
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}
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switch (p->hierarchy) {
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case HIERARCHY_NONE:
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break;
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case HIERARCHY_1:
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*reg0xc05 |= (1 << 7);
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break;
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case HIERARCHY_2:
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*reg0xc05 |= (2 << 7);
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break;
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case HIERARCHY_4:
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*reg0xc05 |= (3 << 7);
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break;
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case HIERARCHY_AUTO:
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known_parameters = 0;
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break;
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default:
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return -EINVAL;
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}
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switch (p->code_rate_HP) {
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case FEC_1_2:
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break;
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case FEC_2_3:
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*reg0xc05 |= (1 << 3);
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break;
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case FEC_3_4:
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*reg0xc05 |= (2 << 3);
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break;
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case FEC_5_6:
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*reg0xc05 |= (3 << 3);
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break;
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case FEC_7_8:
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*reg0xc05 |= (4 << 3);
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break;
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case FEC_AUTO:
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known_parameters = 0;
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break;
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default:
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return -EINVAL;
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}
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if (known_parameters)
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*reg0xc05 |= (2 << 1); /* use specified parameters */
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else
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*reg0xc05 |= (1 << 1); /* enable autoprobing */
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return 0;
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}
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/*
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* estimates division of two 24bit numbers,
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* derived from the ves1820/stv0299 driver code
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*/
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static void divide (int n, int d, int *quotient_i, int *quotient_f)
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{
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unsigned int q, r;
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r = (n % d) << 8;
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q = (r / d);
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if (quotient_i)
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*quotient_i = q;
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if (quotient_f) {
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r = (r % d) << 8;
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q = (q << 8) | (r / d);
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r = (r % d) << 8;
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*quotient_f = (q << 8) | (r / d);
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}
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}
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static void sp887x_correct_offsets (struct sp887x_state* state,
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struct dtv_frontend_properties *p,
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int actual_freq)
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{
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static const u32 srate_correction [] = { 1879617, 4544878, 8098561 };
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int bw_index;
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int freq_offset = actual_freq - p->frequency;
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int sysclock = 61003; //[kHz]
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int ifreq = 36000000;
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int freq;
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int frequency_shift;
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switch (p->bandwidth_hz) {
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default:
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case 8000000:
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bw_index = 0;
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break;
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case 7000000:
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bw_index = 1;
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break;
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case 6000000:
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bw_index = 2;
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break;
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}
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if (p->inversion == INVERSION_ON)
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freq = ifreq - freq_offset;
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else
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freq = ifreq + freq_offset;
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divide(freq / 333, sysclock, NULL, &frequency_shift);
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if (p->inversion == INVERSION_ON)
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frequency_shift = -frequency_shift;
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/* sample rate correction */
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sp887x_writereg(state, 0x319, srate_correction[bw_index] >> 12);
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sp887x_writereg(state, 0x31a, srate_correction[bw_index] & 0xfff);
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/* carrier offset correction */
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sp887x_writereg(state, 0x309, frequency_shift >> 12);
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sp887x_writereg(state, 0x30a, frequency_shift & 0xfff);
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}
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static int sp887x_setup_frontend_parameters(struct dvb_frontend *fe)
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{
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struct dtv_frontend_properties *p = &fe->dtv_property_cache;
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struct sp887x_state* state = fe->demodulator_priv;
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unsigned actual_freq;
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int err;
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u16 val, reg0xc05;
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if (p->bandwidth_hz != 8000000 &&
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p->bandwidth_hz != 7000000 &&
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p->bandwidth_hz != 6000000)
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return -EINVAL;
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if ((err = configure_reg0xc05(p, ®0xc05)))
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return err;
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sp887x_microcontroller_stop(state);
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/* setup the PLL */
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if (fe->ops.tuner_ops.set_params) {
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fe->ops.tuner_ops.set_params(fe);
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if (fe->ops.i2c_gate_ctrl) fe->ops.i2c_gate_ctrl(fe, 0);
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}
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if (fe->ops.tuner_ops.get_frequency) {
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fe->ops.tuner_ops.get_frequency(fe, &actual_freq);
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if (fe->ops.i2c_gate_ctrl) fe->ops.i2c_gate_ctrl(fe, 0);
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} else {
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actual_freq = p->frequency;
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}
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/* read status reg in order to clear <pending irqs */
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sp887x_readreg(state, 0x200);
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sp887x_correct_offsets(state, p, actual_freq);
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/* filter for 6/7/8 Mhz channel */
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if (p->bandwidth_hz == 6000000)
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val = 2;
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else if (p->bandwidth_hz == 7000000)
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val = 1;
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else
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val = 0;
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sp887x_writereg(state, 0x311, val);
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/* scan order: 2k first = 0, 8k first = 1 */
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if (p->transmission_mode == TRANSMISSION_MODE_2K)
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sp887x_writereg(state, 0x338, 0x000);
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else
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sp887x_writereg(state, 0x338, 0x001);
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sp887x_writereg(state, 0xc05, reg0xc05);
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if (p->bandwidth_hz == 6000000)
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val = 2 << 3;
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else if (p->bandwidth_hz == 7000000)
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val = 3 << 3;
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else
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val = 0 << 3;
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/* enable OFDM and SAW bits as lock indicators in sync register 0xf17,
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* optimize algorithm for given bandwidth...
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*/
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sp887x_writereg(state, 0xf14, 0x160 | val);
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sp887x_writereg(state, 0xf15, 0x000);
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sp887x_microcontroller_start(state);
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return 0;
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}
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static int sp887x_read_status(struct dvb_frontend *fe, enum fe_status *status)
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{
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struct sp887x_state* state = fe->demodulator_priv;
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u16 snr12 = sp887x_readreg(state, 0xf16);
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u16 sync0x200 = sp887x_readreg(state, 0x200);
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u16 sync0xf17 = sp887x_readreg(state, 0xf17);
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*status = 0;
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if (snr12 > 0x00f)
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*status |= FE_HAS_SIGNAL;
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//if (sync0x200 & 0x004)
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// *status |= FE_HAS_SYNC | FE_HAS_CARRIER;
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//if (sync0x200 & 0x008)
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// *status |= FE_HAS_VITERBI;
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if ((sync0xf17 & 0x00f) == 0x002) {
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*status |= FE_HAS_LOCK;
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*status |= FE_HAS_VITERBI | FE_HAS_SYNC | FE_HAS_CARRIER;
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}
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if (sync0x200 & 0x001) { /* tuner adjustment requested...*/
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int steps = (sync0x200 >> 4) & 0x00f;
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if (steps & 0x008)
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steps = -steps;
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dprintk("sp887x: implement tuner adjustment (%+i steps)!!\n",
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steps);
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}
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return 0;
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}
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static int sp887x_read_ber(struct dvb_frontend* fe, u32* ber)
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{
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struct sp887x_state* state = fe->demodulator_priv;
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*ber = (sp887x_readreg(state, 0xc08) & 0x3f) |
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(sp887x_readreg(state, 0xc07) << 6);
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sp887x_writereg(state, 0xc08, 0x000);
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sp887x_writereg(state, 0xc07, 0x000);
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if (*ber >= 0x3fff0)
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*ber = ~0;
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return 0;
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}
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static int sp887x_read_signal_strength(struct dvb_frontend* fe, u16* strength)
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{
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struct sp887x_state* state = fe->demodulator_priv;
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u16 snr12 = sp887x_readreg(state, 0xf16);
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u32 signal = 3 * (snr12 << 4);
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*strength = (signal < 0xffff) ? signal : 0xffff;
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return 0;
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}
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static int sp887x_read_snr(struct dvb_frontend* fe, u16* snr)
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{
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struct sp887x_state* state = fe->demodulator_priv;
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u16 snr12 = sp887x_readreg(state, 0xf16);
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*snr = (snr12 << 4) | (snr12 >> 8);
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return 0;
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}
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static int sp887x_read_ucblocks(struct dvb_frontend* fe, u32* ucblocks)
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{
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struct sp887x_state* state = fe->demodulator_priv;
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*ucblocks = sp887x_readreg(state, 0xc0c);
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if (*ucblocks == 0xfff)
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*ucblocks = ~0;
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return 0;
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}
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static int sp887x_i2c_gate_ctrl(struct dvb_frontend* fe, int enable)
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{
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struct sp887x_state* state = fe->demodulator_priv;
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if (enable) {
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return sp887x_writereg(state, 0x206, 0x001);
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} else {
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return sp887x_writereg(state, 0x206, 0x000);
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}
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}
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static int sp887x_sleep(struct dvb_frontend* fe)
|
|
{
|
|
struct sp887x_state* state = fe->demodulator_priv;
|
|
|
|
/* tristate TS output and disable interface pins */
|
|
sp887x_writereg(state, 0xc18, 0x000);
|
|
|
|
return 0;
|
|
}
|
|
|
|
static int sp887x_init(struct dvb_frontend* fe)
|
|
{
|
|
struct sp887x_state* state = fe->demodulator_priv;
|
|
const struct firmware *fw = NULL;
|
|
int ret;
|
|
|
|
if (!state->initialised) {
|
|
/* request the firmware, this will block until someone uploads it */
|
|
printk("sp887x: waiting for firmware upload (%s)...\n", SP887X_DEFAULT_FIRMWARE);
|
|
ret = state->config->request_firmware(fe, &fw, SP887X_DEFAULT_FIRMWARE);
|
|
if (ret) {
|
|
printk("sp887x: no firmware upload (timeout or file not found?)\n");
|
|
return ret;
|
|
}
|
|
|
|
ret = sp887x_initial_setup(fe, fw);
|
|
release_firmware(fw);
|
|
if (ret) {
|
|
printk("sp887x: writing firmware to device failed\n");
|
|
return ret;
|
|
}
|
|
printk("sp887x: firmware upload complete\n");
|
|
state->initialised = 1;
|
|
}
|
|
|
|
/* enable TS output and interface pins */
|
|
sp887x_writereg(state, 0xc18, 0x00d);
|
|
|
|
return 0;
|
|
}
|
|
|
|
static int sp887x_get_tune_settings(struct dvb_frontend* fe, struct dvb_frontend_tune_settings* fesettings)
|
|
{
|
|
fesettings->min_delay_ms = 350;
|
|
fesettings->step_size = 166666*2;
|
|
fesettings->max_drift = (166666*2)+1;
|
|
return 0;
|
|
}
|
|
|
|
static void sp887x_release(struct dvb_frontend* fe)
|
|
{
|
|
struct sp887x_state* state = fe->demodulator_priv;
|
|
kfree(state);
|
|
}
|
|
|
|
static const struct dvb_frontend_ops sp887x_ops;
|
|
|
|
struct dvb_frontend* sp887x_attach(const struct sp887x_config* config,
|
|
struct i2c_adapter* i2c)
|
|
{
|
|
struct sp887x_state* state = NULL;
|
|
|
|
/* allocate memory for the internal state */
|
|
state = kzalloc(sizeof(struct sp887x_state), GFP_KERNEL);
|
|
if (state == NULL) goto error;
|
|
|
|
/* setup the state */
|
|
state->config = config;
|
|
state->i2c = i2c;
|
|
state->initialised = 0;
|
|
|
|
/* check if the demod is there */
|
|
if (sp887x_readreg(state, 0x0200) < 0) goto error;
|
|
|
|
/* create dvb_frontend */
|
|
memcpy(&state->frontend.ops, &sp887x_ops, sizeof(struct dvb_frontend_ops));
|
|
state->frontend.demodulator_priv = state;
|
|
return &state->frontend;
|
|
|
|
error:
|
|
kfree(state);
|
|
return NULL;
|
|
}
|
|
|
|
static const struct dvb_frontend_ops sp887x_ops = {
|
|
.delsys = { SYS_DVBT },
|
|
.info = {
|
|
.name = "Spase SP887x DVB-T",
|
|
.frequency_min_hz = 50500 * kHz,
|
|
.frequency_max_hz = 858000 * kHz,
|
|
.frequency_stepsize_hz = 166666,
|
|
.caps = FE_CAN_FEC_1_2 | FE_CAN_FEC_2_3 | FE_CAN_FEC_3_4 |
|
|
FE_CAN_FEC_5_6 | FE_CAN_FEC_7_8 | FE_CAN_FEC_AUTO |
|
|
FE_CAN_QPSK | FE_CAN_QAM_16 | FE_CAN_QAM_64 |
|
|
FE_CAN_RECOVER
|
|
},
|
|
|
|
.release = sp887x_release,
|
|
|
|
.init = sp887x_init,
|
|
.sleep = sp887x_sleep,
|
|
.i2c_gate_ctrl = sp887x_i2c_gate_ctrl,
|
|
|
|
.set_frontend = sp887x_setup_frontend_parameters,
|
|
.get_tune_settings = sp887x_get_tune_settings,
|
|
|
|
.read_status = sp887x_read_status,
|
|
.read_ber = sp887x_read_ber,
|
|
.read_signal_strength = sp887x_read_signal_strength,
|
|
.read_snr = sp887x_read_snr,
|
|
.read_ucblocks = sp887x_read_ucblocks,
|
|
};
|
|
|
|
module_param(debug, int, 0644);
|
|
MODULE_PARM_DESC(debug, "Turn on/off frontend debugging (default:off).");
|
|
|
|
MODULE_DESCRIPTION("Spase sp887x DVB-T demodulator driver");
|
|
MODULE_LICENSE("GPL");
|
|
|
|
EXPORT_SYMBOL_GPL(sp887x_attach);
|