549 lines
15 KiB
C
549 lines
15 KiB
C
/* SPDX-License-Identifier: GPL-2.0 */
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/*
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* Copyright (c) 2016 MediaTek Inc.
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* Author: PC Chen <pc.chen@mediatek.com>
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* Tiffany Lin <tiffany.lin@mediatek.com>
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*/
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#ifndef _MTK_VCODEC_DRV_H_
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#define _MTK_VCODEC_DRV_H_
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#include <linux/platform_device.h>
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#include <linux/videodev2.h>
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#include <media/v4l2-ctrls.h>
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#include <media/v4l2-device.h>
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#include <media/v4l2-ioctl.h>
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#include <media/v4l2-mem2mem.h>
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#include <media/videobuf2-core.h>
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#include "mtk_vcodec_dbgfs.h"
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#include "mtk_vcodec_util.h"
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#include "vdec_msg_queue.h"
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#define MTK_VCODEC_DEC_NAME "mtk-vcodec-dec"
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#define MTK_VCODEC_ENC_NAME "mtk-vcodec-enc"
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#define MTK_VCODEC_MAX_PLANES 3
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#define MTK_V4L2_BENCHMARK 0
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#define WAIT_INTR_TIMEOUT_MS 1000
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#define IS_VDEC_LAT_ARCH(hw_arch) ((hw_arch) >= MTK_VDEC_LAT_SINGLE_CORE)
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#define IS_VDEC_INNER_RACING(capability) ((capability) & MTK_VCODEC_INNER_RACING)
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/*
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* enum mtk_hw_reg_idx - MTK hw register base index
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*/
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enum mtk_hw_reg_idx {
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VDEC_SYS,
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VDEC_MISC,
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VDEC_LD,
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VDEC_TOP,
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VDEC_CM,
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VDEC_AD,
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VDEC_AV,
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VDEC_PP,
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VDEC_HWD,
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VDEC_HWQ,
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VDEC_HWB,
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VDEC_HWG,
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NUM_MAX_VDEC_REG_BASE,
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/* h264 encoder */
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VENC_SYS = NUM_MAX_VDEC_REG_BASE,
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/* vp8 encoder */
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VENC_LT_SYS,
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NUM_MAX_VCODEC_REG_BASE
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};
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/*
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* enum mtk_instance_type - The type of an MTK Vcodec instance.
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*/
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enum mtk_instance_type {
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MTK_INST_DECODER = 0,
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MTK_INST_ENCODER = 1,
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};
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/**
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* enum mtk_instance_state - The state of an MTK Vcodec instance.
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* @MTK_STATE_FREE: default state when instance is created
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* @MTK_STATE_INIT: vcodec instance is initialized
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* @MTK_STATE_HEADER: vdec had sps/pps header parsed or venc
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* had sps/pps header encoded
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* @MTK_STATE_FLUSH: vdec is flushing. Only used by decoder
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* @MTK_STATE_ABORT: vcodec should be aborted
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*/
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enum mtk_instance_state {
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MTK_STATE_FREE = 0,
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MTK_STATE_INIT = 1,
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MTK_STATE_HEADER = 2,
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MTK_STATE_FLUSH = 3,
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MTK_STATE_ABORT = 4,
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};
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/*
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* enum mtk_encode_param - General encoding parameters type
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*/
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enum mtk_encode_param {
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MTK_ENCODE_PARAM_NONE = 0,
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MTK_ENCODE_PARAM_BITRATE = (1 << 0),
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MTK_ENCODE_PARAM_FRAMERATE = (1 << 1),
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MTK_ENCODE_PARAM_INTRA_PERIOD = (1 << 2),
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MTK_ENCODE_PARAM_FORCE_INTRA = (1 << 3),
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MTK_ENCODE_PARAM_GOP_SIZE = (1 << 4),
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};
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enum mtk_fmt_type {
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MTK_FMT_DEC = 0,
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MTK_FMT_ENC = 1,
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MTK_FMT_FRAME = 2,
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};
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/*
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* enum mtk_vdec_hw_id - Hardware index used to separate
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* different hardware
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*/
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enum mtk_vdec_hw_id {
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MTK_VDEC_CORE,
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MTK_VDEC_LAT0,
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MTK_VDEC_LAT1,
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MTK_VDEC_LAT_SOC,
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MTK_VDEC_HW_MAX,
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};
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/*
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* enum mtk_vdec_hw_count - Supported hardware count
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*/
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enum mtk_vdec_hw_count {
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MTK_VDEC_NO_HW = 0,
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MTK_VDEC_ONE_CORE,
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MTK_VDEC_ONE_LAT_ONE_CORE,
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MTK_VDEC_MAX_HW_COUNT,
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};
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/*
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* struct mtk_video_fmt - Structure used to store information about pixelformats
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*/
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struct mtk_video_fmt {
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u32 fourcc;
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enum mtk_fmt_type type;
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u32 num_planes;
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u32 flags;
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struct v4l2_frmsize_stepwise frmsize;
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};
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/*
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* enum mtk_q_type - Type of queue
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*/
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enum mtk_q_type {
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MTK_Q_DATA_SRC = 0,
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MTK_Q_DATA_DST = 1,
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};
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/*
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* struct mtk_q_data - Structure used to store information about queue
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*/
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struct mtk_q_data {
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unsigned int visible_width;
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unsigned int visible_height;
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unsigned int coded_width;
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unsigned int coded_height;
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enum v4l2_field field;
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unsigned int bytesperline[MTK_VCODEC_MAX_PLANES];
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unsigned int sizeimage[MTK_VCODEC_MAX_PLANES];
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const struct mtk_video_fmt *fmt;
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};
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/**
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* struct mtk_enc_params - General encoding parameters
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* @bitrate: target bitrate in bits per second
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* @num_b_frame: number of b frames between p-frame
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* @rc_frame: frame based rate control
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* @rc_mb: macroblock based rate control
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* @seq_hdr_mode: H.264 sequence header is encoded separately or joined
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* with the first frame
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* @intra_period: I frame period
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* @gop_size: group of picture size, it's used as the intra frame period
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* @framerate_num: frame rate numerator. ex: framerate_num=30 and
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* framerate_denom=1 means FPS is 30
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* @framerate_denom: frame rate denominator. ex: framerate_num=30 and
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* framerate_denom=1 means FPS is 30
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* @h264_max_qp: Max value for H.264 quantization parameter
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* @h264_profile: V4L2 defined H.264 profile
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* @h264_level: V4L2 defined H.264 level
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* @force_intra: force/insert intra frame
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*/
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struct mtk_enc_params {
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unsigned int bitrate;
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unsigned int num_b_frame;
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unsigned int rc_frame;
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unsigned int rc_mb;
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unsigned int seq_hdr_mode;
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unsigned int intra_period;
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unsigned int gop_size;
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unsigned int framerate_num;
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unsigned int framerate_denom;
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unsigned int h264_max_qp;
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unsigned int h264_profile;
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unsigned int h264_level;
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unsigned int force_intra;
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};
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/*
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* struct mtk_vcodec_clk_info - Structure used to store clock name
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*/
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struct mtk_vcodec_clk_info {
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const char *clk_name;
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struct clk *vcodec_clk;
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};
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/*
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* struct mtk_vcodec_clk - Structure used to store vcodec clock information
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*/
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struct mtk_vcodec_clk {
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struct mtk_vcodec_clk_info *clk_info;
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int clk_num;
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};
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/*
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* struct mtk_vcodec_pm - Power management data structure
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*/
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struct mtk_vcodec_pm {
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struct mtk_vcodec_clk vdec_clk;
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struct mtk_vcodec_clk venc_clk;
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struct device *dev;
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};
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/**
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* struct vdec_pic_info - picture size information
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* @pic_w: picture width
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* @pic_h: picture height
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* @buf_w: picture buffer width (64 aligned up from pic_w)
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* @buf_h: picture buffer heiht (64 aligned up from pic_h)
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* @fb_sz: bitstream size of each plane
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* E.g. suppose picture size is 176x144,
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* buffer size will be aligned to 176x160.
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* @cap_fourcc: fourcc number(may changed when resolution change)
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* @reserved: align struct to 64-bit in order to adjust 32-bit and 64-bit os.
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*/
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struct vdec_pic_info {
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unsigned int pic_w;
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unsigned int pic_h;
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unsigned int buf_w;
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unsigned int buf_h;
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unsigned int fb_sz[VIDEO_MAX_PLANES];
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unsigned int cap_fourcc;
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unsigned int reserved;
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};
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/**
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* struct mtk_vcodec_ctx - Context (instance) private data.
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*
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* @type: type of the instance - decoder or encoder
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* @dev: pointer to the mtk_vcodec_dev of the device
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* @list: link to ctx_list of mtk_vcodec_dev
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* @fh: struct v4l2_fh
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* @m2m_ctx: pointer to the v4l2_m2m_ctx of the context
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* @q_data: store information of input and output queue
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* of the context
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* @id: index of the context that this structure describes
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* @state: state of the context
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* @param_change: indicate encode parameter type
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* @enc_params: encoding parameters
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* @dec_if: hooked decoder driver interface
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* @enc_if: hooked encoder driver interface
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* @drv_handle: driver handle for specific decode/encode instance
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*
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* @picinfo: store picture info after header parsing
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* @dpb_size: store dpb count after header parsing
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* @int_cond: variable used by the waitqueue
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* @int_type: type of the last interrupt
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* @queue: waitqueue that can be used to wait for this context to
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* finish
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* @irq_status: irq status
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*
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* @ctrl_hdl: handler for v4l2 framework
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* @decode_work: worker for the decoding
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* @encode_work: worker for the encoding
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* @last_decoded_picinfo: pic information get from latest decode
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* @empty_flush_buf: a fake size-0 capture buffer that indicates flush. Only
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* to be used with encoder and stateful decoder.
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* @is_flushing: set to true if flushing is in progress.
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* @current_codec: current set input codec, in V4L2 pixel format
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* @capture_fourcc: capture queue type in V4L2 pixel format
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*
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* @colorspace: enum v4l2_colorspace; supplemental to pixelformat
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* @ycbcr_enc: enum v4l2_ycbcr_encoding, Y'CbCr encoding
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* @quantization: enum v4l2_quantization, colorspace quantization
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* @xfer_func: enum v4l2_xfer_func, colorspace transfer function
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* @decoded_frame_cnt: number of decoded frames
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* @lock: protect variables accessed by V4L2 threads and worker thread such as
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* mtk_video_dec_buf.
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* @hw_id: hardware index used to identify different hardware.
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*
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* @msg_queue: msg queue used to store lat buffer information.
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* @q_mutex: vb2_queue mutex.
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*/
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struct mtk_vcodec_ctx {
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enum mtk_instance_type type;
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struct mtk_vcodec_dev *dev;
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struct list_head list;
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struct v4l2_fh fh;
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struct v4l2_m2m_ctx *m2m_ctx;
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struct mtk_q_data q_data[2];
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int id;
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enum mtk_instance_state state;
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enum mtk_encode_param param_change;
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struct mtk_enc_params enc_params;
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const struct vdec_common_if *dec_if;
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const struct venc_common_if *enc_if;
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void *drv_handle;
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struct vdec_pic_info picinfo;
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int dpb_size;
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int int_cond[MTK_VDEC_HW_MAX];
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int int_type[MTK_VDEC_HW_MAX];
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wait_queue_head_t queue[MTK_VDEC_HW_MAX];
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unsigned int irq_status;
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struct v4l2_ctrl_handler ctrl_hdl;
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struct work_struct decode_work;
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struct work_struct encode_work;
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struct vdec_pic_info last_decoded_picinfo;
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struct v4l2_m2m_buffer empty_flush_buf;
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bool is_flushing;
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u32 current_codec;
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u32 capture_fourcc;
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enum v4l2_colorspace colorspace;
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enum v4l2_ycbcr_encoding ycbcr_enc;
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enum v4l2_quantization quantization;
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enum v4l2_xfer_func xfer_func;
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int decoded_frame_cnt;
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struct mutex lock;
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int hw_id;
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struct vdec_msg_queue msg_queue;
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struct mutex q_mutex;
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};
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/*
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* enum mtk_vdec_hw_arch - Used to separate different hardware architecture
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*/
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enum mtk_vdec_hw_arch {
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MTK_VDEC_PURE_SINGLE_CORE,
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MTK_VDEC_LAT_SINGLE_CORE,
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};
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/*
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* struct mtk_vdec_format_types - Structure used to get supported
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* format types according to decoder capability
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*/
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enum mtk_vdec_format_types {
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MTK_VDEC_FORMAT_MM21 = 0x20,
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MTK_VDEC_FORMAT_MT21C = 0x40,
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MTK_VDEC_FORMAT_H264_SLICE = 0x100,
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MTK_VDEC_FORMAT_VP8_FRAME = 0x200,
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MTK_VDEC_FORMAT_VP9_FRAME = 0x400,
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MTK_VDEC_FORMAT_AV1_FRAME = 0x800,
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MTK_VDEC_FORMAT_HEVC_FRAME = 0x1000,
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MTK_VCODEC_INNER_RACING = 0x20000,
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};
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/**
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* struct mtk_vcodec_dec_pdata - compatible data for each IC
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* @init_vdec_params: init vdec params
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* @ctrls_setup: init vcodec dec ctrls
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* @worker: worker to start a decode job
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* @flush_decoder: function that flushes the decoder
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* @get_cap_buffer: get capture buffer from capture queue
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* @cap_to_disp: put capture buffer to disp list for lat and core arch
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* @vdec_vb2_ops: struct vb2_ops
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*
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* @vdec_formats: supported video decoder formats
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* @num_formats: count of video decoder formats
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* @default_out_fmt: default output buffer format
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* @default_cap_fmt: default capture buffer format
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*
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* @hw_arch: hardware arch is used to separate pure_sin_core and lat_sin_core
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*
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* @is_subdev_supported: whether support parent-node architecture(subdev)
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* @uses_stateless_api: whether the decoder uses the stateless API with requests
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*/
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struct mtk_vcodec_dec_pdata {
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void (*init_vdec_params)(struct mtk_vcodec_ctx *ctx);
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int (*ctrls_setup)(struct mtk_vcodec_ctx *ctx);
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void (*worker)(struct work_struct *work);
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int (*flush_decoder)(struct mtk_vcodec_ctx *ctx);
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struct vdec_fb *(*get_cap_buffer)(struct mtk_vcodec_ctx *ctx);
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void (*cap_to_disp)(struct mtk_vcodec_ctx *ctx, int error,
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struct media_request *src_buf_req);
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struct vb2_ops *vdec_vb2_ops;
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const struct mtk_video_fmt *vdec_formats;
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const int *num_formats;
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const struct mtk_video_fmt *default_out_fmt;
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const struct mtk_video_fmt *default_cap_fmt;
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enum mtk_vdec_hw_arch hw_arch;
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bool is_subdev_supported;
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bool uses_stateless_api;
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};
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/**
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* struct mtk_vcodec_enc_pdata - compatible data for each IC
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*
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* @uses_ext: whether the encoder uses the extended firmware messaging format
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* @min_bitrate: minimum supported encoding bitrate
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* @max_bitrate: maximum supported encoding bitrate
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* @capture_formats: array of supported capture formats
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* @num_capture_formats: number of entries in capture_formats
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* @output_formats: array of supported output formats
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* @num_output_formats: number of entries in output_formats
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* @core_id: stand for h264 or vp8 encode index
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* @uses_34bit: whether the encoder uses 34-bit iova
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*/
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struct mtk_vcodec_enc_pdata {
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bool uses_ext;
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unsigned long min_bitrate;
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unsigned long max_bitrate;
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const struct mtk_video_fmt *capture_formats;
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size_t num_capture_formats;
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const struct mtk_video_fmt *output_formats;
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size_t num_output_formats;
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int core_id;
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bool uses_34bit;
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};
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#define MTK_ENC_CTX_IS_EXT(ctx) ((ctx)->dev->venc_pdata->uses_ext)
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#define MTK_ENC_IOVA_IS_34BIT(ctx) ((ctx)->dev->venc_pdata->uses_34bit)
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/**
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* struct mtk_vcodec_dev - driver data
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* @v4l2_dev: V4L2 device to register video devices for.
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* @vfd_dec: Video device for decoder
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* @mdev_dec: Media device for decoder
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* @vfd_enc: Video device for encoder.
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*
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* @m2m_dev_dec: m2m device for decoder
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* @m2m_dev_enc: m2m device for encoder.
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* @plat_dev: platform device
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* @ctx_list: list of struct mtk_vcodec_ctx
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* @irqlock: protect data access by irq handler and work thread
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* @curr_ctx: The context that is waiting for codec hardware
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*
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* @reg_base: Mapped address of MTK Vcodec registers.
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* @vdec_pdata: decoder IC-specific data
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* @venc_pdata: encoder IC-specific data
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*
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* @fw_handler: used to communicate with the firmware.
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* @id_counter: used to identify current opened instance
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*
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* @decode_workqueue: decode work queue
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* @encode_workqueue: encode work queue
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*
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* @int_cond: used to identify interrupt condition happen
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* @int_type: used to identify what kind of interrupt condition happen
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* @dev_mutex: video_device lock
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* @queue: waitqueue for waiting for completion of device commands
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*
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* @dec_irq: decoder irq resource
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* @enc_irq: h264 encoder irq resource
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*
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* @dec_mutex: decoder hardware lock
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* @enc_mutex: encoder hardware lock.
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*
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* @pm: power management control
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* @dec_capability: used to identify decode capability, ex: 4k
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* @enc_capability: used to identify encode capability
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*
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* @core_workqueue: queue used for core hardware decode
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*
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* @subdev_dev: subdev hardware device
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* @subdev_prob_done: check whether all used hw device is prob done
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* @subdev_bitmap: used to record hardware is ready or not
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*
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* @dec_active_cnt: used to mark whether need to record register value
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* @vdec_racing_info: record register value
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* @dec_racing_info_mutex: mutex lock used for inner racing mode
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* @dbgfs: debug log related information
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*/
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struct mtk_vcodec_dev {
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struct v4l2_device v4l2_dev;
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struct video_device *vfd_dec;
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struct media_device mdev_dec;
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struct video_device *vfd_enc;
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struct v4l2_m2m_dev *m2m_dev_dec;
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struct v4l2_m2m_dev *m2m_dev_enc;
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struct platform_device *plat_dev;
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struct list_head ctx_list;
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spinlock_t irqlock;
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struct mtk_vcodec_ctx *curr_ctx;
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void __iomem *reg_base[NUM_MAX_VCODEC_REG_BASE];
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const struct mtk_vcodec_dec_pdata *vdec_pdata;
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const struct mtk_vcodec_enc_pdata *venc_pdata;
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struct mtk_vcodec_fw *fw_handler;
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unsigned long id_counter;
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struct workqueue_struct *decode_workqueue;
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struct workqueue_struct *encode_workqueue;
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int int_cond;
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int int_type;
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struct mutex dev_mutex;
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wait_queue_head_t queue;
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int dec_irq;
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int enc_irq;
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/* decoder hardware mutex lock */
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struct mutex dec_mutex[MTK_VDEC_HW_MAX];
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struct mutex enc_mutex;
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struct mtk_vcodec_pm pm;
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unsigned int dec_capability;
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unsigned int enc_capability;
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struct workqueue_struct *core_workqueue;
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void *subdev_dev[MTK_VDEC_HW_MAX];
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int (*subdev_prob_done)(struct mtk_vcodec_dev *vdec_dev);
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DECLARE_BITMAP(subdev_bitmap, MTK_VDEC_HW_MAX);
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atomic_t dec_active_cnt;
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u32 vdec_racing_info[132];
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/* Protects access to vdec_racing_info data */
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struct mutex dec_racing_info_mutex;
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struct mtk_vcodec_dbgfs dbgfs;
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};
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static inline struct mtk_vcodec_ctx *fh_to_ctx(struct v4l2_fh *fh)
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{
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return container_of(fh, struct mtk_vcodec_ctx, fh);
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}
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static inline struct mtk_vcodec_ctx *ctrl_to_ctx(struct v4l2_ctrl *ctrl)
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{
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return container_of(ctrl->handler, struct mtk_vcodec_ctx, ctrl_hdl);
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}
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/* Wake up context wait_queue */
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static inline void
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wake_up_ctx(struct mtk_vcodec_ctx *ctx, unsigned int reason, unsigned int hw_id)
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{
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ctx->int_cond[hw_id] = 1;
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ctx->int_type[hw_id] = reason;
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wake_up_interruptible(&ctx->queue[hw_id]);
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}
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#endif /* _MTK_VCODEC_DRV_H_ */
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