796 lines
21 KiB
C
796 lines
21 KiB
C
// SPDX-License-Identifier: GPL-2.0-only
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/*
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* Microchip CSI2 Demux Controller (CSI2DC) driver
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*
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* Copyright (C) 2018 Microchip Technology, Inc.
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*
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* Author: Eugen Hristev <eugen.hristev@microchip.com>
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*
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*/
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#include <linux/clk.h>
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#include <linux/mod_devicetable.h>
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#include <linux/module.h>
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#include <linux/of_graph.h>
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#include <linux/platform_device.h>
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#include <linux/pm_runtime.h>
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#include <linux/videodev2.h>
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#include <media/v4l2-fwnode.h>
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#include <media/v4l2-subdev.h>
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/* Global configuration register */
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#define CSI2DC_GCFG 0x0
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/* MIPI sensor pixel clock is free running */
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#define CSI2DC_GCFG_MIPIFRN BIT(0)
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/* GPIO parallel interface selection */
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#define CSI2DC_GCFG_GPIOSEL BIT(1)
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/* Output waveform inter-line minimum delay */
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#define CSI2DC_GCFG_HLC(v) ((v) << 4)
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#define CSI2DC_GCFG_HLC_MASK GENMASK(7, 4)
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/* SAMA7G5 requires a HLC delay of 15 */
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#define SAMA7G5_HLC (15)
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/* Global control register */
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#define CSI2DC_GCTLR 0x04
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#define CSI2DC_GCTLR_SWRST BIT(0)
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/* Global status register */
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#define CSI2DC_GS 0x08
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/* SSP interrupt status register */
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#define CSI2DC_SSPIS 0x28
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/* Pipe update register */
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#define CSI2DC_PU 0xc0
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/* Video pipe attributes update */
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#define CSI2DC_PU_VP BIT(0)
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/* Pipe update status register */
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#define CSI2DC_PUS 0xc4
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/* Video pipeline Interrupt Status Register */
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#define CSI2DC_VPISR 0xf4
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/* Video pipeline enable register */
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#define CSI2DC_VPE 0xf8
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#define CSI2DC_VPE_ENABLE BIT(0)
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/* Video pipeline configuration register */
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#define CSI2DC_VPCFG 0xfc
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/* Data type */
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#define CSI2DC_VPCFG_DT(v) ((v) << 0)
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#define CSI2DC_VPCFG_DT_MASK GENMASK(5, 0)
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/* Virtual channel identifier */
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#define CSI2DC_VPCFG_VC(v) ((v) << 6)
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#define CSI2DC_VPCFG_VC_MASK GENMASK(7, 6)
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/* Decompression enable */
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#define CSI2DC_VPCFG_DE BIT(8)
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/* Decoder mode */
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#define CSI2DC_VPCFG_DM(v) ((v) << 9)
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#define CSI2DC_VPCFG_DM_DECODER8TO12 0
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/* Decoder predictor 2 selection */
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#define CSI2DC_VPCFG_DP2 BIT(12)
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/* Recommended memory storage */
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#define CSI2DC_VPCFG_RMS BIT(13)
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/* Post adjustment */
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#define CSI2DC_VPCFG_PA BIT(14)
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/* Video pipeline column register */
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#define CSI2DC_VPCOL 0x100
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/* Column number */
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#define CSI2DC_VPCOL_COL(v) ((v) << 0)
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#define CSI2DC_VPCOL_COL_MASK GENMASK(15, 0)
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/* Video pipeline row register */
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#define CSI2DC_VPROW 0x104
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/* Row number */
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#define CSI2DC_VPROW_ROW(v) ((v) << 0)
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#define CSI2DC_VPROW_ROW_MASK GENMASK(15, 0)
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/* Version register */
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#define CSI2DC_VERSION 0x1fc
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/* register read/write helpers */
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#define csi2dc_readl(st, reg) readl_relaxed((st)->base + (reg))
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#define csi2dc_writel(st, reg, val) writel_relaxed((val), \
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(st)->base + (reg))
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/* supported RAW data types */
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#define CSI2DC_DT_RAW6 0x28
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#define CSI2DC_DT_RAW7 0x29
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#define CSI2DC_DT_RAW8 0x2a
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#define CSI2DC_DT_RAW10 0x2b
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#define CSI2DC_DT_RAW12 0x2c
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#define CSI2DC_DT_RAW14 0x2d
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/* YUV data types */
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#define CSI2DC_DT_YUV422_8B 0x1e
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/*
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* struct csi2dc_format - CSI2DC format type struct
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* @mbus_code: Media bus code for the format
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* @dt: Data type constant for this format
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*/
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struct csi2dc_format {
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u32 mbus_code;
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u32 dt;
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};
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static const struct csi2dc_format csi2dc_formats[] = {
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{
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.mbus_code = MEDIA_BUS_FMT_SRGGB8_1X8,
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.dt = CSI2DC_DT_RAW8,
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}, {
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.mbus_code = MEDIA_BUS_FMT_SBGGR8_1X8,
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.dt = CSI2DC_DT_RAW8,
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}, {
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.mbus_code = MEDIA_BUS_FMT_SGRBG8_1X8,
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.dt = CSI2DC_DT_RAW8,
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}, {
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.mbus_code = MEDIA_BUS_FMT_SGBRG8_1X8,
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.dt = CSI2DC_DT_RAW8,
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}, {
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.mbus_code = MEDIA_BUS_FMT_SRGGB10_1X10,
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.dt = CSI2DC_DT_RAW10,
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}, {
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.mbus_code = MEDIA_BUS_FMT_SBGGR10_1X10,
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.dt = CSI2DC_DT_RAW10,
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}, {
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.mbus_code = MEDIA_BUS_FMT_SGRBG10_1X10,
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.dt = CSI2DC_DT_RAW10,
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}, {
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.mbus_code = MEDIA_BUS_FMT_SGBRG10_1X10,
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.dt = CSI2DC_DT_RAW10,
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}, {
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.mbus_code = MEDIA_BUS_FMT_YUYV8_2X8,
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.dt = CSI2DC_DT_YUV422_8B,
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},
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};
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enum mipi_csi_pads {
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CSI2DC_PAD_SINK = 0,
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CSI2DC_PAD_SOURCE = 1,
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CSI2DC_PADS_NUM = 2,
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};
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/*
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* struct csi2dc_device - CSI2DC device driver data/config struct
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* @base: Register map base address
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* @csi2dc_sd: v4l2 subdevice for the csi2dc device
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* This is the subdevice that the csi2dc device itself
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* registers in v4l2 subsystem
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* @dev: struct device for this csi2dc device
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* @pclk: Peripheral clock reference
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* Input clock that clocks the hardware block internal
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* logic
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* @scck: Sensor Controller clock reference
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* Input clock that is used to generate the pixel clock
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* @format: Current saved format used in g/s fmt
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* @cur_fmt: Current state format
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* @try_fmt: Try format that is being tried
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* @pads: Media entity pads for the csi2dc subdevice
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* @clk_gated: Whether the clock is gated or free running
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* @video_pipe: Whether video pipeline is configured
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* @parallel_mode: The underlying subdevice is connected on a parallel bus
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* @vc: Current set virtual channel
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* @notifier: Async notifier that is used to bound the underlying
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* subdevice to the csi2dc subdevice
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* @input_sd: Reference to the underlying subdevice bound to the
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* csi2dc subdevice
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* @remote_pad: Pad number of the underlying subdevice that is linked
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* to the csi2dc subdevice sink pad.
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*/
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struct csi2dc_device {
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void __iomem *base;
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struct v4l2_subdev csi2dc_sd;
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struct device *dev;
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struct clk *pclk;
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struct clk *scck;
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struct v4l2_mbus_framefmt format;
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const struct csi2dc_format *cur_fmt;
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const struct csi2dc_format *try_fmt;
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struct media_pad pads[CSI2DC_PADS_NUM];
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bool clk_gated;
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bool video_pipe;
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bool parallel_mode;
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u32 vc;
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struct v4l2_async_notifier notifier;
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struct v4l2_subdev *input_sd;
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u32 remote_pad;
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};
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static inline struct csi2dc_device *
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csi2dc_sd_to_csi2dc_device(struct v4l2_subdev *csi2dc_sd)
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{
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return container_of(csi2dc_sd, struct csi2dc_device, csi2dc_sd);
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}
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static int csi2dc_enum_mbus_code(struct v4l2_subdev *csi2dc_sd,
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struct v4l2_subdev_state *sd_state,
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struct v4l2_subdev_mbus_code_enum *code)
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{
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if (code->index >= ARRAY_SIZE(csi2dc_formats))
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return -EINVAL;
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code->code = csi2dc_formats[code->index].mbus_code;
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return 0;
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}
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static int csi2dc_get_fmt(struct v4l2_subdev *csi2dc_sd,
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struct v4l2_subdev_state *sd_state,
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struct v4l2_subdev_format *format)
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{
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struct csi2dc_device *csi2dc = csi2dc_sd_to_csi2dc_device(csi2dc_sd);
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struct v4l2_mbus_framefmt *v4l2_try_fmt;
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if (format->which == V4L2_SUBDEV_FORMAT_TRY) {
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v4l2_try_fmt = v4l2_subdev_get_try_format(csi2dc_sd, sd_state,
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format->pad);
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format->format = *v4l2_try_fmt;
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return 0;
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}
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format->format = csi2dc->format;
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return 0;
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}
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static int csi2dc_set_fmt(struct v4l2_subdev *csi2dc_sd,
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struct v4l2_subdev_state *sd_state,
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struct v4l2_subdev_format *req_fmt)
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{
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struct csi2dc_device *csi2dc = csi2dc_sd_to_csi2dc_device(csi2dc_sd);
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const struct csi2dc_format *fmt, *try_fmt = NULL;
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struct v4l2_mbus_framefmt *v4l2_try_fmt;
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unsigned int i;
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/*
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* Setting the source pad is disabled.
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* The same format is being propagated from the sink to source.
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*/
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if (req_fmt->pad == CSI2DC_PAD_SOURCE)
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return -EINVAL;
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for (i = 0; i < ARRAY_SIZE(csi2dc_formats); i++) {
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fmt = &csi2dc_formats[i];
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if (req_fmt->format.code == fmt->mbus_code)
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try_fmt = fmt;
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fmt++;
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}
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/* in case we could not find the desired format, default to something */
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if (!try_fmt) {
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try_fmt = &csi2dc_formats[0];
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dev_dbg(csi2dc->dev,
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"CSI2DC unsupported format 0x%x, defaulting to 0x%x\n",
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req_fmt->format.code, csi2dc_formats[0].mbus_code);
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}
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req_fmt->format.code = try_fmt->mbus_code;
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req_fmt->format.colorspace = V4L2_COLORSPACE_SRGB;
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req_fmt->format.field = V4L2_FIELD_NONE;
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if (req_fmt->which == V4L2_SUBDEV_FORMAT_TRY) {
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v4l2_try_fmt = v4l2_subdev_get_try_format(csi2dc_sd, sd_state,
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req_fmt->pad);
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*v4l2_try_fmt = req_fmt->format;
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/* Trying on the sink pad makes the source pad change too */
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v4l2_try_fmt = v4l2_subdev_get_try_format(csi2dc_sd,
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sd_state,
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CSI2DC_PAD_SOURCE);
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*v4l2_try_fmt = req_fmt->format;
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/* if we are just trying, we are done */
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return 0;
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}
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/* save the format for later requests */
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csi2dc->format = req_fmt->format;
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/* update config */
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csi2dc->cur_fmt = try_fmt;
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dev_dbg(csi2dc->dev, "new format set: 0x%x @%dx%d\n",
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csi2dc->format.code, csi2dc->format.width,
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csi2dc->format.height);
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return 0;
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}
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static int csi2dc_power(struct csi2dc_device *csi2dc, int on)
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{
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int ret = 0;
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if (on) {
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ret = clk_prepare_enable(csi2dc->pclk);
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if (ret) {
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dev_err(csi2dc->dev, "failed to enable pclk:%d\n", ret);
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return ret;
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}
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ret = clk_prepare_enable(csi2dc->scck);
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if (ret) {
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dev_err(csi2dc->dev, "failed to enable scck:%d\n", ret);
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clk_disable_unprepare(csi2dc->pclk);
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return ret;
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}
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/* if powering up, deassert reset line */
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csi2dc_writel(csi2dc, CSI2DC_GCTLR, CSI2DC_GCTLR_SWRST);
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} else {
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/* if powering down, assert reset line */
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csi2dc_writel(csi2dc, CSI2DC_GCTLR, 0);
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clk_disable_unprepare(csi2dc->scck);
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clk_disable_unprepare(csi2dc->pclk);
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}
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return ret;
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}
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static int csi2dc_get_mbus_config(struct csi2dc_device *csi2dc)
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{
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struct v4l2_mbus_config mbus_config = { 0 };
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int ret;
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ret = v4l2_subdev_call(csi2dc->input_sd, pad, get_mbus_config,
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csi2dc->remote_pad, &mbus_config);
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if (ret == -ENOIOCTLCMD) {
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dev_dbg(csi2dc->dev,
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"no remote mbus configuration available\n");
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return 0;
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}
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if (ret) {
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dev_err(csi2dc->dev,
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"failed to get remote mbus configuration\n");
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return 0;
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}
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dev_dbg(csi2dc->dev, "subdev sending on channel %d\n", csi2dc->vc);
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csi2dc->clk_gated = mbus_config.bus.parallel.flags &
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V4L2_MBUS_CSI2_NONCONTINUOUS_CLOCK;
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dev_dbg(csi2dc->dev, "mbus_config: %s clock\n",
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csi2dc->clk_gated ? "gated" : "free running");
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return 0;
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}
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static void csi2dc_vp_update(struct csi2dc_device *csi2dc)
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{
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u32 vp, gcfg;
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if (!csi2dc->video_pipe) {
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dev_err(csi2dc->dev, "video pipeline unavailable\n");
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return;
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}
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if (csi2dc->parallel_mode) {
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/* In parallel mode, GPIO parallel interface must be selected */
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gcfg = csi2dc_readl(csi2dc, CSI2DC_GCFG);
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gcfg |= CSI2DC_GCFG_GPIOSEL;
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csi2dc_writel(csi2dc, CSI2DC_GCFG, gcfg);
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return;
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}
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/* serial video pipeline */
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csi2dc_writel(csi2dc, CSI2DC_GCFG,
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(SAMA7G5_HLC & CSI2DC_GCFG_HLC_MASK) |
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(csi2dc->clk_gated ? 0 : CSI2DC_GCFG_MIPIFRN));
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vp = CSI2DC_VPCFG_DT(csi2dc->cur_fmt->dt) & CSI2DC_VPCFG_DT_MASK;
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vp |= CSI2DC_VPCFG_VC(csi2dc->vc) & CSI2DC_VPCFG_VC_MASK;
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vp &= ~CSI2DC_VPCFG_DE;
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vp |= CSI2DC_VPCFG_DM(CSI2DC_VPCFG_DM_DECODER8TO12);
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vp &= ~CSI2DC_VPCFG_DP2;
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vp &= ~CSI2DC_VPCFG_RMS;
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vp |= CSI2DC_VPCFG_PA;
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csi2dc_writel(csi2dc, CSI2DC_VPCFG, vp);
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csi2dc_writel(csi2dc, CSI2DC_VPE, CSI2DC_VPE_ENABLE);
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csi2dc_writel(csi2dc, CSI2DC_PU, CSI2DC_PU_VP);
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}
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static int csi2dc_s_stream(struct v4l2_subdev *csi2dc_sd, int enable)
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{
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struct csi2dc_device *csi2dc = csi2dc_sd_to_csi2dc_device(csi2dc_sd);
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int ret;
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if (enable) {
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ret = pm_runtime_resume_and_get(csi2dc->dev);
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if (ret < 0)
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return ret;
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csi2dc_get_mbus_config(csi2dc);
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csi2dc_vp_update(csi2dc);
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return v4l2_subdev_call(csi2dc->input_sd, video, s_stream,
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true);
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}
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dev_dbg(csi2dc->dev,
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"Last frame received: VPCOLR = %u, VPROWR= %u, VPISR = %x\n",
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csi2dc_readl(csi2dc, CSI2DC_VPCOL),
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csi2dc_readl(csi2dc, CSI2DC_VPROW),
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csi2dc_readl(csi2dc, CSI2DC_VPISR));
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/* stop streaming scenario */
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ret = v4l2_subdev_call(csi2dc->input_sd, video, s_stream, false);
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pm_runtime_put_sync(csi2dc->dev);
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return ret;
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}
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static int csi2dc_init_cfg(struct v4l2_subdev *csi2dc_sd,
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struct v4l2_subdev_state *sd_state)
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{
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struct v4l2_mbus_framefmt *v4l2_try_fmt =
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v4l2_subdev_get_try_format(csi2dc_sd, sd_state, 0);
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v4l2_try_fmt->height = 480;
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v4l2_try_fmt->width = 640;
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v4l2_try_fmt->code = csi2dc_formats[0].mbus_code;
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v4l2_try_fmt->colorspace = V4L2_COLORSPACE_SRGB;
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v4l2_try_fmt->field = V4L2_FIELD_NONE;
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v4l2_try_fmt->ycbcr_enc = V4L2_YCBCR_ENC_DEFAULT;
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v4l2_try_fmt->quantization = V4L2_QUANTIZATION_DEFAULT;
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v4l2_try_fmt->xfer_func = V4L2_XFER_FUNC_DEFAULT;
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return 0;
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}
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static const struct media_entity_operations csi2dc_entity_ops = {
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|
.link_validate = v4l2_subdev_link_validate,
|
|
};
|
|
|
|
static const struct v4l2_subdev_pad_ops csi2dc_pad_ops = {
|
|
.enum_mbus_code = csi2dc_enum_mbus_code,
|
|
.set_fmt = csi2dc_set_fmt,
|
|
.get_fmt = csi2dc_get_fmt,
|
|
.init_cfg = csi2dc_init_cfg,
|
|
};
|
|
|
|
static const struct v4l2_subdev_video_ops csi2dc_video_ops = {
|
|
.s_stream = csi2dc_s_stream,
|
|
};
|
|
|
|
static const struct v4l2_subdev_ops csi2dc_subdev_ops = {
|
|
.pad = &csi2dc_pad_ops,
|
|
.video = &csi2dc_video_ops,
|
|
};
|
|
|
|
static int csi2dc_async_bound(struct v4l2_async_notifier *notifier,
|
|
struct v4l2_subdev *subdev,
|
|
struct v4l2_async_subdev *asd)
|
|
{
|
|
struct csi2dc_device *csi2dc = container_of(notifier,
|
|
struct csi2dc_device, notifier);
|
|
int pad;
|
|
int ret;
|
|
|
|
csi2dc->input_sd = subdev;
|
|
|
|
pad = media_entity_get_fwnode_pad(&subdev->entity, asd->match.fwnode,
|
|
MEDIA_PAD_FL_SOURCE);
|
|
if (pad < 0) {
|
|
dev_err(csi2dc->dev, "Failed to find pad for %s\n",
|
|
subdev->name);
|
|
return pad;
|
|
}
|
|
|
|
csi2dc->remote_pad = pad;
|
|
|
|
ret = media_create_pad_link(&csi2dc->input_sd->entity,
|
|
csi2dc->remote_pad,
|
|
&csi2dc->csi2dc_sd.entity, 0,
|
|
MEDIA_LNK_FL_ENABLED);
|
|
if (ret) {
|
|
dev_err(csi2dc->dev,
|
|
"Failed to create pad link: %s to %s\n",
|
|
csi2dc->input_sd->entity.name,
|
|
csi2dc->csi2dc_sd.entity.name);
|
|
return ret;
|
|
}
|
|
|
|
dev_dbg(csi2dc->dev, "link with %s pad: %d\n",
|
|
csi2dc->input_sd->name, csi2dc->remote_pad);
|
|
|
|
return ret;
|
|
}
|
|
|
|
static const struct v4l2_async_notifier_operations csi2dc_async_ops = {
|
|
.bound = csi2dc_async_bound,
|
|
};
|
|
|
|
static int csi2dc_prepare_notifier(struct csi2dc_device *csi2dc,
|
|
struct fwnode_handle *input_fwnode)
|
|
{
|
|
struct v4l2_async_subdev *asd;
|
|
int ret = 0;
|
|
|
|
v4l2_async_nf_init(&csi2dc->notifier);
|
|
|
|
asd = v4l2_async_nf_add_fwnode_remote(&csi2dc->notifier,
|
|
input_fwnode,
|
|
struct v4l2_async_subdev);
|
|
|
|
fwnode_handle_put(input_fwnode);
|
|
|
|
if (IS_ERR(asd)) {
|
|
ret = PTR_ERR(asd);
|
|
dev_err(csi2dc->dev,
|
|
"failed to add async notifier for node %pOF: %d\n",
|
|
to_of_node(input_fwnode), ret);
|
|
v4l2_async_nf_cleanup(&csi2dc->notifier);
|
|
return ret;
|
|
}
|
|
|
|
csi2dc->notifier.ops = &csi2dc_async_ops;
|
|
|
|
ret = v4l2_async_subdev_nf_register(&csi2dc->csi2dc_sd,
|
|
&csi2dc->notifier);
|
|
if (ret) {
|
|
dev_err(csi2dc->dev, "fail to register async notifier: %d\n",
|
|
ret);
|
|
v4l2_async_nf_cleanup(&csi2dc->notifier);
|
|
}
|
|
|
|
return ret;
|
|
}
|
|
|
|
static int csi2dc_of_parse(struct csi2dc_device *csi2dc,
|
|
struct device_node *of_node)
|
|
{
|
|
struct fwnode_handle *input_fwnode, *output_fwnode;
|
|
struct v4l2_fwnode_endpoint input_endpoint = { 0 },
|
|
output_endpoint = { 0 };
|
|
int ret;
|
|
|
|
input_fwnode = fwnode_graph_get_next_endpoint(of_fwnode_handle(of_node),
|
|
NULL);
|
|
if (!input_fwnode) {
|
|
dev_err(csi2dc->dev,
|
|
"missing port node at %pOF, input node is mandatory.\n",
|
|
of_node);
|
|
return -EINVAL;
|
|
}
|
|
|
|
ret = v4l2_fwnode_endpoint_parse(input_fwnode, &input_endpoint);
|
|
if (ret) {
|
|
dev_err(csi2dc->dev, "endpoint not defined at %pOF\n", of_node);
|
|
goto csi2dc_of_parse_err;
|
|
}
|
|
|
|
if (input_endpoint.bus_type == V4L2_MBUS_PARALLEL ||
|
|
input_endpoint.bus_type == V4L2_MBUS_BT656) {
|
|
csi2dc->parallel_mode = true;
|
|
dev_dbg(csi2dc->dev,
|
|
"subdevice connected on parallel interface\n");
|
|
}
|
|
|
|
if (input_endpoint.bus_type == V4L2_MBUS_CSI2_DPHY) {
|
|
csi2dc->clk_gated = input_endpoint.bus.mipi_csi2.flags &
|
|
V4L2_MBUS_CSI2_NONCONTINUOUS_CLOCK;
|
|
dev_dbg(csi2dc->dev,
|
|
"subdevice connected on serial interface\n");
|
|
dev_dbg(csi2dc->dev, "DT: %s clock\n",
|
|
csi2dc->clk_gated ? "gated" : "free running");
|
|
}
|
|
|
|
output_fwnode = fwnode_graph_get_next_endpoint
|
|
(of_fwnode_handle(of_node), input_fwnode);
|
|
|
|
if (output_fwnode)
|
|
ret = v4l2_fwnode_endpoint_parse(output_fwnode,
|
|
&output_endpoint);
|
|
|
|
fwnode_handle_put(output_fwnode);
|
|
|
|
if (!output_fwnode || ret) {
|
|
dev_info(csi2dc->dev,
|
|
"missing output node at %pOF, data pipe available only.\n",
|
|
of_node);
|
|
} else {
|
|
if (output_endpoint.bus_type != V4L2_MBUS_PARALLEL &&
|
|
output_endpoint.bus_type != V4L2_MBUS_BT656) {
|
|
dev_err(csi2dc->dev,
|
|
"output port must be parallel/bt656.\n");
|
|
ret = -EINVAL;
|
|
goto csi2dc_of_parse_err;
|
|
}
|
|
|
|
csi2dc->video_pipe = true;
|
|
|
|
dev_dbg(csi2dc->dev,
|
|
"block %pOF [%d.%d]->[%d.%d] video pipeline\n",
|
|
of_node, input_endpoint.base.port,
|
|
input_endpoint.base.id, output_endpoint.base.port,
|
|
output_endpoint.base.id);
|
|
}
|
|
|
|
/* prepare async notifier for subdevice completion */
|
|
return csi2dc_prepare_notifier(csi2dc, input_fwnode);
|
|
|
|
csi2dc_of_parse_err:
|
|
fwnode_handle_put(input_fwnode);
|
|
return ret;
|
|
}
|
|
|
|
static void csi2dc_default_format(struct csi2dc_device *csi2dc)
|
|
{
|
|
csi2dc->cur_fmt = &csi2dc_formats[0];
|
|
|
|
csi2dc->format.height = 480;
|
|
csi2dc->format.width = 640;
|
|
csi2dc->format.code = csi2dc_formats[0].mbus_code;
|
|
csi2dc->format.colorspace = V4L2_COLORSPACE_SRGB;
|
|
csi2dc->format.field = V4L2_FIELD_NONE;
|
|
csi2dc->format.ycbcr_enc = V4L2_YCBCR_ENC_DEFAULT;
|
|
csi2dc->format.quantization = V4L2_QUANTIZATION_DEFAULT;
|
|
csi2dc->format.xfer_func = V4L2_XFER_FUNC_DEFAULT;
|
|
}
|
|
|
|
static int csi2dc_probe(struct platform_device *pdev)
|
|
{
|
|
struct device *dev = &pdev->dev;
|
|
struct csi2dc_device *csi2dc;
|
|
int ret = 0;
|
|
u32 ver;
|
|
|
|
csi2dc = devm_kzalloc(dev, sizeof(*csi2dc), GFP_KERNEL);
|
|
if (!csi2dc)
|
|
return -ENOMEM;
|
|
|
|
csi2dc->dev = dev;
|
|
|
|
csi2dc->base = devm_platform_ioremap_resource(pdev, 0);
|
|
if (IS_ERR(csi2dc->base)) {
|
|
dev_err(dev, "base address not set\n");
|
|
return PTR_ERR(csi2dc->base);
|
|
}
|
|
|
|
csi2dc->pclk = devm_clk_get(dev, "pclk");
|
|
if (IS_ERR(csi2dc->pclk)) {
|
|
ret = PTR_ERR(csi2dc->pclk);
|
|
dev_err(dev, "failed to get pclk: %d\n", ret);
|
|
return ret;
|
|
}
|
|
|
|
csi2dc->scck = devm_clk_get(dev, "scck");
|
|
if (IS_ERR(csi2dc->scck)) {
|
|
ret = PTR_ERR(csi2dc->scck);
|
|
dev_err(dev, "failed to get scck: %d\n", ret);
|
|
return ret;
|
|
}
|
|
|
|
v4l2_subdev_init(&csi2dc->csi2dc_sd, &csi2dc_subdev_ops);
|
|
|
|
csi2dc->csi2dc_sd.owner = THIS_MODULE;
|
|
csi2dc->csi2dc_sd.dev = dev;
|
|
snprintf(csi2dc->csi2dc_sd.name, sizeof(csi2dc->csi2dc_sd.name),
|
|
"csi2dc");
|
|
|
|
csi2dc->csi2dc_sd.flags |= V4L2_SUBDEV_FL_HAS_DEVNODE;
|
|
csi2dc->csi2dc_sd.entity.function = MEDIA_ENT_F_VID_IF_BRIDGE;
|
|
csi2dc->csi2dc_sd.entity.ops = &csi2dc_entity_ops;
|
|
|
|
platform_set_drvdata(pdev, csi2dc);
|
|
|
|
ret = csi2dc_of_parse(csi2dc, dev->of_node);
|
|
if (ret)
|
|
goto csi2dc_probe_cleanup_entity;
|
|
|
|
csi2dc->pads[CSI2DC_PAD_SINK].flags = MEDIA_PAD_FL_SINK;
|
|
if (csi2dc->video_pipe)
|
|
csi2dc->pads[CSI2DC_PAD_SOURCE].flags = MEDIA_PAD_FL_SOURCE;
|
|
|
|
ret = media_entity_pads_init(&csi2dc->csi2dc_sd.entity,
|
|
csi2dc->video_pipe ? CSI2DC_PADS_NUM : 1,
|
|
csi2dc->pads);
|
|
if (ret < 0) {
|
|
dev_err(dev, "media entity init failed\n");
|
|
goto csi2dc_probe_cleanup_notifier;
|
|
}
|
|
|
|
csi2dc_default_format(csi2dc);
|
|
|
|
/* turn power on to validate capabilities */
|
|
ret = csi2dc_power(csi2dc, true);
|
|
if (ret < 0)
|
|
goto csi2dc_probe_cleanup_notifier;
|
|
|
|
pm_runtime_set_active(dev);
|
|
pm_runtime_enable(dev);
|
|
ver = csi2dc_readl(csi2dc, CSI2DC_VERSION);
|
|
|
|
/*
|
|
* we must register the subdev after PM runtime has been requested,
|
|
* otherwise we might bound immediately and request pm_runtime_resume
|
|
* before runtime_enable.
|
|
*/
|
|
ret = v4l2_async_register_subdev(&csi2dc->csi2dc_sd);
|
|
if (ret) {
|
|
dev_err(csi2dc->dev, "failed to register the subdevice\n");
|
|
goto csi2dc_probe_cleanup_notifier;
|
|
}
|
|
|
|
dev_info(dev, "Microchip CSI2DC version %x\n", ver);
|
|
|
|
return 0;
|
|
|
|
csi2dc_probe_cleanup_notifier:
|
|
v4l2_async_nf_cleanup(&csi2dc->notifier);
|
|
csi2dc_probe_cleanup_entity:
|
|
media_entity_cleanup(&csi2dc->csi2dc_sd.entity);
|
|
|
|
return ret;
|
|
}
|
|
|
|
static void csi2dc_remove(struct platform_device *pdev)
|
|
{
|
|
struct csi2dc_device *csi2dc = platform_get_drvdata(pdev);
|
|
|
|
pm_runtime_disable(&pdev->dev);
|
|
|
|
v4l2_async_unregister_subdev(&csi2dc->csi2dc_sd);
|
|
v4l2_async_nf_unregister(&csi2dc->notifier);
|
|
v4l2_async_nf_cleanup(&csi2dc->notifier);
|
|
media_entity_cleanup(&csi2dc->csi2dc_sd.entity);
|
|
}
|
|
|
|
static int __maybe_unused csi2dc_runtime_suspend(struct device *dev)
|
|
{
|
|
struct csi2dc_device *csi2dc = dev_get_drvdata(dev);
|
|
|
|
return csi2dc_power(csi2dc, false);
|
|
}
|
|
|
|
static int __maybe_unused csi2dc_runtime_resume(struct device *dev)
|
|
{
|
|
struct csi2dc_device *csi2dc = dev_get_drvdata(dev);
|
|
|
|
return csi2dc_power(csi2dc, true);
|
|
}
|
|
|
|
static const struct dev_pm_ops csi2dc_dev_pm_ops = {
|
|
SET_RUNTIME_PM_OPS(csi2dc_runtime_suspend, csi2dc_runtime_resume, NULL)
|
|
};
|
|
|
|
static const struct of_device_id csi2dc_of_match[] = {
|
|
{ .compatible = "microchip,sama7g5-csi2dc" },
|
|
{ }
|
|
};
|
|
|
|
MODULE_DEVICE_TABLE(of, csi2dc_of_match);
|
|
|
|
static struct platform_driver csi2dc_driver = {
|
|
.probe = csi2dc_probe,
|
|
.remove_new = csi2dc_remove,
|
|
.driver = {
|
|
.name = "microchip-csi2dc",
|
|
.pm = &csi2dc_dev_pm_ops,
|
|
.of_match_table = of_match_ptr(csi2dc_of_match),
|
|
},
|
|
};
|
|
|
|
module_platform_driver(csi2dc_driver);
|
|
|
|
MODULE_AUTHOR("Eugen Hristev <eugen.hristev@microchip.com>");
|
|
MODULE_DESCRIPTION("Microchip CSI2 Demux Controller driver");
|
|
MODULE_LICENSE("GPL v2");
|