139 lines
3.5 KiB
C
139 lines
3.5 KiB
C
// SPDX-License-Identifier: GPL-2.0
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/*
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* Copyright (C) 2000 Steven J. Hill (sjhill@realitydiluted.com)
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* 2002-2006 Thomas Gleixner (tglx@linutronix.de)
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*
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* Credits:
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* David Woodhouse for adding multichip support
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*
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* Aleph One Ltd. and Toby Churchill Ltd. for supporting the
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* rework for 2K page size chips
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*
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* This file contains all ONFI helpers.
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*/
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#include <linux/slab.h>
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#include "internals.h"
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#define JEDEC_PARAM_PAGES 3
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/*
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* Check if the NAND chip is JEDEC compliant, returns 1 if it is, 0 otherwise.
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*/
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int nand_jedec_detect(struct nand_chip *chip)
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{
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struct nand_device *base = &chip->base;
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struct mtd_info *mtd = nand_to_mtd(chip);
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struct nand_memory_organization *memorg;
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struct nand_jedec_params *p;
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struct jedec_ecc_info *ecc;
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bool use_datain = false;
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int jedec_version = 0;
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char id[5];
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int i, val, ret;
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u16 crc;
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memorg = nanddev_get_memorg(&chip->base);
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/* Try JEDEC for unknown chip or LP */
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ret = nand_readid_op(chip, 0x40, id, sizeof(id));
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if (ret || strncmp(id, "JEDEC", sizeof(id)))
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return 0;
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/* JEDEC chip: allocate a buffer to hold its parameter page */
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p = kzalloc(sizeof(*p), GFP_KERNEL);
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if (!p)
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return -ENOMEM;
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if (!nand_has_exec_op(chip) || chip->controller->supported_op.data_only_read)
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use_datain = true;
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for (i = 0; i < JEDEC_PARAM_PAGES; i++) {
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if (!i)
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ret = nand_read_param_page_op(chip, 0x40, p,
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sizeof(*p));
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else if (use_datain)
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ret = nand_read_data_op(chip, p, sizeof(*p), true,
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false);
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else
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ret = nand_change_read_column_op(chip, sizeof(*p) * i,
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p, sizeof(*p), true);
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if (ret) {
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ret = 0;
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goto free_jedec_param_page;
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}
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crc = onfi_crc16(ONFI_CRC_BASE, (u8 *)p, 510);
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if (crc == le16_to_cpu(p->crc))
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break;
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}
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if (i == JEDEC_PARAM_PAGES) {
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pr_err("Could not find valid JEDEC parameter page; aborting\n");
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goto free_jedec_param_page;
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}
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/* Check version */
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val = le16_to_cpu(p->revision);
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if (val & (1 << 2))
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jedec_version = 10;
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else if (val & (1 << 1))
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jedec_version = 1; /* vendor specific version */
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if (!jedec_version) {
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pr_info("unsupported JEDEC version: %d\n", val);
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goto free_jedec_param_page;
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}
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sanitize_string(p->manufacturer, sizeof(p->manufacturer));
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sanitize_string(p->model, sizeof(p->model));
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chip->parameters.model = kstrdup(p->model, GFP_KERNEL);
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if (!chip->parameters.model) {
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ret = -ENOMEM;
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goto free_jedec_param_page;
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}
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memorg->pagesize = le32_to_cpu(p->byte_per_page);
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mtd->writesize = memorg->pagesize;
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/* Please reference to the comment for nand_flash_detect_onfi. */
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memorg->pages_per_eraseblock =
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1 << (fls(le32_to_cpu(p->pages_per_block)) - 1);
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mtd->erasesize = memorg->pages_per_eraseblock * memorg->pagesize;
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memorg->oobsize = le16_to_cpu(p->spare_bytes_per_page);
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mtd->oobsize = memorg->oobsize;
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memorg->luns_per_target = p->lun_count;
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memorg->planes_per_lun = 1 << p->multi_plane_addr;
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/* Please reference to the comment for nand_flash_detect_onfi. */
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memorg->eraseblocks_per_lun =
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1 << (fls(le32_to_cpu(p->blocks_per_lun)) - 1);
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memorg->bits_per_cell = p->bits_per_cell;
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if (le16_to_cpu(p->features) & JEDEC_FEATURE_16_BIT_BUS)
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chip->options |= NAND_BUSWIDTH_16;
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/* ECC info */
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ecc = &p->ecc_info[0];
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if (ecc->codeword_size >= 9) {
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struct nand_ecc_props requirements = {
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.strength = ecc->ecc_bits,
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.step_size = 1 << ecc->codeword_size,
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};
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nanddev_set_ecc_requirements(base, &requirements);
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} else {
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pr_warn("Invalid codeword size\n");
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}
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ret = 1;
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free_jedec_param_page:
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kfree(p);
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return ret;
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}
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