479 lines
13 KiB
C
479 lines
13 KiB
C
// SPDX-License-Identifier: GPL-2.0
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#include <linux/regmap.h>
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#include <net/dsa.h>
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#include "qca8k.h"
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#include "qca8k_leds.h"
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static u32 qca8k_phy_to_port(int phy)
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{
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/* Internal PHY 0 has port at index 1.
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* Internal PHY 1 has port at index 2.
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* Internal PHY 2 has port at index 3.
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* Internal PHY 3 has port at index 4.
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* Internal PHY 4 has port at index 5.
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*/
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return phy + 1;
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}
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static int
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qca8k_get_enable_led_reg(int port_num, int led_num, struct qca8k_led_pattern_en *reg_info)
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{
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switch (port_num) {
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case 0:
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reg_info->reg = QCA8K_LED_CTRL_REG(led_num);
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reg_info->shift = QCA8K_LED_PHY0123_CONTROL_RULE_SHIFT;
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break;
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case 1:
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case 2:
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case 3:
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/* Port 123 are controlled on a different reg */
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reg_info->reg = QCA8K_LED_CTRL3_REG;
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reg_info->shift = QCA8K_LED_PHY123_PATTERN_EN_SHIFT(port_num, led_num);
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break;
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case 4:
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reg_info->reg = QCA8K_LED_CTRL_REG(led_num);
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reg_info->shift = QCA8K_LED_PHY4_CONTROL_RULE_SHIFT;
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break;
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default:
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return -EINVAL;
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}
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return 0;
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}
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static int
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qca8k_get_control_led_reg(int port_num, int led_num, struct qca8k_led_pattern_en *reg_info)
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{
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reg_info->reg = QCA8K_LED_CTRL_REG(led_num);
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/* 6 total control rule:
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* 3 control rules for phy0-3 that applies to all their leds
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* 3 control rules for phy4
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*/
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if (port_num == 4)
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reg_info->shift = QCA8K_LED_PHY4_CONTROL_RULE_SHIFT;
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else
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reg_info->shift = QCA8K_LED_PHY0123_CONTROL_RULE_SHIFT;
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return 0;
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}
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static int
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qca8k_parse_netdev(unsigned long rules, u32 *offload_trigger)
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{
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/* Parsing specific to netdev trigger */
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if (test_bit(TRIGGER_NETDEV_TX, &rules))
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*offload_trigger |= QCA8K_LED_TX_BLINK_MASK;
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if (test_bit(TRIGGER_NETDEV_RX, &rules))
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*offload_trigger |= QCA8K_LED_RX_BLINK_MASK;
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if (test_bit(TRIGGER_NETDEV_LINK_10, &rules))
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*offload_trigger |= QCA8K_LED_LINK_10M_EN_MASK;
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if (test_bit(TRIGGER_NETDEV_LINK_100, &rules))
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*offload_trigger |= QCA8K_LED_LINK_100M_EN_MASK;
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if (test_bit(TRIGGER_NETDEV_LINK_1000, &rules))
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*offload_trigger |= QCA8K_LED_LINK_1000M_EN_MASK;
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if (test_bit(TRIGGER_NETDEV_HALF_DUPLEX, &rules))
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*offload_trigger |= QCA8K_LED_HALF_DUPLEX_MASK;
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if (test_bit(TRIGGER_NETDEV_FULL_DUPLEX, &rules))
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*offload_trigger |= QCA8K_LED_FULL_DUPLEX_MASK;
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if (rules && !*offload_trigger)
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return -EOPNOTSUPP;
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/* Enable some default rule by default to the requested mode:
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* - Blink at 4Hz by default
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*/
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*offload_trigger |= QCA8K_LED_BLINK_4HZ;
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return 0;
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}
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static int
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qca8k_led_brightness_set(struct qca8k_led *led,
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enum led_brightness brightness)
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{
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struct qca8k_led_pattern_en reg_info;
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struct qca8k_priv *priv = led->priv;
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u32 mask, val;
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qca8k_get_enable_led_reg(led->port_num, led->led_num, ®_info);
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val = QCA8K_LED_ALWAYS_OFF;
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if (brightness)
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val = QCA8K_LED_ALWAYS_ON;
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/* HW regs to control brightness is special and port 1-2-3
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* are placed in a different reg.
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*
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* To control port 0 brightness:
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* - the 2 bit (15, 14) of:
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* - QCA8K_LED_CTRL0_REG for led1
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* - QCA8K_LED_CTRL1_REG for led2
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* - QCA8K_LED_CTRL2_REG for led3
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*
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* To control port 4:
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* - the 2 bit (31, 30) of:
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* - QCA8K_LED_CTRL0_REG for led1
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* - QCA8K_LED_CTRL1_REG for led2
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* - QCA8K_LED_CTRL2_REG for led3
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*
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* To control port 1:
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* - the 2 bit at (9, 8) of QCA8K_LED_CTRL3_REG are used for led1
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* - the 2 bit at (11, 10) of QCA8K_LED_CTRL3_REG are used for led2
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* - the 2 bit at (13, 12) of QCA8K_LED_CTRL3_REG are used for led3
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*
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* To control port 2:
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* - the 2 bit at (15, 14) of QCA8K_LED_CTRL3_REG are used for led1
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* - the 2 bit at (17, 16) of QCA8K_LED_CTRL3_REG are used for led2
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* - the 2 bit at (19, 18) of QCA8K_LED_CTRL3_REG are used for led3
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*
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* To control port 3:
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* - the 2 bit at (21, 20) of QCA8K_LED_CTRL3_REG are used for led1
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* - the 2 bit at (23, 22) of QCA8K_LED_CTRL3_REG are used for led2
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* - the 2 bit at (25, 24) of QCA8K_LED_CTRL3_REG are used for led3
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*
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* To abstract this and have less code, we use the port and led numm
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* to calculate the shift and the correct reg due to this problem of
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* not having a 1:1 map of LED with the regs.
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*/
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if (led->port_num == 0 || led->port_num == 4) {
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mask = QCA8K_LED_PATTERN_EN_MASK;
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val <<= QCA8K_LED_PATTERN_EN_SHIFT;
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} else {
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mask = QCA8K_LED_PHY123_PATTERN_EN_MASK;
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}
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return regmap_update_bits(priv->regmap, reg_info.reg,
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mask << reg_info.shift,
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val << reg_info.shift);
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}
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static int
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qca8k_cled_brightness_set_blocking(struct led_classdev *ldev,
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enum led_brightness brightness)
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{
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struct qca8k_led *led = container_of(ldev, struct qca8k_led, cdev);
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return qca8k_led_brightness_set(led, brightness);
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}
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static enum led_brightness
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qca8k_led_brightness_get(struct qca8k_led *led)
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{
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struct qca8k_led_pattern_en reg_info;
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struct qca8k_priv *priv = led->priv;
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u32 val;
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int ret;
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qca8k_get_enable_led_reg(led->port_num, led->led_num, ®_info);
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ret = regmap_read(priv->regmap, reg_info.reg, &val);
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if (ret)
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return 0;
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val >>= reg_info.shift;
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if (led->port_num == 0 || led->port_num == 4) {
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val &= QCA8K_LED_PATTERN_EN_MASK;
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val >>= QCA8K_LED_PATTERN_EN_SHIFT;
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} else {
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val &= QCA8K_LED_PHY123_PATTERN_EN_MASK;
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}
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/* Assume brightness ON only when the LED is set to always ON */
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return val == QCA8K_LED_ALWAYS_ON;
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}
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static int
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qca8k_cled_blink_set(struct led_classdev *ldev,
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unsigned long *delay_on,
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unsigned long *delay_off)
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{
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struct qca8k_led *led = container_of(ldev, struct qca8k_led, cdev);
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u32 mask, val = QCA8K_LED_ALWAYS_BLINK_4HZ;
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struct qca8k_led_pattern_en reg_info;
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struct qca8k_priv *priv = led->priv;
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if (*delay_on == 0 && *delay_off == 0) {
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*delay_on = 125;
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*delay_off = 125;
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}
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if (*delay_on != 125 || *delay_off != 125) {
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/* The hardware only supports blinking at 4Hz. Fall back
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* to software implementation in other cases.
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*/
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return -EINVAL;
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}
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qca8k_get_enable_led_reg(led->port_num, led->led_num, ®_info);
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if (led->port_num == 0 || led->port_num == 4) {
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mask = QCA8K_LED_PATTERN_EN_MASK;
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val <<= QCA8K_LED_PATTERN_EN_SHIFT;
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} else {
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mask = QCA8K_LED_PHY123_PATTERN_EN_MASK;
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}
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regmap_update_bits(priv->regmap, reg_info.reg, mask << reg_info.shift,
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val << reg_info.shift);
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return 0;
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}
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static int
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qca8k_cled_trigger_offload(struct led_classdev *ldev, bool enable)
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{
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struct qca8k_led *led = container_of(ldev, struct qca8k_led, cdev);
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struct qca8k_led_pattern_en reg_info;
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struct qca8k_priv *priv = led->priv;
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u32 mask, val = QCA8K_LED_ALWAYS_OFF;
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qca8k_get_enable_led_reg(led->port_num, led->led_num, ®_info);
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if (enable)
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val = QCA8K_LED_RULE_CONTROLLED;
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if (led->port_num == 0 || led->port_num == 4) {
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mask = QCA8K_LED_PATTERN_EN_MASK;
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val <<= QCA8K_LED_PATTERN_EN_SHIFT;
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} else {
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mask = QCA8K_LED_PHY123_PATTERN_EN_MASK;
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}
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return regmap_update_bits(priv->regmap, reg_info.reg, mask << reg_info.shift,
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val << reg_info.shift);
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}
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static bool
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qca8k_cled_hw_control_status(struct led_classdev *ldev)
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{
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struct qca8k_led *led = container_of(ldev, struct qca8k_led, cdev);
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struct qca8k_led_pattern_en reg_info;
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struct qca8k_priv *priv = led->priv;
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u32 val;
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qca8k_get_enable_led_reg(led->port_num, led->led_num, ®_info);
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regmap_read(priv->regmap, reg_info.reg, &val);
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val >>= reg_info.shift;
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if (led->port_num == 0 || led->port_num == 4) {
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val &= QCA8K_LED_PATTERN_EN_MASK;
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val >>= QCA8K_LED_PATTERN_EN_SHIFT;
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} else {
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val &= QCA8K_LED_PHY123_PATTERN_EN_MASK;
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}
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return val == QCA8K_LED_RULE_CONTROLLED;
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}
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static int
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qca8k_cled_hw_control_is_supported(struct led_classdev *ldev, unsigned long rules)
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{
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u32 offload_trigger = 0;
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return qca8k_parse_netdev(rules, &offload_trigger);
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}
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static int
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qca8k_cled_hw_control_set(struct led_classdev *ldev, unsigned long rules)
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{
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struct qca8k_led *led = container_of(ldev, struct qca8k_led, cdev);
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struct qca8k_led_pattern_en reg_info;
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struct qca8k_priv *priv = led->priv;
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u32 offload_trigger = 0;
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int ret;
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ret = qca8k_parse_netdev(rules, &offload_trigger);
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if (ret)
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return ret;
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ret = qca8k_cled_trigger_offload(ldev, true);
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if (ret)
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return ret;
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qca8k_get_control_led_reg(led->port_num, led->led_num, ®_info);
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return regmap_update_bits(priv->regmap, reg_info.reg,
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QCA8K_LED_RULE_MASK << reg_info.shift,
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offload_trigger << reg_info.shift);
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}
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static int
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qca8k_cled_hw_control_get(struct led_classdev *ldev, unsigned long *rules)
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{
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struct qca8k_led *led = container_of(ldev, struct qca8k_led, cdev);
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struct qca8k_led_pattern_en reg_info;
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struct qca8k_priv *priv = led->priv;
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u32 val;
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int ret;
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/* With hw control not active return err */
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if (!qca8k_cled_hw_control_status(ldev))
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return -EINVAL;
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qca8k_get_control_led_reg(led->port_num, led->led_num, ®_info);
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ret = regmap_read(priv->regmap, reg_info.reg, &val);
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if (ret)
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return ret;
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val >>= reg_info.shift;
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val &= QCA8K_LED_RULE_MASK;
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/* Parsing specific to netdev trigger */
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if (val & QCA8K_LED_TX_BLINK_MASK)
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set_bit(TRIGGER_NETDEV_TX, rules);
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if (val & QCA8K_LED_RX_BLINK_MASK)
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set_bit(TRIGGER_NETDEV_RX, rules);
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if (val & QCA8K_LED_LINK_10M_EN_MASK)
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set_bit(TRIGGER_NETDEV_LINK_10, rules);
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if (val & QCA8K_LED_LINK_100M_EN_MASK)
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set_bit(TRIGGER_NETDEV_LINK_100, rules);
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if (val & QCA8K_LED_LINK_1000M_EN_MASK)
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set_bit(TRIGGER_NETDEV_LINK_1000, rules);
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if (val & QCA8K_LED_HALF_DUPLEX_MASK)
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set_bit(TRIGGER_NETDEV_HALF_DUPLEX, rules);
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if (val & QCA8K_LED_FULL_DUPLEX_MASK)
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set_bit(TRIGGER_NETDEV_FULL_DUPLEX, rules);
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return 0;
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}
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static struct device *qca8k_cled_hw_control_get_device(struct led_classdev *ldev)
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{
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struct qca8k_led *led = container_of(ldev, struct qca8k_led, cdev);
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struct qca8k_priv *priv = led->priv;
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struct dsa_port *dp;
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dp = dsa_to_port(priv->ds, qca8k_phy_to_port(led->port_num));
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if (!dp)
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return NULL;
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if (dp->slave)
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return &dp->slave->dev;
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return NULL;
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}
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static int
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qca8k_parse_port_leds(struct qca8k_priv *priv, struct fwnode_handle *port, int port_num)
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{
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struct fwnode_handle *led = NULL, *leds = NULL;
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struct led_init_data init_data = { };
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struct dsa_switch *ds = priv->ds;
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enum led_default_state state;
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struct qca8k_led *port_led;
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int led_num, led_index;
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int ret;
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leds = fwnode_get_named_child_node(port, "leds");
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if (!leds) {
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dev_dbg(priv->dev, "No Leds node specified in device tree for port %d!\n",
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port_num);
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return 0;
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}
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fwnode_for_each_child_node(leds, led) {
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/* Reg represent the led number of the port.
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* Each port can have at most 3 leds attached
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* Commonly:
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* 1. is gigabit led
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* 2. is mbit led
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* 3. additional status led
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*/
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if (fwnode_property_read_u32(led, "reg", &led_num))
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continue;
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if (led_num >= QCA8K_LED_PORT_COUNT) {
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dev_warn(priv->dev, "Invalid LED reg %d defined for port %d",
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led_num, port_num);
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continue;
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}
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led_index = QCA8K_LED_PORT_INDEX(port_num, led_num);
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port_led = &priv->ports_led[led_index];
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port_led->port_num = port_num;
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port_led->led_num = led_num;
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port_led->priv = priv;
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state = led_init_default_state_get(led);
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switch (state) {
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case LEDS_DEFSTATE_ON:
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port_led->cdev.brightness = 1;
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qca8k_led_brightness_set(port_led, 1);
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break;
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case LEDS_DEFSTATE_KEEP:
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port_led->cdev.brightness =
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qca8k_led_brightness_get(port_led);
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break;
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default:
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port_led->cdev.brightness = 0;
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qca8k_led_brightness_set(port_led, 0);
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}
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port_led->cdev.max_brightness = 1;
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port_led->cdev.brightness_set_blocking = qca8k_cled_brightness_set_blocking;
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port_led->cdev.blink_set = qca8k_cled_blink_set;
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port_led->cdev.hw_control_is_supported = qca8k_cled_hw_control_is_supported;
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port_led->cdev.hw_control_set = qca8k_cled_hw_control_set;
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port_led->cdev.hw_control_get = qca8k_cled_hw_control_get;
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port_led->cdev.hw_control_get_device = qca8k_cled_hw_control_get_device;
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port_led->cdev.hw_control_trigger = "netdev";
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init_data.default_label = ":port";
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init_data.fwnode = led;
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init_data.devname_mandatory = true;
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init_data.devicename = kasprintf(GFP_KERNEL, "%s:0%d", ds->slave_mii_bus->id,
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port_num);
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if (!init_data.devicename)
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return -ENOMEM;
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ret = devm_led_classdev_register_ext(priv->dev, &port_led->cdev, &init_data);
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if (ret)
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dev_warn(priv->dev, "Failed to init LED %d for port %d", led_num, port_num);
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kfree(init_data.devicename);
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}
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return 0;
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}
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int
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qca8k_setup_led_ctrl(struct qca8k_priv *priv)
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{
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struct fwnode_handle *ports, *port;
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int port_num;
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int ret;
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ports = device_get_named_child_node(priv->dev, "ports");
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if (!ports) {
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dev_info(priv->dev, "No ports node specified in device tree!");
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return 0;
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}
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fwnode_for_each_child_node(ports, port) {
|
|
if (fwnode_property_read_u32(port, "reg", &port_num))
|
|
continue;
|
|
|
|
/* Skip checking for CPU port 0 and CPU port 6 as not supported */
|
|
if (port_num == 0 || port_num == 6)
|
|
continue;
|
|
|
|
/* Each port can have at most 3 different leds attached.
|
|
* Switch port starts from 0 to 6, but port 0 and 6 are CPU
|
|
* port. The port index needs to be decreased by one to identify
|
|
* the correct port for LED setup.
|
|
*/
|
|
ret = qca8k_parse_port_leds(priv, port, qca8k_port_to_phy(port_num));
|
|
if (ret)
|
|
return ret;
|
|
}
|
|
|
|
return 0;
|
|
}
|