302 lines
10 KiB
C
302 lines
10 KiB
C
// SPDX-License-Identifier: GPL-2.0 OR BSD-3-Clause
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/*
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* Copyright (C) 2015-2017 Intel Deutschland GmbH
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* Copyright (C) 2018-2023 Intel Corporation
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*/
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#include <linux/module.h>
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#include <linux/stringify.h>
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#include "iwl-config.h"
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#include "iwl-prph.h"
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#include "fw/api/txq.h"
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/* Highest firmware API version supported */
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#define IWL_AX210_UCODE_API_MAX 83
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/* Lowest firmware API version supported */
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#define IWL_AX210_UCODE_API_MIN 59
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/* NVM versions */
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#define IWL_AX210_NVM_VERSION 0x0a1d
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/* Memory offsets and lengths */
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#define IWL_AX210_DCCM_OFFSET 0x800000 /* LMAC1 */
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#define IWL_AX210_DCCM_LEN 0x10000 /* LMAC1 */
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#define IWL_AX210_DCCM2_OFFSET 0x880000
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#define IWL_AX210_DCCM2_LEN 0x8000
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#define IWL_AX210_SMEM_OFFSET 0x400000
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#define IWL_AX210_SMEM_LEN 0xD0000
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#define IWL_SO_A_JF_B_FW_PRE "iwlwifi-so-a0-jf-b0"
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#define IWL_SO_A_HR_B_FW_PRE "iwlwifi-so-a0-hr-b0"
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#define IWL_SO_A_GF_A_FW_PRE "iwlwifi-so-a0-gf-a0"
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#define IWL_TY_A_GF_A_FW_PRE "iwlwifi-ty-a0-gf-a0"
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#define IWL_SO_A_GF4_A_FW_PRE "iwlwifi-so-a0-gf4-a0"
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#define IWL_SO_A_MR_A_FW_PRE "iwlwifi-so-a0-mr-a0"
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#define IWL_MA_A_HR_B_FW_PRE "iwlwifi-ma-a0-hr-b0"
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#define IWL_MA_A_GF_A_FW_PRE "iwlwifi-ma-a0-gf-a0"
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#define IWL_MA_A_GF4_A_FW_PRE "iwlwifi-ma-a0-gf4-a0"
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#define IWL_MA_A_MR_A_FW_PRE "iwlwifi-ma-a0-mr-a0"
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#define IWL_MA_B_HR_B_FW_PRE "iwlwifi-ma-b0-hr-b0"
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#define IWL_MA_B_GF_A_FW_PRE "iwlwifi-ma-b0-gf-a0"
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#define IWL_MA_B_GF4_A_FW_PRE "iwlwifi-ma-b0-gf4-a0"
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#define IWL_MA_B_MR_A_FW_PRE "iwlwifi-ma-b0-mr-a0"
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#define IWL_SO_A_JF_B_MODULE_FIRMWARE(api) \
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IWL_SO_A_JF_B_FW_PRE "-" __stringify(api) ".ucode"
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#define IWL_SO_A_HR_B_MODULE_FIRMWARE(api) \
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IWL_SO_A_HR_B_FW_PRE "-" __stringify(api) ".ucode"
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#define IWL_SO_A_GF_A_MODULE_FIRMWARE(api) \
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IWL_SO_A_GF_A_FW_PRE "-" __stringify(api) ".ucode"
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#define IWL_TY_A_GF_A_MODULE_FIRMWARE(api) \
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IWL_TY_A_GF_A_FW_PRE "-" __stringify(api) ".ucode"
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#define IWL_MA_A_HR_B_FW_MODULE_FIRMWARE(api) \
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IWL_MA_A_HR_B_FW_PRE "-" __stringify(api) ".ucode"
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#define IWL_MA_A_GF_A_FW_MODULE_FIRMWARE(api) \
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IWL_MA_A_GF_A_FW_PRE "-" __stringify(api) ".ucode"
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#define IWL_MA_A_GF4_A_FW_MODULE_FIRMWARE(api) \
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IWL_MA_A_GF4_A_FW_PRE "-" __stringify(api) ".ucode"
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#define IWL_MA_A_MR_A_FW_MODULE_FIRMWARE(api) \
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IWL_MA_A_MR_A_FW_PRE "-" __stringify(api) ".ucode"
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#define IWL_MA_B_HR_B_FW_MODULE_FIRMWARE(api) \
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IWL_MA_B_HR_B_FW_PRE "-" __stringify(api) ".ucode"
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#define IWL_MA_B_GF_A_FW_MODULE_FIRMWARE(api) \
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IWL_MA_B_GF_A_FW_PRE "-" __stringify(api) ".ucode"
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#define IWL_MA_B_GF4_A_FW_MODULE_FIRMWARE(api) \
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IWL_MA_B_GF4_A_FW_PRE "-" __stringify(api) ".ucode"
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#define IWL_MA_B_MR_A_FW_MODULE_FIRMWARE(api) \
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IWL_MA_B_MR_A_FW_PRE "-" __stringify(api) ".ucode"
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static const struct iwl_base_params iwl_ax210_base_params = {
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.eeprom_size = OTP_LOW_IMAGE_SIZE_32K,
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.num_of_queues = 512,
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.max_tfd_queue_size = 65536,
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.shadow_ram_support = true,
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.led_compensation = 57,
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.wd_timeout = IWL_LONG_WD_TIMEOUT,
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.max_event_log_size = 512,
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.shadow_reg_enable = true,
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.pcie_l1_allowed = true,
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};
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#define IWL_DEVICE_AX210_COMMON \
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.ucode_api_min = IWL_AX210_UCODE_API_MIN, \
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.led_mode = IWL_LED_RF_STATE, \
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.nvm_hw_section_num = 10, \
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.non_shared_ant = ANT_B, \
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.dccm_offset = IWL_AX210_DCCM_OFFSET, \
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.dccm_len = IWL_AX210_DCCM_LEN, \
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.dccm2_offset = IWL_AX210_DCCM2_OFFSET, \
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.dccm2_len = IWL_AX210_DCCM2_LEN, \
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.smem_offset = IWL_AX210_SMEM_OFFSET, \
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.smem_len = IWL_AX210_SMEM_LEN, \
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.features = IWL_TX_CSUM_NETIF_FLAGS | NETIF_F_RXCSUM, \
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.apmg_not_supported = true, \
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.trans.mq_rx_supported = true, \
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.vht_mu_mimo_supported = true, \
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.mac_addr_from_csr = 0x380, \
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.ht_params = &iwl_22000_ht_params, \
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.nvm_ver = IWL_AX210_NVM_VERSION, \
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.trans.rf_id = true, \
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.trans.gen2 = true, \
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.nvm_type = IWL_NVM_EXT, \
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.dbgc_supported = true, \
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.min_umac_error_event_table = 0x400000, \
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.d3_debug_data_base_addr = 0x401000, \
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.d3_debug_data_length = 60 * 1024, \
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.mon_smem_regs = { \
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.write_ptr = { \
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.addr = LDBG_M2S_BUF_WPTR, \
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.mask = LDBG_M2S_BUF_WPTR_VAL_MSK, \
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}, \
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.cycle_cnt = { \
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.addr = LDBG_M2S_BUF_WRAP_CNT, \
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.mask = LDBG_M2S_BUF_WRAP_CNT_VAL_MSK, \
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}, \
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}
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#define IWL_DEVICE_AX210 \
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IWL_DEVICE_AX210_COMMON, \
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.ucode_api_max = IWL_AX210_UCODE_API_MAX, \
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.trans.umac_prph_offset = 0x300000, \
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.trans.device_family = IWL_DEVICE_FAMILY_AX210, \
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.trans.base_params = &iwl_ax210_base_params, \
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.min_txq_size = 128, \
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.gp2_reg_addr = 0xd02c68, \
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.min_ba_txq_size = IWL_DEFAULT_QUEUE_SIZE_HE, \
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.mon_dram_regs = { \
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.write_ptr = { \
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.addr = DBGC_CUR_DBGBUF_STATUS, \
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.mask = DBGC_CUR_DBGBUF_STATUS_OFFSET_MSK, \
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}, \
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.cycle_cnt = { \
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.addr = DBGC_DBGBUF_WRAP_AROUND, \
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.mask = 0xffffffff, \
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}, \
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.cur_frag = { \
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.addr = DBGC_CUR_DBGBUF_STATUS, \
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.mask = DBGC_CUR_DBGBUF_STATUS_IDX_MSK, \
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}, \
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}
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const struct iwl_cfg_trans_params iwl_so_trans_cfg = {
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.mq_rx_supported = true,
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.rf_id = true,
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.gen2 = true,
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.device_family = IWL_DEVICE_FAMILY_AX210,
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.base_params = &iwl_ax210_base_params,
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.umac_prph_offset = 0x300000,
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.integrated = true,
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/* TODO: the following values need to be checked */
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.xtal_latency = 500,
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.ltr_delay = IWL_CFG_TRANS_LTR_DELAY_200US,
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};
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const struct iwl_cfg_trans_params iwl_so_long_latency_trans_cfg = {
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.mq_rx_supported = true,
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.rf_id = true,
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.gen2 = true,
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.device_family = IWL_DEVICE_FAMILY_AX210,
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.base_params = &iwl_ax210_base_params,
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.umac_prph_offset = 0x300000,
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.integrated = true,
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.low_latency_xtal = true,
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.xtal_latency = 12000,
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.ltr_delay = IWL_CFG_TRANS_LTR_DELAY_2500US,
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};
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const struct iwl_cfg_trans_params iwl_so_long_latency_imr_trans_cfg = {
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.mq_rx_supported = true,
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.rf_id = true,
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.gen2 = true,
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.device_family = IWL_DEVICE_FAMILY_AX210,
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.base_params = &iwl_ax210_base_params,
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.umac_prph_offset = 0x300000,
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.integrated = true,
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.low_latency_xtal = true,
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.xtal_latency = 12000,
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.ltr_delay = IWL_CFG_TRANS_LTR_DELAY_2500US,
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.imr_enabled = true,
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};
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/*
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* If the device doesn't support HE, no need to have that many buffers.
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* AX210 devices can split multiple frames into a single RB, so fewer are
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* needed; AX210 cannot (but use smaller RBs by default) - these sizes
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* were picked according to 8 MSDUs inside 256 A-MSDUs in an A-MPDU, with
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* additional overhead to account for processing time.
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*/
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#define IWL_NUM_RBDS_NON_HE 512
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#define IWL_NUM_RBDS_AX210_HE 4096
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const struct iwl_cfg_trans_params iwl_ma_trans_cfg = {
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.device_family = IWL_DEVICE_FAMILY_AX210,
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.base_params = &iwl_ax210_base_params,
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.mq_rx_supported = true,
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.rf_id = true,
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.gen2 = true,
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.integrated = true,
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.umac_prph_offset = 0x300000
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};
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const char iwl_ax211_name[] = "Intel(R) Wi-Fi 6E AX211 160MHz";
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const char iwl_ax221_name[] = "Intel(R) Wi-Fi 6E AX221 160MHz";
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const char iwl_ax231_name[] = "Intel(R) Wi-Fi 6E AX231 160MHz";
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const char iwl_ax411_name[] = "Intel(R) Wi-Fi 6E AX411 160MHz";
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const char iwl_ax210_killer_1675w_name[] =
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"Killer(R) Wi-Fi 6E AX1675w 160MHz Wireless Network Adapter (210D2W)";
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const char iwl_ax210_killer_1675x_name[] =
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"Killer(R) Wi-Fi 6E AX1675x 160MHz Wireless Network Adapter (210NGW)";
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const char iwl_ax211_killer_1675s_name[] =
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"Killer(R) Wi-Fi 6E AX1675s 160MHz Wireless Network Adapter (211NGW)";
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const char iwl_ax211_killer_1675i_name[] =
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"Killer(R) Wi-Fi 6E AX1675i 160MHz Wireless Network Adapter (211NGW)";
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const char iwl_ax411_killer_1690s_name[] =
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"Killer(R) Wi-Fi 6E AX1690s 160MHz Wireless Network Adapter (411D2W)";
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const char iwl_ax411_killer_1690i_name[] =
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"Killer(R) Wi-Fi 6E AX1690i 160MHz Wireless Network Adapter (411NGW)";
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const struct iwl_cfg iwlax210_2ax_cfg_so_jf_b0 = {
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.name = "Intel(R) Wireless-AC 9560 160MHz",
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.fw_name_pre = IWL_SO_A_JF_B_FW_PRE,
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IWL_DEVICE_AX210,
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.num_rbds = IWL_NUM_RBDS_NON_HE,
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};
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const struct iwl_cfg iwlax211_2ax_cfg_so_gf_a0 = {
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.name = iwl_ax211_name,
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.fw_name_pre = IWL_SO_A_GF_A_FW_PRE,
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.uhb_supported = true,
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IWL_DEVICE_AX210,
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.num_rbds = IWL_NUM_RBDS_AX210_HE,
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};
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const struct iwl_cfg iwlax211_2ax_cfg_so_gf_a0_long = {
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.name = iwl_ax211_name,
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.fw_name_pre = IWL_SO_A_GF_A_FW_PRE,
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.uhb_supported = true,
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IWL_DEVICE_AX210,
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.num_rbds = IWL_NUM_RBDS_AX210_HE,
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.trans.xtal_latency = 12000,
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.trans.low_latency_xtal = true,
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};
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const struct iwl_cfg iwlax210_2ax_cfg_ty_gf_a0 = {
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.name = "Intel(R) Wi-Fi 6 AX210 160MHz",
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.fw_name_pre = IWL_TY_A_GF_A_FW_PRE,
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.uhb_supported = true,
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IWL_DEVICE_AX210,
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.num_rbds = IWL_NUM_RBDS_AX210_HE,
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};
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const struct iwl_cfg iwlax411_2ax_cfg_so_gf4_a0 = {
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.name = iwl_ax411_name,
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.fw_name_pre = IWL_SO_A_GF4_A_FW_PRE,
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.uhb_supported = true,
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IWL_DEVICE_AX210,
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.num_rbds = IWL_NUM_RBDS_AX210_HE,
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};
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const struct iwl_cfg iwlax411_2ax_cfg_so_gf4_a0_long = {
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.name = iwl_ax411_name,
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.fw_name_pre = IWL_SO_A_GF4_A_FW_PRE,
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.uhb_supported = true,
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IWL_DEVICE_AX210,
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.num_rbds = IWL_NUM_RBDS_AX210_HE,
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.trans.xtal_latency = 12000,
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.trans.low_latency_xtal = true,
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};
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const struct iwl_cfg iwl_cfg_so_a0_ms_a0 = {
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.fw_name_pre = IWL_SO_A_MR_A_FW_PRE,
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.uhb_supported = false,
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IWL_DEVICE_AX210,
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.num_rbds = IWL_NUM_RBDS_AX210_HE,
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};
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const struct iwl_cfg iwl_cfg_ma = {
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.fw_name_mac = "ma",
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.uhb_supported = true,
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IWL_DEVICE_AX210,
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.num_rbds = IWL_NUM_RBDS_AX210_HE,
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};
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const struct iwl_cfg iwl_cfg_so_a0_hr_a0 = {
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.fw_name_pre = IWL_SO_A_HR_B_FW_PRE,
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IWL_DEVICE_AX210,
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.num_rbds = IWL_NUM_RBDS_AX210_HE,
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};
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MODULE_FIRMWARE(IWL_SO_A_JF_B_MODULE_FIRMWARE(IWL_AX210_UCODE_API_MAX));
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MODULE_FIRMWARE(IWL_SO_A_HR_B_MODULE_FIRMWARE(IWL_AX210_UCODE_API_MAX));
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MODULE_FIRMWARE(IWL_SO_A_GF_A_MODULE_FIRMWARE(IWL_AX210_UCODE_API_MAX));
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MODULE_FIRMWARE(IWL_TY_A_GF_A_MODULE_FIRMWARE(IWL_AX210_UCODE_API_MAX));
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MODULE_FIRMWARE(IWL_MA_A_HR_B_FW_MODULE_FIRMWARE(IWL_AX210_UCODE_API_MAX));
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MODULE_FIRMWARE(IWL_MA_A_GF_A_FW_MODULE_FIRMWARE(IWL_AX210_UCODE_API_MAX));
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MODULE_FIRMWARE(IWL_MA_A_GF4_A_FW_MODULE_FIRMWARE(IWL_AX210_UCODE_API_MAX));
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MODULE_FIRMWARE(IWL_MA_A_MR_A_FW_MODULE_FIRMWARE(IWL_AX210_UCODE_API_MAX));
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MODULE_FIRMWARE(IWL_MA_B_HR_B_FW_MODULE_FIRMWARE(IWL_AX210_UCODE_API_MAX));
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MODULE_FIRMWARE(IWL_MA_B_GF_A_FW_MODULE_FIRMWARE(IWL_AX210_UCODE_API_MAX));
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MODULE_FIRMWARE(IWL_MA_B_GF4_A_FW_MODULE_FIRMWARE(IWL_AX210_UCODE_API_MAX));
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MODULE_FIRMWARE(IWL_MA_B_MR_A_FW_MODULE_FIRMWARE(IWL_AX210_UCODE_API_MAX));
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