77 lines
1.5 KiB
C
77 lines
1.5 KiB
C
/* SPDX-License-Identifier: GPL-2.0 OR BSD-3-Clause */
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/* Copyright(c) 2022-2023 Realtek Corporation
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*/
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#ifndef __RTW89_8851B_H__
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#define __RTW89_8851B_H__
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#include "core.h"
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#define RF_PATH_NUM_8851B 1
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#define BB_PATH_NUM_8851B 1
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struct rtw8851bu_efuse {
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u8 rsvd[0x88];
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u8 mac_addr[ETH_ALEN];
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};
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struct rtw8851be_efuse {
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u8 mac_addr[ETH_ALEN];
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};
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struct rtw8851b_tssi_offset {
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u8 cck_tssi[TSSI_CCK_CH_GROUP_NUM];
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u8 bw40_tssi[TSSI_MCS_2G_CH_GROUP_NUM];
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u8 rsvd[7];
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u8 bw40_1s_tssi_5g[TSSI_MCS_5G_CH_GROUP_NUM];
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} __packed;
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struct rtw8851b_efuse {
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u8 rsvd[0x210];
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struct rtw8851b_tssi_offset path_a_tssi;
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u8 rsvd1[136];
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u8 channel_plan;
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u8 xtal_k;
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u8 rsvd2;
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u8 iqk_lck;
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u8 rsvd3[8];
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u8 eeprom_version;
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u8 customer_id;
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u8 tx_bb_swing_2g;
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u8 tx_bb_swing_5g;
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u8 tx_cali_pwr_trk_mode;
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u8 trx_path_selection;
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u8 rfe_type;
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u8 country_code[2];
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u8 rsvd4[3];
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u8 path_a_therm;
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u8 rsvd5[3];
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u8 rx_gain_2g_ofdm;
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u8 rsvd6;
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u8 rx_gain_2g_cck;
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u8 rsvd7;
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u8 rx_gain_5g_low;
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u8 rsvd8;
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u8 rx_gain_5g_mid;
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u8 rsvd9;
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u8 rx_gain_5g_high;
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u8 rsvd10[35];
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u8 path_a_cck_pwr_idx[6];
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u8 path_a_bw40_1tx_pwr_idx[5];
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u8 path_a_ofdm_1tx_pwr_idx_diff:4;
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u8 path_a_bw20_1tx_pwr_idx_diff:4;
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u8 path_a_bw20_2tx_pwr_idx_diff:4;
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u8 path_a_bw40_2tx_pwr_idx_diff:4;
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u8 path_a_cck_2tx_pwr_idx_diff:4;
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u8 path_a_ofdm_2tx_pwr_idx_diff:4;
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u8 rsvd11[0xf2];
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union {
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struct rtw8851bu_efuse u;
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struct rtw8851be_efuse e;
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};
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} __packed;
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extern const struct rtw89_chip_info rtw8851b_chip_info;
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#endif
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