513 lines
17 KiB
C
513 lines
17 KiB
C
/* SPDX-License-Identifier: GPL-2.0 */
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/*
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* This header is for implementations of dma_map_ops and related code.
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* It should not be included in drivers just using the DMA API.
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*/
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#ifndef _LINUX_DMA_MAP_OPS_H
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#define _LINUX_DMA_MAP_OPS_H
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#include <linux/dma-mapping.h>
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#include <linux/pgtable.h>
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#include <linux/slab.h>
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struct cma;
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/*
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* Values for struct dma_map_ops.flags:
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*
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* DMA_F_PCI_P2PDMA_SUPPORTED: Indicates the dma_map_ops implementation can
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* handle PCI P2PDMA pages in the map_sg/unmap_sg operation.
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*/
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#define DMA_F_PCI_P2PDMA_SUPPORTED (1 << 0)
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struct dma_map_ops {
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unsigned int flags;
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void *(*alloc)(struct device *dev, size_t size,
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dma_addr_t *dma_handle, gfp_t gfp,
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unsigned long attrs);
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void (*free)(struct device *dev, size_t size, void *vaddr,
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dma_addr_t dma_handle, unsigned long attrs);
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struct page *(*alloc_pages)(struct device *dev, size_t size,
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dma_addr_t *dma_handle, enum dma_data_direction dir,
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gfp_t gfp);
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void (*free_pages)(struct device *dev, size_t size, struct page *vaddr,
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dma_addr_t dma_handle, enum dma_data_direction dir);
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struct sg_table *(*alloc_noncontiguous)(struct device *dev, size_t size,
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enum dma_data_direction dir, gfp_t gfp,
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unsigned long attrs);
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void (*free_noncontiguous)(struct device *dev, size_t size,
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struct sg_table *sgt, enum dma_data_direction dir);
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int (*mmap)(struct device *, struct vm_area_struct *,
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void *, dma_addr_t, size_t, unsigned long attrs);
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int (*get_sgtable)(struct device *dev, struct sg_table *sgt,
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void *cpu_addr, dma_addr_t dma_addr, size_t size,
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unsigned long attrs);
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dma_addr_t (*map_page)(struct device *dev, struct page *page,
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unsigned long offset, size_t size,
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enum dma_data_direction dir, unsigned long attrs);
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void (*unmap_page)(struct device *dev, dma_addr_t dma_handle,
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size_t size, enum dma_data_direction dir,
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unsigned long attrs);
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/*
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* map_sg should return a negative error code on error. See
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* dma_map_sgtable() for a list of appropriate error codes
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* and their meanings.
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*/
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int (*map_sg)(struct device *dev, struct scatterlist *sg, int nents,
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enum dma_data_direction dir, unsigned long attrs);
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void (*unmap_sg)(struct device *dev, struct scatterlist *sg, int nents,
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enum dma_data_direction dir, unsigned long attrs);
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dma_addr_t (*map_resource)(struct device *dev, phys_addr_t phys_addr,
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size_t size, enum dma_data_direction dir,
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unsigned long attrs);
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void (*unmap_resource)(struct device *dev, dma_addr_t dma_handle,
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size_t size, enum dma_data_direction dir,
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unsigned long attrs);
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void (*sync_single_for_cpu)(struct device *dev, dma_addr_t dma_handle,
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size_t size, enum dma_data_direction dir);
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void (*sync_single_for_device)(struct device *dev,
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dma_addr_t dma_handle, size_t size,
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enum dma_data_direction dir);
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void (*sync_sg_for_cpu)(struct device *dev, struct scatterlist *sg,
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int nents, enum dma_data_direction dir);
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void (*sync_sg_for_device)(struct device *dev, struct scatterlist *sg,
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int nents, enum dma_data_direction dir);
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void (*cache_sync)(struct device *dev, void *vaddr, size_t size,
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enum dma_data_direction direction);
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int (*dma_supported)(struct device *dev, u64 mask);
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u64 (*get_required_mask)(struct device *dev);
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size_t (*max_mapping_size)(struct device *dev);
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size_t (*opt_mapping_size)(void);
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unsigned long (*get_merge_boundary)(struct device *dev);
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};
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#ifdef CONFIG_DMA_OPS
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#include <asm/dma-mapping.h>
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static inline const struct dma_map_ops *get_dma_ops(struct device *dev)
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{
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if (dev->dma_ops)
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return dev->dma_ops;
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return get_arch_dma_ops();
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}
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static inline void set_dma_ops(struct device *dev,
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const struct dma_map_ops *dma_ops)
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{
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dev->dma_ops = dma_ops;
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}
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#else /* CONFIG_DMA_OPS */
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static inline const struct dma_map_ops *get_dma_ops(struct device *dev)
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{
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return NULL;
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}
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static inline void set_dma_ops(struct device *dev,
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const struct dma_map_ops *dma_ops)
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{
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}
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#endif /* CONFIG_DMA_OPS */
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#ifdef CONFIG_DMA_CMA
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extern struct cma *dma_contiguous_default_area;
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static inline struct cma *dev_get_cma_area(struct device *dev)
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{
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if (dev && dev->cma_area)
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return dev->cma_area;
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return dma_contiguous_default_area;
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}
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void dma_contiguous_reserve(phys_addr_t addr_limit);
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int __init dma_contiguous_reserve_area(phys_addr_t size, phys_addr_t base,
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phys_addr_t limit, struct cma **res_cma, bool fixed);
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struct page *dma_alloc_from_contiguous(struct device *dev, size_t count,
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unsigned int order, bool no_warn);
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bool dma_release_from_contiguous(struct device *dev, struct page *pages,
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int count);
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struct page *dma_alloc_contiguous(struct device *dev, size_t size, gfp_t gfp);
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void dma_free_contiguous(struct device *dev, struct page *page, size_t size);
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void dma_contiguous_early_fixup(phys_addr_t base, unsigned long size);
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#else /* CONFIG_DMA_CMA */
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static inline struct cma *dev_get_cma_area(struct device *dev)
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{
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return NULL;
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}
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static inline void dma_contiguous_reserve(phys_addr_t limit)
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{
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}
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static inline int dma_contiguous_reserve_area(phys_addr_t size,
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phys_addr_t base, phys_addr_t limit, struct cma **res_cma,
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bool fixed)
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{
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return -ENOSYS;
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}
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static inline struct page *dma_alloc_from_contiguous(struct device *dev,
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size_t count, unsigned int order, bool no_warn)
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{
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return NULL;
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}
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static inline bool dma_release_from_contiguous(struct device *dev,
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struct page *pages, int count)
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{
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return false;
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}
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/* Use fallback alloc() and free() when CONFIG_DMA_CMA=n */
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static inline struct page *dma_alloc_contiguous(struct device *dev, size_t size,
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gfp_t gfp)
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{
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return NULL;
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}
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static inline void dma_free_contiguous(struct device *dev, struct page *page,
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size_t size)
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{
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__free_pages(page, get_order(size));
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}
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#endif /* CONFIG_DMA_CMA*/
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#ifdef CONFIG_DMA_PERNUMA_CMA
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void dma_pernuma_cma_reserve(void);
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#else
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static inline void dma_pernuma_cma_reserve(void) { }
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#endif /* CONFIG_DMA_PERNUMA_CMA */
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#ifdef CONFIG_DMA_DECLARE_COHERENT
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int dma_declare_coherent_memory(struct device *dev, phys_addr_t phys_addr,
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dma_addr_t device_addr, size_t size);
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void dma_release_coherent_memory(struct device *dev);
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int dma_alloc_from_dev_coherent(struct device *dev, ssize_t size,
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dma_addr_t *dma_handle, void **ret);
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int dma_release_from_dev_coherent(struct device *dev, int order, void *vaddr);
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int dma_mmap_from_dev_coherent(struct device *dev, struct vm_area_struct *vma,
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void *cpu_addr, size_t size, int *ret);
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#else
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static inline int dma_declare_coherent_memory(struct device *dev,
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phys_addr_t phys_addr, dma_addr_t device_addr, size_t size)
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{
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return -ENOSYS;
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}
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#define dma_alloc_from_dev_coherent(dev, size, handle, ret) (0)
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#define dma_release_from_dev_coherent(dev, order, vaddr) (0)
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#define dma_mmap_from_dev_coherent(dev, vma, vaddr, order, ret) (0)
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static inline void dma_release_coherent_memory(struct device *dev) { }
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#endif /* CONFIG_DMA_DECLARE_COHERENT */
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#ifdef CONFIG_DMA_GLOBAL_POOL
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void *dma_alloc_from_global_coherent(struct device *dev, ssize_t size,
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dma_addr_t *dma_handle);
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int dma_release_from_global_coherent(int order, void *vaddr);
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int dma_mmap_from_global_coherent(struct vm_area_struct *vma, void *cpu_addr,
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size_t size, int *ret);
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int dma_init_global_coherent(phys_addr_t phys_addr, size_t size);
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#else
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static inline void *dma_alloc_from_global_coherent(struct device *dev,
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ssize_t size, dma_addr_t *dma_handle)
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{
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return NULL;
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}
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static inline int dma_release_from_global_coherent(int order, void *vaddr)
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{
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return 0;
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}
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static inline int dma_mmap_from_global_coherent(struct vm_area_struct *vma,
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void *cpu_addr, size_t size, int *ret)
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{
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return 0;
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}
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#endif /* CONFIG_DMA_GLOBAL_POOL */
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/*
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* This is the actual return value from the ->alloc_noncontiguous method.
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* The users of the DMA API should only care about the sg_table, but to make
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* the DMA-API internal vmaping and freeing easier we stash away the page
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* array as well (except for the fallback case). This can go away any time,
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* e.g. when a vmap-variant that takes a scatterlist comes along.
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*/
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struct dma_sgt_handle {
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struct sg_table sgt;
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struct page **pages;
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};
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#define sgt_handle(sgt) \
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container_of((sgt), struct dma_sgt_handle, sgt)
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int dma_common_get_sgtable(struct device *dev, struct sg_table *sgt,
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void *cpu_addr, dma_addr_t dma_addr, size_t size,
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unsigned long attrs);
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int dma_common_mmap(struct device *dev, struct vm_area_struct *vma,
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void *cpu_addr, dma_addr_t dma_addr, size_t size,
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unsigned long attrs);
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struct page *dma_common_alloc_pages(struct device *dev, size_t size,
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dma_addr_t *dma_handle, enum dma_data_direction dir, gfp_t gfp);
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void dma_common_free_pages(struct device *dev, size_t size, struct page *vaddr,
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dma_addr_t dma_handle, enum dma_data_direction dir);
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struct page **dma_common_find_pages(void *cpu_addr);
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void *dma_common_contiguous_remap(struct page *page, size_t size, pgprot_t prot,
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const void *caller);
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void *dma_common_pages_remap(struct page **pages, size_t size, pgprot_t prot,
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const void *caller);
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void dma_common_free_remap(void *cpu_addr, size_t size);
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struct page *dma_alloc_from_pool(struct device *dev, size_t size,
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void **cpu_addr, gfp_t flags,
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bool (*phys_addr_ok)(struct device *, phys_addr_t, size_t));
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bool dma_free_from_pool(struct device *dev, void *start, size_t size);
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int dma_direct_set_offset(struct device *dev, phys_addr_t cpu_start,
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dma_addr_t dma_start, u64 size);
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#if defined(CONFIG_ARCH_HAS_SYNC_DMA_FOR_DEVICE) || \
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defined(CONFIG_ARCH_HAS_SYNC_DMA_FOR_CPU) || \
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defined(CONFIG_ARCH_HAS_SYNC_DMA_FOR_CPU_ALL)
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extern bool dma_default_coherent;
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static inline bool dev_is_dma_coherent(struct device *dev)
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{
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return dev->dma_coherent;
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}
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#else
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#define dma_default_coherent true
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static inline bool dev_is_dma_coherent(struct device *dev)
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{
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return true;
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}
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#endif /* CONFIG_ARCH_HAS_DMA_COHERENCE_H */
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/*
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* Check whether potential kmalloc() buffers are safe for non-coherent DMA.
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*/
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static inline bool dma_kmalloc_safe(struct device *dev,
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enum dma_data_direction dir)
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{
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/*
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* If DMA bouncing of kmalloc() buffers is disabled, the kmalloc()
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* caches have already been aligned to a DMA-safe size.
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*/
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if (!IS_ENABLED(CONFIG_DMA_BOUNCE_UNALIGNED_KMALLOC))
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return true;
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/*
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* kmalloc() buffers are DMA-safe irrespective of size if the device
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* is coherent or the direction is DMA_TO_DEVICE (non-desctructive
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* cache maintenance and benign cache line evictions).
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*/
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if (dev_is_dma_coherent(dev) || dir == DMA_TO_DEVICE)
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return true;
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return false;
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}
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/*
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* Check whether the given size, assuming it is for a kmalloc()'ed buffer, is
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* sufficiently aligned for non-coherent DMA.
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*/
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static inline bool dma_kmalloc_size_aligned(size_t size)
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{
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/*
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* Larger kmalloc() sizes are guaranteed to be aligned to
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* ARCH_DMA_MINALIGN.
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*/
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if (size >= 2 * ARCH_DMA_MINALIGN ||
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IS_ALIGNED(kmalloc_size_roundup(size), dma_get_cache_alignment()))
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return true;
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return false;
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}
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/*
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* Check whether the given object size may have originated from a kmalloc()
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* buffer with a slab alignment below the DMA-safe alignment and needs
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* bouncing for non-coherent DMA. The pointer alignment is not considered and
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* in-structure DMA-safe offsets are the responsibility of the caller. Such
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* code should use the static ARCH_DMA_MINALIGN for compiler annotations.
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*
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* The heuristics can have false positives, bouncing unnecessarily, though the
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* buffers would be small. False negatives are theoretically possible if, for
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* example, multiple small kmalloc() buffers are coalesced into a larger
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* buffer that passes the alignment check. There are no such known constructs
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* in the kernel.
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*/
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static inline bool dma_kmalloc_needs_bounce(struct device *dev, size_t size,
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enum dma_data_direction dir)
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{
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return !dma_kmalloc_safe(dev, dir) && !dma_kmalloc_size_aligned(size);
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}
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void *arch_dma_alloc(struct device *dev, size_t size, dma_addr_t *dma_handle,
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gfp_t gfp, unsigned long attrs);
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void arch_dma_free(struct device *dev, size_t size, void *cpu_addr,
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dma_addr_t dma_addr, unsigned long attrs);
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#ifdef CONFIG_MMU
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/*
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* Page protection so that devices that can't snoop CPU caches can use the
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* memory coherently. We default to pgprot_noncached which is usually used
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* for ioremap as a safe bet, but architectures can override this with less
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* strict semantics if possible.
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*/
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#ifndef pgprot_dmacoherent
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#define pgprot_dmacoherent(prot) pgprot_noncached(prot)
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#endif
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pgprot_t dma_pgprot(struct device *dev, pgprot_t prot, unsigned long attrs);
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#else
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static inline pgprot_t dma_pgprot(struct device *dev, pgprot_t prot,
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unsigned long attrs)
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{
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return prot; /* no protection bits supported without page tables */
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}
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#endif /* CONFIG_MMU */
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#ifdef CONFIG_ARCH_HAS_SYNC_DMA_FOR_DEVICE
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void arch_sync_dma_for_device(phys_addr_t paddr, size_t size,
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enum dma_data_direction dir);
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#else
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static inline void arch_sync_dma_for_device(phys_addr_t paddr, size_t size,
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enum dma_data_direction dir)
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{
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}
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#endif /* ARCH_HAS_SYNC_DMA_FOR_DEVICE */
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#ifdef CONFIG_ARCH_HAS_SYNC_DMA_FOR_CPU
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void arch_sync_dma_for_cpu(phys_addr_t paddr, size_t size,
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enum dma_data_direction dir);
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#else
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static inline void arch_sync_dma_for_cpu(phys_addr_t paddr, size_t size,
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enum dma_data_direction dir)
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{
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}
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#endif /* ARCH_HAS_SYNC_DMA_FOR_CPU */
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#ifdef CONFIG_ARCH_HAS_SYNC_DMA_FOR_CPU_ALL
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void arch_sync_dma_for_cpu_all(void);
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#else
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static inline void arch_sync_dma_for_cpu_all(void)
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{
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}
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#endif /* CONFIG_ARCH_HAS_SYNC_DMA_FOR_CPU_ALL */
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#ifdef CONFIG_ARCH_HAS_DMA_PREP_COHERENT
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void arch_dma_prep_coherent(struct page *page, size_t size);
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#else
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static inline void arch_dma_prep_coherent(struct page *page, size_t size)
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{
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}
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#endif /* CONFIG_ARCH_HAS_DMA_PREP_COHERENT */
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#ifdef CONFIG_ARCH_HAS_DMA_MARK_CLEAN
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void arch_dma_mark_clean(phys_addr_t paddr, size_t size);
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#else
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static inline void arch_dma_mark_clean(phys_addr_t paddr, size_t size)
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{
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}
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#endif /* ARCH_HAS_DMA_MARK_CLEAN */
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void *arch_dma_set_uncached(void *addr, size_t size);
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void arch_dma_clear_uncached(void *addr, size_t size);
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#ifdef CONFIG_ARCH_HAS_DMA_MAP_DIRECT
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bool arch_dma_map_page_direct(struct device *dev, phys_addr_t addr);
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bool arch_dma_unmap_page_direct(struct device *dev, dma_addr_t dma_handle);
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bool arch_dma_map_sg_direct(struct device *dev, struct scatterlist *sg,
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int nents);
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bool arch_dma_unmap_sg_direct(struct device *dev, struct scatterlist *sg,
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int nents);
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#else
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#define arch_dma_map_page_direct(d, a) (false)
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#define arch_dma_unmap_page_direct(d, a) (false)
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#define arch_dma_map_sg_direct(d, s, n) (false)
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#define arch_dma_unmap_sg_direct(d, s, n) (false)
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#endif
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#ifdef CONFIG_ARCH_HAS_SETUP_DMA_OPS
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void arch_setup_dma_ops(struct device *dev, u64 dma_base, u64 size,
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const struct iommu_ops *iommu, bool coherent);
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#else
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static inline void arch_setup_dma_ops(struct device *dev, u64 dma_base,
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u64 size, const struct iommu_ops *iommu, bool coherent)
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{
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}
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#endif /* CONFIG_ARCH_HAS_SETUP_DMA_OPS */
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#ifdef CONFIG_ARCH_HAS_TEARDOWN_DMA_OPS
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void arch_teardown_dma_ops(struct device *dev);
|
|
#else
|
|
static inline void arch_teardown_dma_ops(struct device *dev)
|
|
{
|
|
}
|
|
#endif /* CONFIG_ARCH_HAS_TEARDOWN_DMA_OPS */
|
|
|
|
#ifdef CONFIG_DMA_API_DEBUG
|
|
void dma_debug_add_bus(struct bus_type *bus);
|
|
void debug_dma_dump_mappings(struct device *dev);
|
|
#else
|
|
static inline void dma_debug_add_bus(struct bus_type *bus)
|
|
{
|
|
}
|
|
static inline void debug_dma_dump_mappings(struct device *dev)
|
|
{
|
|
}
|
|
#endif /* CONFIG_DMA_API_DEBUG */
|
|
|
|
extern const struct dma_map_ops dma_dummy_ops;
|
|
|
|
enum pci_p2pdma_map_type {
|
|
/*
|
|
* PCI_P2PDMA_MAP_UNKNOWN: Used internally for indicating the mapping
|
|
* type hasn't been calculated yet. Functions that return this enum
|
|
* never return this value.
|
|
*/
|
|
PCI_P2PDMA_MAP_UNKNOWN = 0,
|
|
|
|
/*
|
|
* PCI_P2PDMA_MAP_NOT_SUPPORTED: Indicates the transaction will
|
|
* traverse the host bridge and the host bridge is not in the
|
|
* allowlist. DMA Mapping routines should return an error when
|
|
* this is returned.
|
|
*/
|
|
PCI_P2PDMA_MAP_NOT_SUPPORTED,
|
|
|
|
/*
|
|
* PCI_P2PDMA_BUS_ADDR: Indicates that two devices can talk to
|
|
* each other directly through a PCI switch and the transaction will
|
|
* not traverse the host bridge. Such a mapping should program
|
|
* the DMA engine with PCI bus addresses.
|
|
*/
|
|
PCI_P2PDMA_MAP_BUS_ADDR,
|
|
|
|
/*
|
|
* PCI_P2PDMA_MAP_THRU_HOST_BRIDGE: Indicates two devices can talk
|
|
* to each other, but the transaction traverses a host bridge on the
|
|
* allowlist. In this case, a normal mapping either with CPU physical
|
|
* addresses (in the case of dma-direct) or IOVA addresses (in the
|
|
* case of IOMMUs) should be used to program the DMA engine.
|
|
*/
|
|
PCI_P2PDMA_MAP_THRU_HOST_BRIDGE,
|
|
};
|
|
|
|
struct pci_p2pdma_map_state {
|
|
struct dev_pagemap *pgmap;
|
|
int map;
|
|
u64 bus_off;
|
|
};
|
|
|
|
#ifdef CONFIG_PCI_P2PDMA
|
|
enum pci_p2pdma_map_type
|
|
pci_p2pdma_map_segment(struct pci_p2pdma_map_state *state, struct device *dev,
|
|
struct scatterlist *sg);
|
|
#else /* CONFIG_PCI_P2PDMA */
|
|
static inline enum pci_p2pdma_map_type
|
|
pci_p2pdma_map_segment(struct pci_p2pdma_map_state *state, struct device *dev,
|
|
struct scatterlist *sg)
|
|
{
|
|
return PCI_P2PDMA_MAP_NOT_SUPPORTED;
|
|
}
|
|
#endif /* CONFIG_PCI_P2PDMA */
|
|
|
|
#endif /* _LINUX_DMA_MAP_OPS_H */
|