255 lines
6.4 KiB
C
255 lines
6.4 KiB
C
// SPDX-License-Identifier: GPL-2.0-only
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/*
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* Copyright (c) 2020 The Linux Foundation. All rights reserved.
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*
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* lpass-hdmi.c -- ALSA SoC HDMI-CPU DAI driver for QTi LPASS HDMI
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*/
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#include <linux/kernel.h>
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#include <linux/module.h>
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#include <sound/pcm_params.h>
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#include <linux/regmap.h>
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#include <sound/soc.h>
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#include <sound/soc-dai.h>
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#include <dt-bindings/sound/sc7180-lpass.h>
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#include "lpass-lpaif-reg.h"
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#include "lpass.h"
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static int lpass_hdmi_daiops_hw_params(struct snd_pcm_substream *substream,
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struct snd_pcm_hw_params *params, struct snd_soc_dai *dai)
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{
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struct lpass_data *drvdata = snd_soc_dai_get_drvdata(dai);
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snd_pcm_format_t format = params_format(params);
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unsigned int rate = params_rate(params);
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unsigned int channels = params_channels(params);
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unsigned int ret;
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int bitwidth;
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unsigned int word_length;
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unsigned int ch_sts_buf0;
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unsigned int ch_sts_buf1;
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unsigned int data_format;
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unsigned int sampling_freq;
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unsigned int ch = 0;
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struct lpass_dp_metadata_ctl *meta_ctl = drvdata->meta_ctl;
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struct lpass_sstream_ctl *sstream_ctl = drvdata->sstream_ctl;
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bitwidth = snd_pcm_format_width(format);
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if (bitwidth < 0) {
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dev_err(dai->dev, "%s invalid bit width given : %d\n",
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__func__, bitwidth);
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return bitwidth;
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}
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switch (bitwidth) {
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case 16:
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word_length = LPASS_DP_AUDIO_BITWIDTH16;
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break;
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case 24:
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word_length = LPASS_DP_AUDIO_BITWIDTH24;
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break;
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default:
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dev_err(dai->dev, "%s invalid bit width given : %d\n",
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__func__, bitwidth);
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return -EINVAL;
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}
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switch (rate) {
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case 32000:
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sampling_freq = LPASS_SAMPLING_FREQ32;
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break;
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case 44100:
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sampling_freq = LPASS_SAMPLING_FREQ44;
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break;
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case 48000:
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sampling_freq = LPASS_SAMPLING_FREQ48;
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break;
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default:
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dev_err(dai->dev, "%s invalid bit width given : %d\n",
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__func__, bitwidth);
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return -EINVAL;
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}
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data_format = LPASS_DATA_FORMAT_LINEAR;
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ch_sts_buf0 = (((data_format << LPASS_DATA_FORMAT_SHIFT) & LPASS_DATA_FORMAT_MASK)
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| ((sampling_freq << LPASS_FREQ_BIT_SHIFT) & LPASS_FREQ_BIT_MASK));
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ch_sts_buf1 = (word_length) & LPASS_WORDLENGTH_MASK;
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ret = regmap_field_write(drvdata->tx_ctl->soft_reset, LPASS_TX_CTL_RESET);
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if (ret)
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return ret;
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ret = regmap_field_write(drvdata->tx_ctl->soft_reset, LPASS_TX_CTL_CLEAR);
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if (ret)
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return ret;
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ret = regmap_field_write(drvdata->hdmitx_legacy_en, LPASS_HDMITX_LEGACY_DISABLE);
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if (ret)
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return ret;
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ret = regmap_field_write(drvdata->hdmitx_parity_calc_en, HDMITX_PARITY_CALC_EN);
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if (ret)
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return ret;
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ret = regmap_field_write(drvdata->vbit_ctl->replace_vbit, REPLACE_VBIT);
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if (ret)
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return ret;
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ret = regmap_field_write(drvdata->vbit_ctl->vbit_stream, LINEAR_PCM_DATA);
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if (ret)
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return ret;
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ret = regmap_field_write(drvdata->hdmitx_ch_msb[0], ch_sts_buf1);
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if (ret)
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return ret;
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ret = regmap_field_write(drvdata->hdmitx_ch_lsb[0], ch_sts_buf0);
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if (ret)
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return ret;
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ret = regmap_field_write(drvdata->hdmi_tx_dmactl[0]->use_hw_chs, HW_MODE);
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if (ret)
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return ret;
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ret = regmap_field_write(drvdata->hdmi_tx_dmactl[0]->hw_chs_sel, SW_MODE);
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if (ret)
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return ret;
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ret = regmap_field_write(drvdata->hdmi_tx_dmactl[0]->use_hw_usr, HW_MODE);
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if (ret)
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return ret;
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ret = regmap_field_write(drvdata->hdmi_tx_dmactl[0]->hw_usr_sel, SW_MODE);
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if (ret)
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return ret;
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ret = regmap_field_write(meta_ctl->mute, LPASS_MUTE_ENABLE);
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if (ret)
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return ret;
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ret = regmap_field_write(meta_ctl->as_sdp_cc, channels - 1);
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if (ret)
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return ret;
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ret = regmap_field_write(meta_ctl->as_sdp_ct, LPASS_META_DEFAULT_VAL);
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if (ret)
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return ret;
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ret = regmap_field_write(meta_ctl->aif_db4, LPASS_META_DEFAULT_VAL);
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if (ret)
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return ret;
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ret = regmap_field_write(meta_ctl->frequency, sampling_freq);
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if (ret)
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return ret;
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ret = regmap_field_write(meta_ctl->mst_index, LPASS_META_DEFAULT_VAL);
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if (ret)
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return ret;
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ret = regmap_field_write(meta_ctl->dptx_index, LPASS_META_DEFAULT_VAL);
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if (ret)
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return ret;
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ret = regmap_field_write(sstream_ctl->sstream_en, LPASS_SSTREAM_DISABLE);
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if (ret)
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return ret;
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ret = regmap_field_write(sstream_ctl->dma_sel, ch);
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if (ret)
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return ret;
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ret = regmap_field_write(sstream_ctl->auto_bbit_en, LPASS_SSTREAM_DEFAULT_ENABLE);
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if (ret)
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return ret;
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ret = regmap_field_write(sstream_ctl->layout, LPASS_SSTREAM_DEFAULT_DISABLE);
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if (ret)
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return ret;
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ret = regmap_field_write(sstream_ctl->layout_sp, LPASS_LAYOUT_SP_DEFAULT);
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if (ret)
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return ret;
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ret = regmap_field_write(sstream_ctl->dp_audio, LPASS_SSTREAM_DEFAULT_ENABLE);
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if (ret)
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return ret;
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ret = regmap_field_write(sstream_ctl->set_sp_on_en, LPASS_SSTREAM_DEFAULT_ENABLE);
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if (ret)
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return ret;
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ret = regmap_field_write(sstream_ctl->dp_sp_b_hw_en, LPASS_SSTREAM_DEFAULT_ENABLE);
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if (ret)
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return ret;
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ret = regmap_field_write(sstream_ctl->dp_staffing_en, LPASS_SSTREAM_DEFAULT_ENABLE);
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return ret;
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}
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static int lpass_hdmi_daiops_prepare(struct snd_pcm_substream *substream,
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struct snd_soc_dai *dai)
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{
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int ret;
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struct lpass_data *drvdata = snd_soc_dai_get_drvdata(dai);
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ret = regmap_field_write(drvdata->sstream_ctl->sstream_en, LPASS_SSTREAM_ENABLE);
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if (ret)
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return ret;
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ret = regmap_field_write(drvdata->meta_ctl->mute, LPASS_MUTE_DISABLE);
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return ret;
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}
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static int lpass_hdmi_daiops_trigger(struct snd_pcm_substream *substream,
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int cmd, struct snd_soc_dai *dai)
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{
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struct lpass_data *drvdata = snd_soc_dai_get_drvdata(dai);
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struct lpass_dp_metadata_ctl *meta_ctl = drvdata->meta_ctl;
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struct lpass_sstream_ctl *sstream_ctl = drvdata->sstream_ctl;
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int ret = -EINVAL;
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switch (cmd) {
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case SNDRV_PCM_TRIGGER_START:
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case SNDRV_PCM_TRIGGER_RESUME:
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case SNDRV_PCM_TRIGGER_PAUSE_RELEASE:
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ret = regmap_field_write(sstream_ctl->sstream_en, LPASS_SSTREAM_ENABLE);
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if (ret)
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return ret;
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ret = regmap_field_write(meta_ctl->mute, LPASS_MUTE_DISABLE);
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if (ret)
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return ret;
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break;
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case SNDRV_PCM_TRIGGER_STOP:
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case SNDRV_PCM_TRIGGER_SUSPEND:
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case SNDRV_PCM_TRIGGER_PAUSE_PUSH:
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ret = regmap_field_write(sstream_ctl->sstream_en, LPASS_SSTREAM_DISABLE);
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if (ret)
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return ret;
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ret = regmap_field_write(meta_ctl->mute, LPASS_MUTE_ENABLE);
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if (ret)
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return ret;
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ret = regmap_field_write(sstream_ctl->dp_audio, 0);
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if (ret)
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return ret;
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break;
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}
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return ret;
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}
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const struct snd_soc_dai_ops asoc_qcom_lpass_hdmi_dai_ops = {
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.hw_params = lpass_hdmi_daiops_hw_params,
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.prepare = lpass_hdmi_daiops_prepare,
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.trigger = lpass_hdmi_daiops_trigger,
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};
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EXPORT_SYMBOL_GPL(asoc_qcom_lpass_hdmi_dai_ops);
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MODULE_DESCRIPTION("QTi LPASS HDMI Driver");
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MODULE_LICENSE("GPL v2");
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