171 lines
3.5 KiB
YAML
171 lines
3.5 KiB
YAML
# SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause
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%YAML 1.2
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---
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$id: http://devicetree.org/schemas/net/nfc/marvell,nci.yaml#
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$schema: http://devicetree.org/meta-schemas/core.yaml#
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title: Marvell International Ltd. NCI NFC controller
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maintainers:
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- Krzysztof Kozlowski <krzk@kernel.org>
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properties:
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compatible:
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enum:
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- marvell,nfc-i2c
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- marvell,nfc-spi
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- marvell,nfc-uart
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hci-muxed:
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type: boolean
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description: |
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Specifies that the chip is muxing NCI over HCI frames
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interrupts:
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maxItems: 1
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reg:
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maxItems: 1
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reset-n-io:
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$ref: "/schemas/types.yaml#/definitions/phandle-array"
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maxItems: 1
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description: |
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Output GPIO pin used to reset the chip (active low)
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i2c-int-falling:
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type: boolean
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description: |
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For I2C type of connection. Specifies that the chip read event shall be
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trigged on falling edge.
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i2c-int-rising:
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type: boolean
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description: |
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For I2C type of connection. Specifies that the chip read event shall be
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trigged on rising edge.
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break-control:
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type: boolean
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description: |
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For UART type of connection. Specifies that the chip needs specific break
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management.
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flow-control:
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type: boolean
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description: |
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For UART type of connection. Specifies that the chip is using RTS/CTS.
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spi-cpha: true
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spi-cpol: true
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required:
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- compatible
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allOf:
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- if:
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properties:
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compatible:
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contains:
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const: marvell,nfc-i2c
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then:
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properties:
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break-control: false
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flow-control: false
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spi-cpha: false
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spi-cpol: false
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spi-max-frequency: false
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required:
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- reg
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- if:
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properties:
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compatible:
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contains:
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const: marvell,nfc-spi
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then:
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$ref: /schemas/spi/spi-peripheral-props.yaml#
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properties:
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break-control: false
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flow-control: false
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i2c-int-falling: false
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i2c-int-rising: false
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required:
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- reg
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- if:
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properties:
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compatible:
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contains:
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const: marvell,nfc-uart
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then:
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properties:
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i2c-int-falling: false
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i2c-int-rising: false
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interrupts: false
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spi-cpha: false
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spi-cpol: false
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spi-max-frequency: false
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reg: false
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unevaluatedProperties: false
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examples:
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- |
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#include <dt-bindings/gpio/gpio.h>
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#include <dt-bindings/interrupt-controller/irq.h>
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i2c {
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#address-cells = <1>;
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#size-cells = <0>;
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nfc@8 {
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compatible = "marvell,nfc-i2c";
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reg = <0x8>;
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interrupt-parent = <&gpio3>;
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interrupts = <21 IRQ_TYPE_EDGE_RISING>;
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i2c-int-rising;
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reset-n-io = <&gpio3 19 GPIO_ACTIVE_LOW>;
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};
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};
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- |
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#include <dt-bindings/gpio/gpio.h>
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#include <dt-bindings/interrupt-controller/irq.h>
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spi {
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#address-cells = <1>;
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#size-cells = <0>;
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nfc@0 {
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compatible = "marvell,nfc-spi";
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reg = <0>;
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spi-max-frequency = <3000000>;
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spi-cpha;
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spi-cpol;
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interrupt-parent = <&gpio1>;
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interrupts = <17 IRQ_TYPE_EDGE_RISING>;
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reset-n-io = <&gpio3 19 GPIO_ACTIVE_LOW>;
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};
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};
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- |
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#include <dt-bindings/gpio/gpio.h>
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uart {
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nfc {
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compatible = "marvell,nfc-uart";
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reset-n-io = <&gpio3 16 GPIO_ACTIVE_LOW>;
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hci-muxed;
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flow-control;
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};
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};
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