57 lines
1.2 KiB
YAML
57 lines
1.2 KiB
YAML
# SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
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# Copyright 2019 BayLibre, SAS
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%YAML 1.2
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---
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$id: "http://devicetree.org/schemas/reset/amlogic,meson-axg-audio-arb.yaml#"
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$schema: "http://devicetree.org/meta-schemas/core.yaml#"
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title: Amlogic audio memory arbiter controller
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maintainers:
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- Jerome Brunet <jbrunet@baylibre.com>
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description: The Amlogic Audio ARB is a simple device which enables or disables
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the access of Audio FIFOs to DDR on AXG based SoC.
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properties:
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compatible:
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enum:
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- amlogic,meson-axg-audio-arb
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- amlogic,meson-sm1-audio-arb
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reg:
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maxItems: 1
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clocks:
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maxItems: 1
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description: |
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phandle to the fifo peripheral clock provided by the audio clock
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controller.
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"#reset-cells":
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const: 1
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required:
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- compatible
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- reg
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- clocks
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- "#reset-cells"
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additionalProperties: false
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examples:
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- |
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// on the A113 SoC:
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#include <dt-bindings/clock/axg-audio-clkc.h>
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bus {
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#address-cells = <2>;
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#size-cells = <2>;
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arb: reset-controller@280 {
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compatible = "amlogic,meson-axg-audio-arb";
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reg = <0x0 0x280 0x0 0x4>;
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#reset-cells = <1>;
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clocks = <&clkc_audio AUD_CLKID_DDR_ARB>;
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};
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};
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