462 lines
12 KiB
ReStructuredText
462 lines
12 KiB
ReStructuredText
================================
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Devres - Managed Device Resource
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================================
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Tejun Heo <teheo@suse.de>
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First draft 10 January 2007
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.. contents
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1. Intro : Huh? Devres?
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2. Devres : Devres in a nutshell
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3. Devres Group : Group devres'es and release them together
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4. Details : Life time rules, calling context, ...
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5. Overhead : How much do we have to pay for this?
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6. List of managed interfaces: Currently implemented managed interfaces
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1. Intro
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--------
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devres came up while trying to convert libata to use iomap. Each
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iomapped address should be kept and unmapped on driver detach. For
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example, a plain SFF ATA controller (that is, good old PCI IDE) in
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native mode makes use of 5 PCI BARs and all of them should be
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maintained.
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As with many other device drivers, libata low level drivers have
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sufficient bugs in ->remove and ->probe failure path. Well, yes,
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that's probably because libata low level driver developers are lazy
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bunch, but aren't all low level driver developers? After spending a
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day fiddling with braindamaged hardware with no document or
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braindamaged document, if it's finally working, well, it's working.
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For one reason or another, low level drivers don't receive as much
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attention or testing as core code, and bugs on driver detach or
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initialization failure don't happen often enough to be noticeable.
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Init failure path is worse because it's much less travelled while
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needs to handle multiple entry points.
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So, many low level drivers end up leaking resources on driver detach
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and having half broken failure path implementation in ->probe() which
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would leak resources or even cause oops when failure occurs. iomap
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adds more to this mix. So do msi and msix.
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2. Devres
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---------
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devres is basically linked list of arbitrarily sized memory areas
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associated with a struct device. Each devres entry is associated with
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a release function. A devres can be released in several ways. No
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matter what, all devres entries are released on driver detach. On
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release, the associated release function is invoked and then the
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devres entry is freed.
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Managed interface is created for resources commonly used by device
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drivers using devres. For example, coherent DMA memory is acquired
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using dma_alloc_coherent(). The managed version is called
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dmam_alloc_coherent(). It is identical to dma_alloc_coherent() except
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for the DMA memory allocated using it is managed and will be
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automatically released on driver detach. Implementation looks like
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the following::
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struct dma_devres {
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size_t size;
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void *vaddr;
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dma_addr_t dma_handle;
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};
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static void dmam_coherent_release(struct device *dev, void *res)
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{
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struct dma_devres *this = res;
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dma_free_coherent(dev, this->size, this->vaddr, this->dma_handle);
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}
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dmam_alloc_coherent(dev, size, dma_handle, gfp)
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{
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struct dma_devres *dr;
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void *vaddr;
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dr = devres_alloc(dmam_coherent_release, sizeof(*dr), gfp);
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...
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/* alloc DMA memory as usual */
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vaddr = dma_alloc_coherent(...);
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...
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/* record size, vaddr, dma_handle in dr */
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dr->vaddr = vaddr;
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...
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devres_add(dev, dr);
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return vaddr;
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}
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If a driver uses dmam_alloc_coherent(), the area is guaranteed to be
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freed whether initialization fails half-way or the device gets
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detached. If most resources are acquired using managed interface, a
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driver can have much simpler init and exit code. Init path basically
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looks like the following::
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my_init_one()
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{
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struct mydev *d;
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d = devm_kzalloc(dev, sizeof(*d), GFP_KERNEL);
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if (!d)
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return -ENOMEM;
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d->ring = dmam_alloc_coherent(...);
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if (!d->ring)
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return -ENOMEM;
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if (check something)
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return -EINVAL;
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...
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return register_to_upper_layer(d);
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}
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And exit path::
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my_remove_one()
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{
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unregister_from_upper_layer(d);
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shutdown_my_hardware();
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}
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As shown above, low level drivers can be simplified a lot by using
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devres. Complexity is shifted from less maintained low level drivers
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to better maintained higher layer. Also, as init failure path is
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shared with exit path, both can get more testing.
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Note though that when converting current calls or assignments to
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managed devm_* versions it is up to you to check if internal operations
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like allocating memory, have failed. Managed resources pertains to the
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freeing of these resources *only* - all other checks needed are still
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on you. In some cases this may mean introducing checks that were not
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necessary before moving to the managed devm_* calls.
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3. Devres group
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---------------
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Devres entries can be grouped using devres group. When a group is
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released, all contained normal devres entries and properly nested
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groups are released. One usage is to rollback series of acquired
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resources on failure. For example::
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if (!devres_open_group(dev, NULL, GFP_KERNEL))
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return -ENOMEM;
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acquire A;
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if (failed)
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goto err;
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acquire B;
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if (failed)
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goto err;
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...
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devres_remove_group(dev, NULL);
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return 0;
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err:
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devres_release_group(dev, NULL);
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return err_code;
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As resource acquisition failure usually means probe failure, constructs
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like above are usually useful in midlayer driver (e.g. libata core
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layer) where interface function shouldn't have side effect on failure.
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For LLDs, just returning error code suffices in most cases.
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Each group is identified by `void *id`. It can either be explicitly
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specified by @id argument to devres_open_group() or automatically
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created by passing NULL as @id as in the above example. In both
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cases, devres_open_group() returns the group's id. The returned id
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can be passed to other devres functions to select the target group.
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If NULL is given to those functions, the latest open group is
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selected.
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For example, you can do something like the following::
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int my_midlayer_create_something()
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{
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if (!devres_open_group(dev, my_midlayer_create_something, GFP_KERNEL))
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return -ENOMEM;
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...
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devres_close_group(dev, my_midlayer_create_something);
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return 0;
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}
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void my_midlayer_destroy_something()
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{
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devres_release_group(dev, my_midlayer_create_something);
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}
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4. Details
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----------
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Lifetime of a devres entry begins on devres allocation and finishes
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when it is released or destroyed (removed and freed) - no reference
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counting.
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devres core guarantees atomicity to all basic devres operations and
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has support for single-instance devres types (atomic
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lookup-and-add-if-not-found). Other than that, synchronizing
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concurrent accesses to allocated devres data is caller's
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responsibility. This is usually non-issue because bus ops and
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resource allocations already do the job.
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For an example of single-instance devres type, read pcim_iomap_table()
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in lib/devres.c.
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All devres interface functions can be called without context if the
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right gfp mask is given.
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5. Overhead
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-----------
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Each devres bookkeeping info is allocated together with requested data
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area. With debug option turned off, bookkeeping info occupies 16
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bytes on 32bit machines and 24 bytes on 64bit (three pointers rounded
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up to ull alignment). If singly linked list is used, it can be
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reduced to two pointers (8 bytes on 32bit, 16 bytes on 64bit).
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Each devres group occupies 8 pointers. It can be reduced to 6 if
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singly linked list is used.
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Memory space overhead on ahci controller with two ports is between 300
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and 400 bytes on 32bit machine after naive conversion (we can
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certainly invest a bit more effort into libata core layer).
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6. List of managed interfaces
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-----------------------------
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CLOCK
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devm_clk_get()
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devm_clk_get_optional()
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devm_clk_put()
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devm_clk_bulk_get()
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devm_clk_bulk_get_all()
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devm_clk_bulk_get_optional()
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devm_get_clk_from_child()
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devm_clk_hw_register()
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devm_of_clk_add_hw_provider()
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devm_clk_hw_register_clkdev()
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DMA
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dmaenginem_async_device_register()
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dmam_alloc_coherent()
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dmam_alloc_attrs()
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dmam_free_coherent()
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dmam_pool_create()
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dmam_pool_destroy()
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DRM
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devm_drm_dev_alloc()
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GPIO
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devm_gpiod_get()
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devm_gpiod_get_array()
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devm_gpiod_get_array_optional()
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devm_gpiod_get_index()
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devm_gpiod_get_index_optional()
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devm_gpiod_get_optional()
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devm_gpiod_put()
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devm_gpiod_unhinge()
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devm_gpiochip_add_data()
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devm_gpio_request()
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devm_gpio_request_one()
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I2C
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devm_i2c_add_adapter()
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devm_i2c_new_dummy_device()
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IIO
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devm_iio_device_alloc()
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devm_iio_device_register()
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devm_iio_dmaengine_buffer_setup()
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devm_iio_kfifo_buffer_setup()
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devm_iio_kfifo_buffer_setup_ext()
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devm_iio_map_array_register()
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devm_iio_triggered_buffer_setup()
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devm_iio_triggered_buffer_setup_ext()
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devm_iio_trigger_alloc()
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devm_iio_trigger_register()
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devm_iio_channel_get()
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devm_iio_channel_get_all()
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devm_iio_hw_consumer_alloc()
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devm_fwnode_iio_channel_get_by_name()
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INPUT
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devm_input_allocate_device()
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IO region
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devm_release_mem_region()
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devm_release_region()
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devm_release_resource()
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devm_request_mem_region()
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devm_request_free_mem_region()
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devm_request_region()
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devm_request_resource()
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IOMAP
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devm_ioport_map()
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devm_ioport_unmap()
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devm_ioremap()
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devm_ioremap_uc()
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devm_ioremap_wc()
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devm_ioremap_resource() : checks resource, requests memory region, ioremaps
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devm_ioremap_resource_wc()
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devm_platform_ioremap_resource() : calls devm_ioremap_resource() for platform device
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devm_platform_ioremap_resource_byname()
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devm_platform_get_and_ioremap_resource()
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devm_iounmap()
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pcim_iomap()
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pcim_iomap_regions() : do request_region() and iomap() on multiple BARs
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pcim_iomap_table() : array of mapped addresses indexed by BAR
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pcim_iounmap()
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IRQ
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devm_free_irq()
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devm_request_any_context_irq()
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devm_request_irq()
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devm_request_threaded_irq()
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devm_irq_alloc_descs()
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devm_irq_alloc_desc()
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devm_irq_alloc_desc_at()
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devm_irq_alloc_desc_from()
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devm_irq_alloc_descs_from()
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devm_irq_alloc_generic_chip()
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devm_irq_setup_generic_chip()
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devm_irq_domain_create_sim()
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LED
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devm_led_classdev_register()
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devm_led_classdev_register_ext()
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devm_led_classdev_unregister()
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devm_led_trigger_register()
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devm_of_led_get()
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MDIO
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devm_mdiobus_alloc()
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devm_mdiobus_alloc_size()
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devm_mdiobus_register()
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devm_of_mdiobus_register()
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MEM
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devm_free_pages()
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devm_get_free_pages()
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devm_kasprintf()
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devm_kcalloc()
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devm_kfree()
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devm_kmalloc()
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devm_kmalloc_array()
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devm_kmemdup()
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devm_krealloc()
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devm_kstrdup()
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devm_kstrdup_const()
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devm_kvasprintf()
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devm_kzalloc()
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MFD
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devm_mfd_add_devices()
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MUX
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devm_mux_chip_alloc()
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devm_mux_chip_register()
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devm_mux_control_get()
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devm_mux_state_get()
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NET
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devm_alloc_etherdev()
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devm_alloc_etherdev_mqs()
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devm_register_netdev()
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PER-CPU MEM
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devm_alloc_percpu()
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devm_free_percpu()
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PCI
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devm_pci_alloc_host_bridge() : managed PCI host bridge allocation
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devm_pci_remap_cfgspace() : ioremap PCI configuration space
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devm_pci_remap_cfg_resource() : ioremap PCI configuration space resource
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pcim_enable_device() : after success, all PCI ops become managed
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pcim_pin_device() : keep PCI device enabled after release
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PHY
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devm_usb_get_phy()
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devm_usb_get_phy_by_node()
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devm_usb_get_phy_by_phandle()
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devm_usb_put_phy()
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PINCTRL
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devm_pinctrl_get()
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devm_pinctrl_put()
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devm_pinctrl_get_select()
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devm_pinctrl_register()
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devm_pinctrl_register_and_init()
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devm_pinctrl_unregister()
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POWER
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devm_reboot_mode_register()
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devm_reboot_mode_unregister()
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PWM
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devm_pwmchip_add()
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devm_pwm_get()
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devm_fwnode_pwm_get()
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REGULATOR
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devm_regulator_bulk_register_supply_alias()
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devm_regulator_bulk_get()
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devm_regulator_bulk_get_const()
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devm_regulator_bulk_get_enable()
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devm_regulator_bulk_put()
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devm_regulator_get()
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devm_regulator_get_enable()
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devm_regulator_get_enable_optional()
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devm_regulator_get_exclusive()
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devm_regulator_get_optional()
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devm_regulator_irq_helper()
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devm_regulator_put()
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devm_regulator_register()
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devm_regulator_register_notifier()
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devm_regulator_register_supply_alias()
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devm_regulator_unregister_notifier()
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RESET
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devm_reset_control_get()
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devm_reset_controller_register()
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RTC
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devm_rtc_device_register()
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devm_rtc_allocate_device()
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devm_rtc_register_device()
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devm_rtc_nvmem_register()
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SERDEV
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devm_serdev_device_open()
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SLAVE DMA ENGINE
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devm_acpi_dma_controller_register()
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devm_acpi_dma_controller_free()
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SPI
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devm_spi_alloc_master()
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devm_spi_alloc_slave()
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devm_spi_register_master()
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WATCHDOG
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devm_watchdog_register_device()
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