763 lines
16 KiB
C
763 lines
16 KiB
C
// SPDX-License-Identifier: GPL-2.0
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/*
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* linux/arch/alpha/kernel/smp.c
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*
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* 2001-07-09 Phil Ezolt (Phillip.Ezolt@compaq.com)
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* Renamed modified smp_call_function to smp_call_function_on_cpu()
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* Created an function that conforms to the old calling convention
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* of smp_call_function().
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*
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* This is helpful for DCPI.
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*
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*/
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#include <linux/errno.h>
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#include <linux/kernel.h>
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#include <linux/kernel_stat.h>
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#include <linux/module.h>
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#include <linux/sched/mm.h>
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#include <linux/mm.h>
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#include <linux/err.h>
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#include <linux/threads.h>
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#include <linux/smp.h>
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#include <linux/interrupt.h>
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#include <linux/init.h>
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#include <linux/delay.h>
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#include <linux/spinlock.h>
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#include <linux/irq.h>
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#include <linux/cache.h>
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#include <linux/profile.h>
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#include <linux/bitops.h>
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#include <linux/cpu.h>
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#include <asm/hwrpb.h>
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#include <asm/ptrace.h>
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#include <linux/atomic.h>
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#include <asm/io.h>
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#include <asm/irq.h>
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#include <asm/mmu_context.h>
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#include <asm/tlbflush.h>
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#include "proto.h"
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#include "irq_impl.h"
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#define DEBUG_SMP 0
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#if DEBUG_SMP
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#define DBGS(args) printk args
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#else
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#define DBGS(args)
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#endif
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/* A collection of per-processor data. */
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struct cpuinfo_alpha cpu_data[NR_CPUS];
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EXPORT_SYMBOL(cpu_data);
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/* A collection of single bit ipi messages. */
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static struct {
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unsigned long bits ____cacheline_aligned;
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} ipi_data[NR_CPUS] __cacheline_aligned;
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enum ipi_message_type {
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IPI_RESCHEDULE,
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IPI_CALL_FUNC,
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IPI_CPU_STOP,
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};
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/* Set to a secondary's cpuid when it comes online. */
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static int smp_secondary_alive = 0;
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int smp_num_probed; /* Internal processor count */
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int smp_num_cpus = 1; /* Number that came online. */
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EXPORT_SYMBOL(smp_num_cpus);
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/*
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* Called by both boot and secondaries to move global data into
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* per-processor storage.
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*/
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static inline void __init
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smp_store_cpu_info(int cpuid)
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{
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cpu_data[cpuid].loops_per_jiffy = loops_per_jiffy;
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cpu_data[cpuid].last_asn = ASN_FIRST_VERSION;
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cpu_data[cpuid].need_new_asn = 0;
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cpu_data[cpuid].asn_lock = 0;
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}
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/*
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* Ideally sets up per-cpu profiling hooks. Doesn't do much now...
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*/
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static inline void __init
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smp_setup_percpu_timer(int cpuid)
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{
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cpu_data[cpuid].prof_counter = 1;
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cpu_data[cpuid].prof_multiplier = 1;
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}
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static void __init
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wait_boot_cpu_to_stop(int cpuid)
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{
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unsigned long stop = jiffies + 10*HZ;
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while (time_before(jiffies, stop)) {
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if (!smp_secondary_alive)
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return;
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barrier();
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}
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printk("wait_boot_cpu_to_stop: FAILED on CPU %d, hanging now\n", cpuid);
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for (;;)
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barrier();
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}
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/*
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* Where secondaries begin a life of C.
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*/
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void __init
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smp_callin(void)
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{
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int cpuid = hard_smp_processor_id();
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if (cpu_online(cpuid)) {
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printk("??, cpu 0x%x already present??\n", cpuid);
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BUG();
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}
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set_cpu_online(cpuid, true);
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/* Turn on machine checks. */
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wrmces(7);
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/* Set trap vectors. */
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trap_init();
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/* Set interrupt vector. */
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wrent(entInt, 0);
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/* Get our local ticker going. */
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smp_setup_percpu_timer(cpuid);
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init_clockevent();
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/* Call platform-specific callin, if specified */
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if (alpha_mv.smp_callin)
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alpha_mv.smp_callin();
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/* All kernel threads share the same mm context. */
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mmgrab(&init_mm);
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current->active_mm = &init_mm;
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/* inform the notifiers about the new cpu */
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notify_cpu_starting(cpuid);
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/* Must have completely accurate bogos. */
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local_irq_enable();
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/* Wait boot CPU to stop with irq enabled before running
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calibrate_delay. */
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wait_boot_cpu_to_stop(cpuid);
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mb();
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calibrate_delay();
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smp_store_cpu_info(cpuid);
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/* Allow master to continue only after we written loops_per_jiffy. */
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wmb();
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smp_secondary_alive = 1;
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DBGS(("smp_callin: commencing CPU %d current %p active_mm %p\n",
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cpuid, current, current->active_mm));
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cpu_startup_entry(CPUHP_AP_ONLINE_IDLE);
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}
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/* Wait until hwrpb->txrdy is clear for cpu. Return -1 on timeout. */
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static int
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wait_for_txrdy (unsigned long cpumask)
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{
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unsigned long timeout;
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if (!(hwrpb->txrdy & cpumask))
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return 0;
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timeout = jiffies + 10*HZ;
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while (time_before(jiffies, timeout)) {
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if (!(hwrpb->txrdy & cpumask))
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return 0;
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udelay(10);
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barrier();
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}
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return -1;
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}
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/*
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* Send a message to a secondary's console. "START" is one such
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* interesting message. ;-)
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*/
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static void
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send_secondary_console_msg(char *str, int cpuid)
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{
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struct percpu_struct *cpu;
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register char *cp1, *cp2;
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unsigned long cpumask;
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size_t len;
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cpu = (struct percpu_struct *)
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((char*)hwrpb
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+ hwrpb->processor_offset
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+ cpuid * hwrpb->processor_size);
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cpumask = (1UL << cpuid);
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if (wait_for_txrdy(cpumask))
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goto timeout;
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cp2 = str;
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len = strlen(cp2);
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*(unsigned int *)&cpu->ipc_buffer[0] = len;
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cp1 = (char *) &cpu->ipc_buffer[1];
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memcpy(cp1, cp2, len);
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/* atomic test and set */
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wmb();
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set_bit(cpuid, &hwrpb->rxrdy);
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if (wait_for_txrdy(cpumask))
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goto timeout;
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return;
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timeout:
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printk("Processor %x not ready\n", cpuid);
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}
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/*
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* A secondary console wants to send a message. Receive it.
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*/
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static void
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recv_secondary_console_msg(void)
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{
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int mycpu, i, cnt;
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unsigned long txrdy = hwrpb->txrdy;
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char *cp1, *cp2, buf[80];
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struct percpu_struct *cpu;
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DBGS(("recv_secondary_console_msg: TXRDY 0x%lx.\n", txrdy));
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mycpu = hard_smp_processor_id();
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for (i = 0; i < NR_CPUS; i++) {
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if (!(txrdy & (1UL << i)))
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continue;
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DBGS(("recv_secondary_console_msg: "
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"TXRDY contains CPU %d.\n", i));
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cpu = (struct percpu_struct *)
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((char*)hwrpb
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+ hwrpb->processor_offset
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+ i * hwrpb->processor_size);
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DBGS(("recv_secondary_console_msg: on %d from %d"
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" HALT_REASON 0x%lx FLAGS 0x%lx\n",
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mycpu, i, cpu->halt_reason, cpu->flags));
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cnt = cpu->ipc_buffer[0] >> 32;
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if (cnt <= 0 || cnt >= 80)
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strcpy(buf, "<<< BOGUS MSG >>>");
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else {
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cp1 = (char *) &cpu->ipc_buffer[1];
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cp2 = buf;
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memcpy(cp2, cp1, cnt);
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cp2[cnt] = '\0';
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while ((cp2 = strchr(cp2, '\r')) != 0) {
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*cp2 = ' ';
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if (cp2[1] == '\n')
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cp2[1] = ' ';
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}
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}
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DBGS((KERN_INFO "recv_secondary_console_msg: on %d "
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"message is '%s'\n", mycpu, buf));
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}
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hwrpb->txrdy = 0;
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}
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/*
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* Convince the console to have a secondary cpu begin execution.
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*/
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static int
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secondary_cpu_start(int cpuid, struct task_struct *idle)
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{
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struct percpu_struct *cpu;
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struct pcb_struct *hwpcb, *ipcb;
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unsigned long timeout;
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cpu = (struct percpu_struct *)
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((char*)hwrpb
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+ hwrpb->processor_offset
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+ cpuid * hwrpb->processor_size);
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hwpcb = (struct pcb_struct *) cpu->hwpcb;
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ipcb = &task_thread_info(idle)->pcb;
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/* Initialize the CPU's HWPCB to something just good enough for
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us to get started. Immediately after starting, we'll swpctx
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to the target idle task's pcb. Reuse the stack in the mean
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time. Precalculate the target PCBB. */
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hwpcb->ksp = (unsigned long)ipcb + sizeof(union thread_union) - 16;
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hwpcb->usp = 0;
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hwpcb->ptbr = ipcb->ptbr;
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hwpcb->pcc = 0;
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hwpcb->asn = 0;
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hwpcb->unique = virt_to_phys(ipcb);
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hwpcb->flags = ipcb->flags;
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hwpcb->res1 = hwpcb->res2 = 0;
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#if 0
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DBGS(("KSP 0x%lx PTBR 0x%lx VPTBR 0x%lx UNIQUE 0x%lx\n",
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hwpcb->ksp, hwpcb->ptbr, hwrpb->vptb, hwpcb->unique));
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#endif
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DBGS(("Starting secondary cpu %d: state 0x%lx pal_flags 0x%lx\n",
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cpuid, idle->state, ipcb->flags));
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/* Setup HWRPB fields that SRM uses to activate secondary CPU */
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hwrpb->CPU_restart = __smp_callin;
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hwrpb->CPU_restart_data = (unsigned long) __smp_callin;
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/* Recalculate and update the HWRPB checksum */
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hwrpb_update_checksum(hwrpb);
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/*
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* Send a "start" command to the specified processor.
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*/
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/* SRM III 3.4.1.3 */
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cpu->flags |= 0x22; /* turn on Context Valid and Restart Capable */
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cpu->flags &= ~1; /* turn off Bootstrap In Progress */
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wmb();
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send_secondary_console_msg("START\r\n", cpuid);
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/* Wait 10 seconds for an ACK from the console. */
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timeout = jiffies + 10*HZ;
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while (time_before(jiffies, timeout)) {
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if (cpu->flags & 1)
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goto started;
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udelay(10);
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barrier();
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}
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printk(KERN_ERR "SMP: Processor %d failed to start.\n", cpuid);
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return -1;
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started:
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DBGS(("secondary_cpu_start: SUCCESS for CPU %d!!!\n", cpuid));
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return 0;
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}
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/*
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* Bring one cpu online.
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*/
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static int
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smp_boot_one_cpu(int cpuid, struct task_struct *idle)
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{
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unsigned long timeout;
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/* Signal the secondary to wait a moment. */
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smp_secondary_alive = -1;
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/* Whirrr, whirrr, whirrrrrrrrr... */
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if (secondary_cpu_start(cpuid, idle))
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return -1;
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/* Notify the secondary CPU it can run calibrate_delay. */
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mb();
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smp_secondary_alive = 0;
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/* We've been acked by the console; wait one second for
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the task to start up for real. */
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timeout = jiffies + 1*HZ;
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while (time_before(jiffies, timeout)) {
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if (smp_secondary_alive == 1)
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goto alive;
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udelay(10);
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barrier();
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}
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/* We failed to boot the CPU. */
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printk(KERN_ERR "SMP: Processor %d is stuck.\n", cpuid);
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return -1;
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alive:
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/* Another "Red Snapper". */
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return 0;
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}
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/*
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* Called from setup_arch. Detect an SMP system and which processors
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* are present.
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*/
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void __init
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setup_smp(void)
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{
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struct percpu_struct *cpubase, *cpu;
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unsigned long i;
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if (boot_cpuid != 0) {
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printk(KERN_WARNING "SMP: Booting off cpu %d instead of 0?\n",
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boot_cpuid);
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}
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if (hwrpb->nr_processors > 1) {
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int boot_cpu_palrev;
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DBGS(("setup_smp: nr_processors %ld\n",
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hwrpb->nr_processors));
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cpubase = (struct percpu_struct *)
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((char*)hwrpb + hwrpb->processor_offset);
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boot_cpu_palrev = cpubase->pal_revision;
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for (i = 0; i < hwrpb->nr_processors; i++) {
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cpu = (struct percpu_struct *)
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((char *)cpubase + i*hwrpb->processor_size);
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if ((cpu->flags & 0x1cc) == 0x1cc) {
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smp_num_probed++;
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set_cpu_possible(i, true);
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set_cpu_present(i, true);
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cpu->pal_revision = boot_cpu_palrev;
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}
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DBGS(("setup_smp: CPU %d: flags 0x%lx type 0x%lx\n",
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i, cpu->flags, cpu->type));
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DBGS(("setup_smp: CPU %d: PAL rev 0x%lx\n",
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i, cpu->pal_revision));
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}
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} else {
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smp_num_probed = 1;
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}
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printk(KERN_INFO "SMP: %d CPUs probed -- cpu_present_mask = %lx\n",
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smp_num_probed, cpumask_bits(cpu_present_mask)[0]);
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}
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/*
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* Called by smp_init prepare the secondaries
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*/
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void __init
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smp_prepare_cpus(unsigned int max_cpus)
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{
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/* Take care of some initial bookkeeping. */
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memset(ipi_data, 0, sizeof(ipi_data));
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current_thread_info()->cpu = boot_cpuid;
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smp_store_cpu_info(boot_cpuid);
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smp_setup_percpu_timer(boot_cpuid);
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/* Nothing to do on a UP box, or when told not to. */
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if (smp_num_probed == 1 || max_cpus == 0) {
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init_cpu_possible(cpumask_of(boot_cpuid));
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init_cpu_present(cpumask_of(boot_cpuid));
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printk(KERN_INFO "SMP mode deactivated.\n");
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return;
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}
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printk(KERN_INFO "SMP starting up secondaries.\n");
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smp_num_cpus = smp_num_probed;
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}
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void
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smp_prepare_boot_cpu(void)
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{
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}
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int
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__cpu_up(unsigned int cpu, struct task_struct *tidle)
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{
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smp_boot_one_cpu(cpu, tidle);
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return cpu_online(cpu) ? 0 : -ENOSYS;
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}
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void __init
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smp_cpus_done(unsigned int max_cpus)
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{
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int cpu;
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unsigned long bogosum = 0;
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for(cpu = 0; cpu < NR_CPUS; cpu++)
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if (cpu_online(cpu))
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bogosum += cpu_data[cpu].loops_per_jiffy;
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printk(KERN_INFO "SMP: Total of %d processors activated "
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"(%lu.%02lu BogoMIPS).\n",
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num_online_cpus(),
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(bogosum + 2500) / (500000/HZ),
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((bogosum + 2500) / (5000/HZ)) % 100);
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}
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static void
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send_ipi_message(const struct cpumask *to_whom, enum ipi_message_type operation)
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{
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int i;
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mb();
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for_each_cpu(i, to_whom)
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set_bit(operation, &ipi_data[i].bits);
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mb();
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for_each_cpu(i, to_whom)
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wripir(i);
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}
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void
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handle_ipi(struct pt_regs *regs)
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{
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int this_cpu = smp_processor_id();
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unsigned long *pending_ipis = &ipi_data[this_cpu].bits;
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unsigned long ops;
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#if 0
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DBGS(("handle_ipi: on CPU %d ops 0x%lx PC 0x%lx\n",
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this_cpu, *pending_ipis, regs->pc));
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#endif
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mb(); /* Order interrupt and bit testing. */
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while ((ops = xchg(pending_ipis, 0)) != 0) {
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mb(); /* Order bit clearing and data access. */
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do {
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unsigned long which;
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which = ops & -ops;
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ops &= ~which;
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which = __ffs(which);
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switch (which) {
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case IPI_RESCHEDULE:
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scheduler_ipi();
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break;
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case IPI_CALL_FUNC:
|
|
generic_smp_call_function_interrupt();
|
|
break;
|
|
|
|
case IPI_CPU_STOP:
|
|
halt();
|
|
|
|
default:
|
|
printk(KERN_CRIT "Unknown IPI on CPU %d: %lu\n",
|
|
this_cpu, which);
|
|
break;
|
|
}
|
|
} while (ops);
|
|
|
|
mb(); /* Order data access and bit testing. */
|
|
}
|
|
|
|
cpu_data[this_cpu].ipi_count++;
|
|
|
|
if (hwrpb->txrdy)
|
|
recv_secondary_console_msg();
|
|
}
|
|
|
|
void
|
|
smp_send_reschedule(int cpu)
|
|
{
|
|
#ifdef DEBUG_IPI_MSG
|
|
if (cpu == hard_smp_processor_id())
|
|
printk(KERN_WARNING
|
|
"smp_send_reschedule: Sending IPI to self.\n");
|
|
#endif
|
|
send_ipi_message(cpumask_of(cpu), IPI_RESCHEDULE);
|
|
}
|
|
|
|
void
|
|
smp_send_stop(void)
|
|
{
|
|
cpumask_t to_whom;
|
|
cpumask_copy(&to_whom, cpu_online_mask);
|
|
cpumask_clear_cpu(smp_processor_id(), &to_whom);
|
|
#ifdef DEBUG_IPI_MSG
|
|
if (hard_smp_processor_id() != boot_cpu_id)
|
|
printk(KERN_WARNING "smp_send_stop: Not on boot cpu.\n");
|
|
#endif
|
|
send_ipi_message(&to_whom, IPI_CPU_STOP);
|
|
}
|
|
|
|
void arch_send_call_function_ipi_mask(const struct cpumask *mask)
|
|
{
|
|
send_ipi_message(mask, IPI_CALL_FUNC);
|
|
}
|
|
|
|
void arch_send_call_function_single_ipi(int cpu)
|
|
{
|
|
send_ipi_message(cpumask_of(cpu), IPI_CALL_FUNC);
|
|
}
|
|
|
|
static void
|
|
ipi_imb(void *ignored)
|
|
{
|
|
imb();
|
|
}
|
|
|
|
void
|
|
smp_imb(void)
|
|
{
|
|
/* Must wait other processors to flush their icache before continue. */
|
|
on_each_cpu(ipi_imb, NULL, 1);
|
|
}
|
|
EXPORT_SYMBOL(smp_imb);
|
|
|
|
static void
|
|
ipi_flush_tlb_all(void *ignored)
|
|
{
|
|
tbia();
|
|
}
|
|
|
|
void
|
|
flush_tlb_all(void)
|
|
{
|
|
/* Although we don't have any data to pass, we do want to
|
|
synchronize with the other processors. */
|
|
on_each_cpu(ipi_flush_tlb_all, NULL, 1);
|
|
}
|
|
|
|
#define asn_locked() (cpu_data[smp_processor_id()].asn_lock)
|
|
|
|
static void
|
|
ipi_flush_tlb_mm(void *x)
|
|
{
|
|
struct mm_struct *mm = x;
|
|
if (mm == current->active_mm && !asn_locked())
|
|
flush_tlb_current(mm);
|
|
else
|
|
flush_tlb_other(mm);
|
|
}
|
|
|
|
void
|
|
flush_tlb_mm(struct mm_struct *mm)
|
|
{
|
|
preempt_disable();
|
|
|
|
if (mm == current->active_mm) {
|
|
flush_tlb_current(mm);
|
|
if (atomic_read(&mm->mm_users) <= 1) {
|
|
int cpu, this_cpu = smp_processor_id();
|
|
for (cpu = 0; cpu < NR_CPUS; cpu++) {
|
|
if (!cpu_online(cpu) || cpu == this_cpu)
|
|
continue;
|
|
if (mm->context[cpu])
|
|
mm->context[cpu] = 0;
|
|
}
|
|
preempt_enable();
|
|
return;
|
|
}
|
|
}
|
|
|
|
smp_call_function(ipi_flush_tlb_mm, mm, 1);
|
|
|
|
preempt_enable();
|
|
}
|
|
EXPORT_SYMBOL(flush_tlb_mm);
|
|
|
|
struct flush_tlb_page_struct {
|
|
struct vm_area_struct *vma;
|
|
struct mm_struct *mm;
|
|
unsigned long addr;
|
|
};
|
|
|
|
static void
|
|
ipi_flush_tlb_page(void *x)
|
|
{
|
|
struct flush_tlb_page_struct *data = x;
|
|
struct mm_struct * mm = data->mm;
|
|
|
|
if (mm == current->active_mm && !asn_locked())
|
|
flush_tlb_current_page(mm, data->vma, data->addr);
|
|
else
|
|
flush_tlb_other(mm);
|
|
}
|
|
|
|
void
|
|
flush_tlb_page(struct vm_area_struct *vma, unsigned long addr)
|
|
{
|
|
struct flush_tlb_page_struct data;
|
|
struct mm_struct *mm = vma->vm_mm;
|
|
|
|
preempt_disable();
|
|
|
|
if (mm == current->active_mm) {
|
|
flush_tlb_current_page(mm, vma, addr);
|
|
if (atomic_read(&mm->mm_users) <= 1) {
|
|
int cpu, this_cpu = smp_processor_id();
|
|
for (cpu = 0; cpu < NR_CPUS; cpu++) {
|
|
if (!cpu_online(cpu) || cpu == this_cpu)
|
|
continue;
|
|
if (mm->context[cpu])
|
|
mm->context[cpu] = 0;
|
|
}
|
|
preempt_enable();
|
|
return;
|
|
}
|
|
}
|
|
|
|
data.vma = vma;
|
|
data.mm = mm;
|
|
data.addr = addr;
|
|
|
|
smp_call_function(ipi_flush_tlb_page, &data, 1);
|
|
|
|
preempt_enable();
|
|
}
|
|
EXPORT_SYMBOL(flush_tlb_page);
|
|
|
|
void
|
|
flush_tlb_range(struct vm_area_struct *vma, unsigned long start, unsigned long end)
|
|
{
|
|
/* On the Alpha we always flush the whole user tlb. */
|
|
flush_tlb_mm(vma->vm_mm);
|
|
}
|
|
EXPORT_SYMBOL(flush_tlb_range);
|
|
|
|
static void
|
|
ipi_flush_icache_page(void *x)
|
|
{
|
|
struct mm_struct *mm = (struct mm_struct *) x;
|
|
if (mm == current->active_mm && !asn_locked())
|
|
__load_new_mm_context(mm);
|
|
else
|
|
flush_tlb_other(mm);
|
|
}
|
|
|
|
void
|
|
flush_icache_user_page(struct vm_area_struct *vma, struct page *page,
|
|
unsigned long addr, int len)
|
|
{
|
|
struct mm_struct *mm = vma->vm_mm;
|
|
|
|
if ((vma->vm_flags & VM_EXEC) == 0)
|
|
return;
|
|
|
|
preempt_disable();
|
|
|
|
if (mm == current->active_mm) {
|
|
__load_new_mm_context(mm);
|
|
if (atomic_read(&mm->mm_users) <= 1) {
|
|
int cpu, this_cpu = smp_processor_id();
|
|
for (cpu = 0; cpu < NR_CPUS; cpu++) {
|
|
if (!cpu_online(cpu) || cpu == this_cpu)
|
|
continue;
|
|
if (mm->context[cpu])
|
|
mm->context[cpu] = 0;
|
|
}
|
|
preempt_enable();
|
|
return;
|
|
}
|
|
}
|
|
|
|
smp_call_function(ipi_flush_icache_page, mm, 1);
|
|
|
|
preempt_enable();
|
|
}
|