135 lines
3.7 KiB
C
135 lines
3.7 KiB
C
// SPDX-License-Identifier: GPL-2.0-only
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/*
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* Copyright (C) 2015 Linaro Ltd <ard.biesheuvel@linaro.org>
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*/
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#include <linux/efi.h>
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#include <linux/memblock.h>
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#include <asm/efi.h>
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#include <asm/mach/map.h>
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#include <asm/mmu_context.h>
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static int __init set_permissions(pte_t *ptep, unsigned long addr, void *data)
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{
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efi_memory_desc_t *md = data;
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pte_t pte = *ptep;
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if (md->attribute & EFI_MEMORY_RO)
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pte = set_pte_bit(pte, __pgprot(L_PTE_RDONLY));
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if (md->attribute & EFI_MEMORY_XP)
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pte = set_pte_bit(pte, __pgprot(L_PTE_XN));
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set_pte_ext(ptep, pte, PTE_EXT_NG);
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return 0;
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}
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int __init efi_set_mapping_permissions(struct mm_struct *mm,
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efi_memory_desc_t *md,
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bool ignored)
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{
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unsigned long base, size;
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base = md->virt_addr;
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size = md->num_pages << EFI_PAGE_SHIFT;
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/*
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* We can only use apply_to_page_range() if we can guarantee that the
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* entire region was mapped using pages. This should be the case if the
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* region does not cover any naturally aligned SECTION_SIZE sized
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* blocks.
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*/
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if (round_down(base + size, SECTION_SIZE) <
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round_up(base, SECTION_SIZE) + SECTION_SIZE)
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return apply_to_page_range(mm, base, size, set_permissions, md);
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return 0;
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}
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int __init efi_create_mapping(struct mm_struct *mm, efi_memory_desc_t *md)
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{
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struct map_desc desc = {
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.virtual = md->virt_addr,
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.pfn = __phys_to_pfn(md->phys_addr),
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.length = md->num_pages * EFI_PAGE_SIZE,
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};
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/*
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* Order is important here: memory regions may have all of the
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* bits below set (and usually do), so we check them in order of
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* preference.
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*/
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if (md->attribute & EFI_MEMORY_WB)
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desc.type = MT_MEMORY_RWX;
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else if (md->attribute & EFI_MEMORY_WT)
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desc.type = MT_MEMORY_RWX_NONCACHED;
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else if (md->attribute & EFI_MEMORY_WC)
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desc.type = MT_DEVICE_WC;
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else
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desc.type = MT_DEVICE;
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create_mapping_late(mm, &desc, true);
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/*
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* If stricter permissions were specified, apply them now.
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*/
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if (md->attribute & (EFI_MEMORY_RO | EFI_MEMORY_XP))
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return efi_set_mapping_permissions(mm, md, false);
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return 0;
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}
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static unsigned long __initdata cpu_state_table = EFI_INVALID_TABLE_ADDR;
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const efi_config_table_type_t efi_arch_tables[] __initconst = {
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{LINUX_EFI_ARM_CPU_STATE_TABLE_GUID, &cpu_state_table},
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{}
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};
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static void __init load_cpu_state_table(void)
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{
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if (cpu_state_table != EFI_INVALID_TABLE_ADDR) {
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struct efi_arm_entry_state *state;
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bool dump_state = true;
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state = early_memremap_ro(cpu_state_table,
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sizeof(struct efi_arm_entry_state));
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if (state == NULL) {
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pr_warn("Unable to map CPU entry state table.\n");
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return;
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}
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if ((state->sctlr_before_ebs & 1) == 0)
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pr_warn(FW_BUG "EFI stub was entered with MMU and Dcache disabled, please fix your firmware!\n");
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else if ((state->sctlr_after_ebs & 1) == 0)
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pr_warn(FW_BUG "ExitBootServices() returned with MMU and Dcache disabled, please fix your firmware!\n");
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else
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dump_state = false;
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if (dump_state || efi_enabled(EFI_DBG)) {
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pr_info("CPSR at EFI stub entry : 0x%08x\n",
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state->cpsr_before_ebs);
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pr_info("SCTLR at EFI stub entry : 0x%08x\n",
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state->sctlr_before_ebs);
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pr_info("CPSR after ExitBootServices() : 0x%08x\n",
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state->cpsr_after_ebs);
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pr_info("SCTLR after ExitBootServices(): 0x%08x\n",
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state->sctlr_after_ebs);
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}
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early_memunmap(state, sizeof(struct efi_arm_entry_state));
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}
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}
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void __init arm_efi_init(void)
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{
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efi_init();
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if (screen_info.orig_video_isVGA == VIDEO_TYPE_EFI) {
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/* dummycon on ARM needs non-zero values for columns/lines */
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screen_info.orig_video_cols = 80;
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screen_info.orig_video_lines = 25;
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}
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/* ARM does not permit early mappings to persist across paging_init() */
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efi_memmap_unmap();
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load_cpu_state_table();
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}
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