460 lines
8.7 KiB
Plaintext
460 lines
8.7 KiB
Plaintext
// SPDX-License-Identifier: (GPL-2.0 OR MIT)
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/*
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* Copyright (c) 2018 MediaTek Inc.
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* Author: Ben Ho <ben.ho@mediatek.com>
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* Erin Lo <erin.lo@mediatek.com>
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*/
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/dts-v1/;
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#include "mt8183.dtsi"
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#include "mt6358.dtsi"
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/ {
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model = "MediaTek MT8183 evaluation board";
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compatible = "mediatek,mt8183-evb", "mediatek,mt8183";
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aliases {
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serial0 = &uart0;
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};
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memory@40000000 {
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device_type = "memory";
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reg = <0 0x40000000 0 0x80000000>;
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};
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chosen {
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stdout-path = "serial0:921600n8";
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};
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reserved-memory {
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#address-cells = <2>;
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#size-cells = <2>;
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ranges;
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scp_mem_reserved: scp_mem_region {
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compatible = "shared-dma-pool";
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reg = <0 0x50000000 0 0x2900000>;
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no-map;
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};
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};
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ntc@0 {
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compatible = "murata,ncp03wf104";
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pullup-uv = <1800000>;
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pullup-ohm = <390000>;
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pulldown-ohm = <0>;
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io-channels = <&auxadc 0>;
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};
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};
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&auxadc {
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status = "okay";
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};
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&gpu {
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mali-supply = <&mt6358_vgpu_reg>;
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sram-supply = <&mt6358_vsram_gpu_reg>;
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};
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&i2c0 {
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pinctrl-names = "default";
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pinctrl-0 = <&i2c_pins_0>;
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status = "okay";
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clock-frequency = <100000>;
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};
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&i2c1 {
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pinctrl-names = "default";
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pinctrl-0 = <&i2c_pins_1>;
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status = "okay";
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clock-frequency = <100000>;
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};
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&i2c2 {
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pinctrl-names = "default";
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pinctrl-0 = <&i2c_pins_2>;
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status = "okay";
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clock-frequency = <100000>;
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};
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&i2c3 {
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pinctrl-names = "default";
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pinctrl-0 = <&i2c_pins_3>;
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status = "okay";
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clock-frequency = <100000>;
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};
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&i2c4 {
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pinctrl-names = "default";
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pinctrl-0 = <&i2c_pins_4>;
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status = "okay";
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clock-frequency = <1000000>;
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};
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&i2c5 {
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pinctrl-names = "default";
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pinctrl-0 = <&i2c_pins_5>;
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status = "okay";
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clock-frequency = <1000000>;
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};
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&mmc0 {
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status = "okay";
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pinctrl-names = "default", "state_uhs";
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pinctrl-0 = <&mmc0_pins_default>;
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pinctrl-1 = <&mmc0_pins_uhs>;
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bus-width = <8>;
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max-frequency = <200000000>;
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cap-mmc-highspeed;
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mmc-hs200-1_8v;
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mmc-hs400-1_8v;
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cap-mmc-hw-reset;
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no-sdio;
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no-sd;
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hs400-ds-delay = <0x12814>;
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vmmc-supply = <&mt6358_vemc_reg>;
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vqmmc-supply = <&mt6358_vio18_reg>;
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assigned-clocks = <&topckgen CLK_TOP_MUX_MSDC50_0>;
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assigned-clock-parents = <&topckgen CLK_TOP_MSDCPLL_CK>;
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non-removable;
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};
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&mmc1 {
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status = "okay";
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pinctrl-names = "default", "state_uhs";
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pinctrl-0 = <&mmc1_pins_default>;
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pinctrl-1 = <&mmc1_pins_uhs>;
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bus-width = <4>;
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max-frequency = <200000000>;
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cap-sd-highspeed;
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sd-uhs-sdr50;
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sd-uhs-sdr104;
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cap-sdio-irq;
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no-mmc;
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no-sd;
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vmmc-supply = <&mt6358_vmch_reg>;
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vqmmc-supply = <&mt6358_vmc_reg>;
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keep-power-in-suspend;
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wakeup-source;
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non-removable;
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};
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&pio {
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i2c_pins_0: i2c0{
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pins_i2c{
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pinmux = <PINMUX_GPIO82__FUNC_SDA0>,
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<PINMUX_GPIO83__FUNC_SCL0>;
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mediatek,pull-up-adv = <3>;
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mediatek,drive-strength-adv = <00>;
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};
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};
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i2c_pins_1: i2c1{
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pins_i2c{
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pinmux = <PINMUX_GPIO81__FUNC_SDA1>,
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<PINMUX_GPIO84__FUNC_SCL1>;
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mediatek,pull-up-adv = <3>;
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mediatek,drive-strength-adv = <00>;
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};
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};
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i2c_pins_2: i2c2{
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pins_i2c{
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pinmux = <PINMUX_GPIO103__FUNC_SCL2>,
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<PINMUX_GPIO104__FUNC_SDA2>;
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mediatek,pull-up-adv = <3>;
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mediatek,drive-strength-adv = <00>;
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};
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};
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i2c_pins_3: i2c3{
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pins_i2c{
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pinmux = <PINMUX_GPIO50__FUNC_SCL3>,
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<PINMUX_GPIO51__FUNC_SDA3>;
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mediatek,pull-up-adv = <3>;
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mediatek,drive-strength-adv = <00>;
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};
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};
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i2c_pins_4: i2c4{
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pins_i2c{
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pinmux = <PINMUX_GPIO105__FUNC_SCL4>,
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<PINMUX_GPIO106__FUNC_SDA4>;
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mediatek,pull-up-adv = <3>;
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mediatek,drive-strength-adv = <00>;
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};
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};
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i2c_pins_5: i2c5{
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pins_i2c{
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pinmux = <PINMUX_GPIO48__FUNC_SCL5>,
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<PINMUX_GPIO49__FUNC_SDA5>;
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mediatek,pull-up-adv = <3>;
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mediatek,drive-strength-adv = <00>;
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};
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};
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spi_pins_0: spi0{
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pins_spi{
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pinmux = <PINMUX_GPIO85__FUNC_SPI0_MI>,
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<PINMUX_GPIO86__FUNC_SPI0_CSB>,
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<PINMUX_GPIO87__FUNC_SPI0_MO>,
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<PINMUX_GPIO88__FUNC_SPI0_CLK>;
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bias-disable;
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};
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};
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mmc0_pins_default: mmc0default {
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pins_cmd_dat {
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pinmux = <PINMUX_GPIO123__FUNC_MSDC0_DAT0>,
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<PINMUX_GPIO128__FUNC_MSDC0_DAT1>,
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<PINMUX_GPIO125__FUNC_MSDC0_DAT2>,
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<PINMUX_GPIO132__FUNC_MSDC0_DAT3>,
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<PINMUX_GPIO126__FUNC_MSDC0_DAT4>,
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<PINMUX_GPIO129__FUNC_MSDC0_DAT5>,
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<PINMUX_GPIO127__FUNC_MSDC0_DAT6>,
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<PINMUX_GPIO130__FUNC_MSDC0_DAT7>,
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<PINMUX_GPIO122__FUNC_MSDC0_CMD>;
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input-enable;
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bias-pull-up;
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};
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pins_clk {
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pinmux = <PINMUX_GPIO124__FUNC_MSDC0_CLK>;
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bias-pull-down;
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};
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pins_rst {
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pinmux = <PINMUX_GPIO133__FUNC_MSDC0_RSTB>;
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bias-pull-up;
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};
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};
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mmc0_pins_uhs: mmc0 {
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pins_cmd_dat {
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pinmux = <PINMUX_GPIO123__FUNC_MSDC0_DAT0>,
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<PINMUX_GPIO128__FUNC_MSDC0_DAT1>,
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<PINMUX_GPIO125__FUNC_MSDC0_DAT2>,
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<PINMUX_GPIO132__FUNC_MSDC0_DAT3>,
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<PINMUX_GPIO126__FUNC_MSDC0_DAT4>,
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<PINMUX_GPIO129__FUNC_MSDC0_DAT5>,
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<PINMUX_GPIO127__FUNC_MSDC0_DAT6>,
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<PINMUX_GPIO130__FUNC_MSDC0_DAT7>,
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<PINMUX_GPIO122__FUNC_MSDC0_CMD>;
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input-enable;
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drive-strength = <MTK_DRIVE_10mA>;
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bias-pull-up = <MTK_PUPD_SET_R1R0_01>;
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};
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pins_clk {
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pinmux = <PINMUX_GPIO124__FUNC_MSDC0_CLK>;
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drive-strength = <MTK_DRIVE_10mA>;
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bias-pull-down = <MTK_PUPD_SET_R1R0_10>;
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};
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pins_ds {
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pinmux = <PINMUX_GPIO131__FUNC_MSDC0_DSL>;
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drive-strength = <MTK_DRIVE_10mA>;
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bias-pull-down = <MTK_PUPD_SET_R1R0_10>;
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};
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pins_rst {
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pinmux = <PINMUX_GPIO133__FUNC_MSDC0_RSTB>;
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drive-strength = <MTK_DRIVE_10mA>;
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bias-pull-up;
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};
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};
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mmc1_pins_default: mmc1default {
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pins_cmd_dat {
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pinmux = <PINMUX_GPIO31__FUNC_MSDC1_CMD>,
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<PINMUX_GPIO32__FUNC_MSDC1_DAT0>,
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<PINMUX_GPIO34__FUNC_MSDC1_DAT1>,
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<PINMUX_GPIO33__FUNC_MSDC1_DAT2>,
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<PINMUX_GPIO30__FUNC_MSDC1_DAT3>;
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input-enable;
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bias-pull-up;
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};
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pins_clk {
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pinmux = <PINMUX_GPIO29__FUNC_MSDC1_CLK>;
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input-enable;
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bias-pull-down;
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};
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pins_pmu {
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pinmux = <PINMUX_GPIO178__FUNC_GPIO178>,
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<PINMUX_GPIO166__FUNC_GPIO166>;
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output-high;
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};
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};
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mmc1_pins_uhs: mmc1 {
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pins_cmd_dat {
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pinmux = <PINMUX_GPIO31__FUNC_MSDC1_CMD>,
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<PINMUX_GPIO32__FUNC_MSDC1_DAT0>,
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<PINMUX_GPIO34__FUNC_MSDC1_DAT1>,
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<PINMUX_GPIO33__FUNC_MSDC1_DAT2>,
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<PINMUX_GPIO30__FUNC_MSDC1_DAT3>;
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drive-strength = <MTK_DRIVE_6mA>;
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input-enable;
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bias-pull-up = <MTK_PUPD_SET_R1R0_01>;
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};
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pins_clk {
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pinmux = <PINMUX_GPIO29__FUNC_MSDC1_CLK>;
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drive-strength = <MTK_DRIVE_6mA>;
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bias-pull-down = <MTK_PUPD_SET_R1R0_10>;
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input-enable;
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};
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};
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spi_pins_1: spi1{
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pins_spi{
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pinmux = <PINMUX_GPIO161__FUNC_SPI1_A_MI>,
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<PINMUX_GPIO162__FUNC_SPI1_A_CSB>,
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<PINMUX_GPIO163__FUNC_SPI1_A_MO>,
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<PINMUX_GPIO164__FUNC_SPI1_A_CLK>;
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bias-disable;
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};
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};
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spi_pins_2: spi2{
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pins_spi{
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pinmux = <PINMUX_GPIO0__FUNC_SPI2_CSB>,
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<PINMUX_GPIO1__FUNC_SPI2_MO>,
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<PINMUX_GPIO2__FUNC_SPI2_CLK>,
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<PINMUX_GPIO94__FUNC_SPI2_MI>;
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bias-disable;
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};
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};
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spi_pins_3: spi3{
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pins_spi{
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pinmux = <PINMUX_GPIO21__FUNC_SPI3_MI>,
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<PINMUX_GPIO22__FUNC_SPI3_CSB>,
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<PINMUX_GPIO23__FUNC_SPI3_MO>,
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<PINMUX_GPIO24__FUNC_SPI3_CLK>;
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bias-disable;
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};
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};
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spi_pins_4: spi4{
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pins_spi{
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pinmux = <PINMUX_GPIO17__FUNC_SPI4_MI>,
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<PINMUX_GPIO18__FUNC_SPI4_CSB>,
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<PINMUX_GPIO19__FUNC_SPI4_MO>,
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<PINMUX_GPIO20__FUNC_SPI4_CLK>;
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bias-disable;
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};
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};
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spi_pins_5: spi5{
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pins_spi{
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pinmux = <PINMUX_GPIO13__FUNC_SPI5_MI>,
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<PINMUX_GPIO14__FUNC_SPI5_CSB>,
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<PINMUX_GPIO15__FUNC_SPI5_MO>,
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<PINMUX_GPIO16__FUNC_SPI5_CLK>;
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bias-disable;
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};
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};
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pwm_pins_1: pwm1 {
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pins_pwm {
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pinmux = <PINMUX_GPIO90__FUNC_PWM_A>;
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};
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};
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};
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&mfg {
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domain-supply = <&mt6358_vgpu_reg>;
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};
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&spi0 {
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pinctrl-names = "default";
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pinctrl-0 = <&spi_pins_0>;
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mediatek,pad-select = <0>;
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status = "okay";
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};
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&spi1 {
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pinctrl-names = "default";
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pinctrl-0 = <&spi_pins_1>;
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mediatek,pad-select = <0>;
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status = "okay";
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};
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&spi2 {
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pinctrl-names = "default";
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pinctrl-0 = <&spi_pins_2>;
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mediatek,pad-select = <0>;
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status = "okay";
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};
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&spi3 {
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pinctrl-names = "default";
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pinctrl-0 = <&spi_pins_3>;
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mediatek,pad-select = <0>;
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status = "okay";
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};
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&spi4 {
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pinctrl-names = "default";
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pinctrl-0 = <&spi_pins_4>;
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mediatek,pad-select = <0>;
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status = "okay";
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};
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&spi5 {
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pinctrl-names = "default";
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pinctrl-0 = <&spi_pins_5>;
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mediatek,pad-select = <0>;
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status = "okay";
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};
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&cci {
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proc-supply = <&mt6358_vproc12_reg>;
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};
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&cpu0 {
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proc-supply = <&mt6358_vproc12_reg>;
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};
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&cpu1 {
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proc-supply = <&mt6358_vproc12_reg>;
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};
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&cpu2 {
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proc-supply = <&mt6358_vproc12_reg>;
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};
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&cpu3 {
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proc-supply = <&mt6358_vproc12_reg>;
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};
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&cpu4 {
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proc-supply = <&mt6358_vproc11_reg>;
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};
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&cpu5 {
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proc-supply = <&mt6358_vproc11_reg>;
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};
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&cpu6 {
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proc-supply = <&mt6358_vproc11_reg>;
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};
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&cpu7 {
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proc-supply = <&mt6358_vproc11_reg>;
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};
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&uart0 {
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status = "okay";
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};
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&pwm1 {
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status = "okay";
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pinctrl-0 = <&pwm_pins_1>;
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pinctrl-names = "default";
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};
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